Re: Questions about coretemp

[Valerio Daelli]

On Fri, Aug 8, 2008 at 10:35 PM, <[EMAIL PROTECTED]> wrote:
>>
>> have you checked your device.hints?
>> Also there is the cpuid port which may help you identify if your CPU is
>> supported.
>>
>> Valerio Daelli
>
> I'm not sure what I would be looking for in device.hints. Below is the output 
> of cpuid. Perhaps Xeons are not supported by coretemp? ::
>
>  eax ineax  ebx  ecx  edx
>  0005 756e6547 6c65746e 49656e69
> 0001 0f4a 01020800 641d bfebfbff
> 0002 605b5001   007d7040
> 0003    
> 0004 4121 01c0003f 001f 
> 0005 0040 0040  
> 8000 8008   
> 8001   0001 2010
> 8002 20202020 20202020 20202020 20202020
> 8003 6e492020 286c6574 58202952 286e6f65
> 8004 20294d54 20555043 30302e33 007a4847
> 8005    
> 8006   08006040 
> 8007    
> 8008 3024   
>
> Vendor ID: "GenuineIntel"; CPUID level 5
>
> Intel-specific functions:
> Version 0f4a:
> Type 0 - Original OEM
> Family 15 - Pentium 4
> Extended family 0
> Model 4 - Intel Pentium 4 processor (generic) or newer
> Stepping 10
> Reserved 0
>
> Extended brand string: "  Intel(R) Xeon(TM) CPU 3.00GHz"
> CLFLUSH instruction cache line size: 8
> Initial APIC ID: 1
> Hyper threading siblings: 2
>
> Feature flags: bfebfbff:
> FPUFloating Point Unit
> VMEVirtual 8086 Mode Enhancements
> DE Debugging Extensions
> PSEPage Size Extensions
> TSCTime Stamp Counter
> MSRModel Specific Registers
> PAEPhysical Address Extension
> MCEMachine Check Exception
> CX8COMPXCHG8B Instruction
> APIC   On-chip Advanced Programmable Interrupt Controller present and enabled
> SEPFast System Call
> MTRR   Memory Type Range Registers
> PGEPTE Global Flag
> MCAMachine Check Architecture
> CMOV   Conditional Move and Compare Instructions
> FGPAT  Page Attribute Table
> PSE-36 36-bit Page Size Extension
> CLFSH  CFLUSH instruction
> DS Debug store
> ACPI   Thermal Monitor and Clock Ctrl
> MMXMMX instruction set
> FXSR   Fast FP/MMX Streaming SIMD Extensions save/restore
> SSEStreaming SIMD Extensions instruction set
> SSE2   SSE2 extensions
> SS Self Snoop
> HT Hyper Threading
> TM Thermal monitor
> 31 reserved
>
> Feature flags set 2: 641d:
> SSE3SSE3 extensions
> 2 - unknown feature
> MONITOR MONITOR/MWAIT instructions
> DS-CPL  CPL Qualified Debug Store
> CID Context ID
> CX16CMPXCHG16B
> xTPRSend Task Priority messages
>
> Extended feature flags: 2010:
> XD-bitExecution Disable bit
> EM64T Intel Extended Memory 64 Technology
>
> Extended feature flags set 2: 0001:
> 0 - unknown feature
>
> TLB and cache info:
> 50: Instruction TLB: 4KB and 2MB or 4MB pages, 64 entries
> 5b: Data TLB: 4KB and 4MB pages, fully assoc., 64 entries
> 60: 1st-level data cache: 16-KB, 8-way set associative, sectored cache, 
> 64-byte line size
> 40: No 2nd-level cache, or if 2nd-level cache exists, no 3rd-level cache
> 70: Trace cache: 12K-micro-op, 4-way set assoc
> 7d: 2nd-level cache: 2-MB, 8-way set associative, 64-byte line size
> Processor serial: -0F4A----


Only CPU with CPUID >= 6 seems supported.
I found this link useful

http://www.intel.com/software/products/documentation/vlin/mergedprojects/analyzer_ec/mergedprojects/reference_olh/mergedprojects/instructions/instruct32_hh/vc46.htm

Bye

Valerio Daelli
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Re: Questions about coretemp

[Norberto Meijome]

On Thu, 7 Aug 2008 16:50:55 -0700 (PDT)
[EMAIL PROTECTED] wrote:

> that is, exept for when i added "coretemp_load="YES"" to loader.conf (as 
> per the coretemp manpage) and then i got this in dmesg:
> 
>module_register: module cpu/coretemp already exists!
>Module cpu/coretemp failed to register: 17

this means that the code in the module  is already loaded , or it is part of 
the kernel itself.

B

_
{Beto|Norberto|Numard} Meijome

Software QA is like cleaning my cat's litter box: Sift out the big chunks. Stir 
in the rest. Hope it doesn't stink.

I speak for myself, not my employer. Contents may be hot. Slippery when wet. 
Reading disclaimers makes you go blind. Writing them is worse. You have been 
Warned.
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Questions about coretemp

[ben]

the "Questions about healthd and mprime" thread lead me to try recompile 
and install a freebsd 7.0 kernel with "device coretemp"


on reboot i thought i would find a sysctl variable 
"dev.cpu.%d.temperature" but i don't. i don't even see anything in dmesg 
about "coretemp"


that is, exept for when i added "coretemp_load="YES"" to loader.conf (as 
per the coretemp manpage) and then i got this in dmesg:


  module_register: module cpu/coretemp already exists!
  Module cpu/coretemp failed to register: 17

has anyone had success using this? i wonder if there is a dependency 
i'm not building into my kernel. . . this system has dual xeons.


ben
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