Hi,
Please try the attached patch for 10-current. The patch is not tested yet,
only compiles. I will try to test more later today. Let me know if you see any
issues.
--HPS
=== dev/usb/serial/usb_serial.c
==
---
Hi,
I've run some basic tests over here (x86) which passed after some patch
modifications. Please test and verify for your ARM targets:
http://svnweb.freebsd.org/changeset/base/244500
http://svnweb.freebsd.org/changeset/base/244503
Please also verify that upgt and uwrt and uath still works
On 12/20/2012 10:46 AM, Hans Petter Selasky wrote:
Hi,
I've run some basic tests over here (x86) which passed after some patch
modifications. Please test and verify for your ARM targets:
http://svnweb.freebsd.org/changeset/base/244500
http://svnweb.freebsd.org/changeset/base/244503
Please
On Tuesday 18 December 2012 21:32:46 Warner Losh wrote:
On Dec 18, 2012, at 12:44 PM, Hans Petter Selasky wrote:
On Tuesday 18 December 2012 20:12:29 Andrew Turner wrote:
On Tue, 18 Dec 2012 13:06:44 +0100
Hans Petter Selasky hsela...@c2i.net wrote:
Hi Andrew,
The BUS_DMA_COHERENT
Hi again,
Different vendors use different naming conventions about sync operations.
Maybe we should start defining some names and agree about that first?
usb_pc_cpu_flush:
This function is a system abstraction which is supposed to ensure that all CPU
cached data for the given buffer is
On Dec 19, 2012, at 1:56 AM, Hans Petter Selasky wrote:
Hi again,
Different vendors use different naming conventions about sync operations.
The different names are often for subtly different types of cache flushing.
Maybe we should start defining some names and agree about that first?
BTW:
This commit looks exactly like my X-mas present :-)
http://svnweb.freebsd.org/changeset/base/244471
--HPS
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On Wednesday 19 December 2012 20:12:55 Warner Losh wrote:
On Dec 19, 2012, at 1:56 AM, Hans Petter Selasky wrote:
Hi again,
Different vendors use different naming conventions about sync operations.
The different names are often for subtly different types of cache flushing.
Maybe we
On Tuesday 18 December 2012 08:49:31 Andrew Turner wrote:
Hello,
Oleksandr and myself have been looking into why when we enable the
write-back cache on the PandaBoard there are kernel panics with USB. We
have tracked it down to an issue appending the ehci_qh_t to the list at
the end of
On Tue, 18 Dec 2012 09:22:22 +0100
Hans Petter Selasky hsela...@c2i.net wrote:
On Tuesday 18 December 2012 08:49:31 Andrew Turner wrote:
Hello,
Oleksandr and myself have been looking into why when we enable the
write-back cache on the PandaBoard there are kernel panics with
USB. We
On Tuesday 18 December 2012 12:02:13 Andrew Turner wrote:
On Tue, 18 Dec 2012 09:22:22 +0100
Hans Petter Selasky hsela...@c2i.net wrote:
On Tuesday 18 December 2012 08:49:31 Andrew Turner wrote:
Hello,
Oleksandr and myself have been looking into why when we enable the
write-back
On Tue, 18 Dec 2012 13:06:44 +0100
Hans Petter Selasky hsela...@c2i.net wrote:
Hi Andrew,
The BUS_DMA_COHERENT flag does nothing on armv6 as we need the cache
enabled for atomic operations to work correctly and we would have to
disable the cache on the entire page. This is acceptable
On Tuesday 18 December 2012 20:12:29 Andrew Turner wrote:
On Tue, 18 Dec 2012 13:06:44 +0100
Hans Petter Selasky hsela...@c2i.net wrote:
Hi Andrew,
The BUS_DMA_COHERENT flag does nothing on armv6 as we need the cache
enabled for atomic operations to work correctly and we would have
On Dec 18, 2012, at 1:22 AM, Hans Petter Selasky wrote:
On Tuesday 18 December 2012 08:49:31 Andrew Turner wrote:
Hello,
Oleksandr and myself have been looking into why when we enable the
write-back cache on the PandaBoard there are kernel panics with USB. We
have tracked it down to an
On Dec 18, 2012, at 12:44 PM, Hans Petter Selasky wrote:
On Tuesday 18 December 2012 20:12:29 Andrew Turner wrote:
On Tue, 18 Dec 2012 13:06:44 +0100
Hans Petter Selasky hsela...@c2i.net wrote:
Hi Andrew,
The BUS_DMA_COHERENT flag does nothing on armv6 as we need the cache
enabled for
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