Yup, that's what I thought.
I'll go dig it up.
The analog filter is something on the front end, just before the
transmit/receive RF side. It acts as a filter to ensure (a) decent
rejection of adjacent channel signals being received and (b) the transmit
spectral mask is being met.
-a
On 27 Au
Fixed original email with imgur URL since mailing list strips attachments.
--Bart
On 8/27/2014 9:00 PM, Bart Kus wrote:
Well I'll be damned, looks like 5MHz mode on Mikrotik is just slower
signalling! All 52-subcarriers are indeed there, although a little
hard to see:
http://i.imgur.com/d5
Well I'll be damned, looks like 5MHz mode on Mikrotik is just slower
signalling! All 52-subcarriers are indeed there, although a little hard
to see:
If you count peaks left/right of center, you'll get 26. 2*26=52, so
that's every sub accounted for.
Can you point me at your 5/10MHz docs?
On 27 August 2014 16:38, Bart Kus wrote:
> I'm guessing the chip generates its own internal clocks from an external
> reference. Can that PLL be slowed down ahead of timers overflowing?
> Hopefully the PCI clock is generated independently.
Yeah, that's what you're slowing down - you program the
I'm guessing the chip generates its own internal clocks from an external
reference. Can that PLL be slowed down ahead of timers overflowing?
Hopefully the PCI clock is generated independently.
Also, I think Mikrotik implements narrower bands by dropping subcarriers
instead of slowing down th
On 27 August 2014 16:09, Bart Kus wrote:
> Is the underclocking affecting the digital domain only? Or would there be
> some analog frequency response curves that would start falling off too? If
> it's a digital-only underclock I don't see why there would be any
> degradation (aside from the obvi
Is the underclocking affecting the digital domain only? Or would there
be some analog frequency response curves that would start falling off
too? If it's a digital-only underclock I don't see why there would be
any degradation (aside from the obvious speed decrease). Is this easily
testable
Hi!
So, I'm not sure if we can underclock it _that_ far. The 5/10MHz
channels are implemented by underclocking various parts of the chip,
which results in everything being some fraction of 20MHz (or 2x
clocking it, resulting in 40MHz.) Bringing it all the way down to
200KHz is a pretty tall ask.
