From: Abhinav Kumar
Setting the DSI PLL src in probe doesn't provide the clock
driver sufficient time to reclaim unused clock resources
from coreboot resulting in warnings from clock driver.
Move the DSI PLL src setting to modeset_init() so that the
clock driver can claim unused display clock
On Mon, Jun 25, 2018 at 12:06:49AM -0700, Stephen Boyd wrote:
> Quoting spa...@codeaurora.org (2018-06-24 21:56:05)
> > On 2018-06-22 06:42, Stephen Boyd wrote:
> > > Quoting Sandeep Panda (2018-06-21 05:32:07)
> > >> + clock rate must be 12 MHz, 19.2 MHz, 26 MHz, 27 MHz or 38.4
> > >>
postdiv_lock spinlock was used before initialization
for 10nm pll. It causes following spin_bug:
"BUG: spinlock bad magic on CPU#0".
Initialize spinlock before its usage.
Signed-off-by: Rajesh Yadav
---
drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c | 2 ++
1 file changed, 2 insertions(+)
On 2018-06-22 00:32, Sean Paul wrote:
It's unused, so let's get rid of it.
Signed-off-by: Sean Paul
Reviewed-by: Rajesh Yadav
---
drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c | 31 -
drivers/gpu/drm/msm/disp/dpu1/dpu_formats.h | 16 ---
2 files changed, 47
