[Freedreno] [PATCH] drm/msm/dpu: Add UBWC support for RGB8888 formats

Hardware only natively supports BGR UBWC. UBWC support for RGB can be had by pretending that the buffer is BGR. Signed-off-by: Fritz Koenig --- drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c| 18 ++ .../drm/msm/disp/dpu1/dpu_hw_catalog_format.h | 2 ++ 2 files

[Freedreno] [RESEND, v4, 2/7] dt-bindings: msm/mdp5: Document optional TBU and TBU_RT clocks

From: AngeloGioacchino Del Regno These two clocks aren't present in all versions of the MDP5 HW: where present, they are needed to enable the Translation Buffer Unit(s). Signed-off-by: AngeloGioacchino Del Regno Acked-by: Rob Herring --- Documentation/devicetree/bindings/display/msm/mdp5.txt

Re: [Freedreno] [PATCH] drm: msm: a6xx: fix debug bus register configuration

On Wed, Nov 06, 2019 at 05:19:23PM +0530, Sharat Masetty wrote: > Fix the cx debugbus related register configuration, to collect accurate > bus data during gpu snapshot. This helps with complete snapshot dump > and also complete proper GPU recovery. > > Signed-off-by: Sharat Masetty Applied to

Re: [Freedreno] [PATCH] drm: msm: a6xx: fix debug bus register configuration

On Wed, Nov 06, 2019 at 08:18:59AM -0800, Rob Clark wrote: > On Wed, Nov 6, 2019 at 3:49 AM Sharat Masetty wrote: > > > > Fix the cx debugbus related register configuration, to collect accurate > > bus data during gpu snapshot. This helps with complete snapshot dump > > and also complete proper

Re: [Freedreno] drm/msm: 'pp done time out' errors after async commit changes

On Wed, Nov 6, 2019 at 8:47 AM Jeffrey Hugo wrote: > > On Wed, Nov 6, 2019 at 9:30 AM Rob Clark wrote: > > > > On Wed, Nov 6, 2019 at 1:13 AM Brian Masney wrote: > > > > > > On Tue, Nov 05, 2019 at 08:23:27AM -0800, Rob Clark wrote: > > > > On Tue, Nov 5, 2019 at 2:08 AM Brian Masney > > > >

Re: [Freedreno] drm/msm: 'pp done time out' errors after async commit changes

On Wed, Nov 6, 2019 at 9:30 AM Rob Clark wrote: > > On Wed, Nov 6, 2019 at 1:13 AM Brian Masney wrote: > > > > On Tue, Nov 05, 2019 at 08:23:27AM -0800, Rob Clark wrote: > > > On Tue, Nov 5, 2019 at 2:08 AM Brian Masney wrote: > > > > The 'pp done time out' errors go away if I revert the

Re: [Freedreno] drm/msm: 'pp done time out' errors after async commit changes

On Wed, Nov 6, 2019 at 1:13 AM Brian Masney wrote: > > On Tue, Nov 05, 2019 at 08:23:27AM -0800, Rob Clark wrote: > > On Tue, Nov 5, 2019 at 2:08 AM Brian Masney wrote: > > > The 'pp done time out' errors go away if I revert the following three > > > commits: > > > > > > cd6d923167b1

Re: [Freedreno] [PATCH] drm: msm: a6xx: fix debug bus register configuration

On Wed, Nov 6, 2019 at 3:49 AM Sharat Masetty wrote: > > Fix the cx debugbus related register configuration, to collect accurate > bus data during gpu snapshot. This helps with complete snapshot dump > and also complete proper GPU recovery. > > Signed-off-by: Sharat Masetty (adding fixes tag

Re: [Freedreno] [PATCH RESEND 07/14] drm/msm/hdmi: Provide ddc symlink in hdmi connector sysfs directory

On Mon, Aug 26, 2019 at 3:27 PM Andrzej Pietrasiewicz wrote: > > Use the ddc pointer provided by the generic connector. > > Signed-off-by: Andrzej Pietrasiewicz > Acked-by: Sam Ravnborg > Reviewed-by: Emil Velikov Acked-by: Sean Paul > --- > drivers/gpu/drm/msm/hdmi/hdmi_connector.c | 6

[Freedreno] [PATCH] drm: msm: a6xx: fix debug bus register configuration

Fix the cx debugbus related register configuration, to collect accurate bus data during gpu snapshot. This helps with complete snapshot dump and also complete proper GPU recovery. Signed-off-by: Sharat Masetty --- drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 24 1 file

Re: [Freedreno] drm/msm: 'pp done time out' errors after async commit changes

On Tue, Nov 05, 2019 at 08:23:27AM -0800, Rob Clark wrote: > On Tue, Nov 5, 2019 at 2:08 AM Brian Masney wrote: > > The 'pp done time out' errors go away if I revert the following three > > commits: > > > > cd6d923167b1 ("drm/msm/dpu: async commit support") > > d934a712c5e6 ("drm/msm: add atomic