Re: [Freedreno] [PATCH v4 3/4] drm/msm/dp: check main link status before start aux read

2021-05-03 Thread Stephen Boyd
Quoting Kuogee Hsieh (2021-04-21 16:37:37) > Maybe when the cable is disconnected the DP phy should be shutdown and > some bit in the phy could effectively "cut off" the aux channel and then > NAKs would start coming through here in the DP controller I/O register > space. This patch have DP aux

Re: [Freedreno] [PATCH v4 4/4] drm/msm/dp: dp_link_parse_sink_count() return immediately if aux read failed

2021-05-03 Thread Stephen Boyd
Quoting Kuogee Hsieh (2021-04-21 16:37:38) > Add checking aux read/write status at both dp_link_parse_sink_count() > and dp_link_parse_sink_status_filed() to avoid long timeout delay if s/filed/field/ > dp aux read/write failed at timeout due to cable unplugged. > > Changes in V4: > -- split

Re: [Freedreno] [PATCH v4 2/4] drm/msm/dp: initialize audio_comp when audio starts

2021-05-03 Thread Stephen Boyd
Quoting Kuogee Hsieh (2021-04-21 16:37:36) > Initialize audio_comp when audio starts and wait for audio_comp at > dp_display_disable(). This will take care of both dongle unplugged > and display off (suspend) cases. > > Changes in v2: > -- add dp_display_signal_audio_start() > > Changes in v3: >

Re: [Freedreno] [PATCH v4 1/4] drm/msm/dp: check sink_count before update is_connected status

2021-05-03 Thread Stephen Boyd
Quoting Kuogee Hsieh (2021-04-21 16:37:35) > Link status is different from display connected status in the case > of something like an Apple dongle where the type-c plug can be > connected, and therefore the link is connected, but no sink is > connected until an HDMI cable is plugged into the

Re: [Freedreno] [PATCH 1/2] drm/msm/dp: service only one irq_hpd if there are multiple irq_hpd pending

2021-05-03 Thread Stephen Boyd
Quoting khs...@codeaurora.org (2021-05-03 12:23:31) > On 2021-04-29 20:11, Stephen Boyd wrote: > > Quoting khs...@codeaurora.org (2021-04-29 10:23:31) > >> On 2021-04-29 02:26, Stephen Boyd wrote: > >> > Quoting khs...@codeaurora.org (2021-04-28 10:38:11) > >> >> On 2021-04-27 17:00, Stephen Boyd

Re: [Freedreno] [PATCH 1/2] drm/msm/dp: service only one irq_hpd if there are multiple irq_hpd pending

2021-05-03 Thread khsieh
On 2021-04-29 20:11, Stephen Boyd wrote: Quoting khs...@codeaurora.org (2021-04-29 10:23:31) On 2021-04-29 02:26, Stephen Boyd wrote: > Quoting khs...@codeaurora.org (2021-04-28 10:38:11) >> On 2021-04-27 17:00, Stephen Boyd wrote: >> > Quoting aravi...@codeaurora.org (2021-04-21 11:55:21) >>

Re: [Freedreno] [PATCH v2 2/2] dt-bindings: display: msm/dsi: add qcom, dsi-phy-cphy-mode option

2021-05-03 Thread Rob Herring
On Fri, Apr 23, 2021 at 01:24:40PM -0400, Jonathan Marek wrote: > Document qcom,dsi-phy-cphy-mode option, which can be used to control > whether DSI will operate in D-PHY (default) or C-PHY mode. Given this is a standard MIPI thing, I think this needs to be a common property. We already have phy

[Freedreno] [PATCH AUTOSEL 4.4 13/16] drm/msm/mdp5: Configure PP_SYNC_HEIGHT to double the vtotal

2021-05-03 Thread Sasha Levin
From: Marijn Suijten [ Upstream commit 2ad52bdb220de5ab348098e3482b01235d15a842 ] Leaving this at a close-to-maximum register value 0xFFF0 means it takes very long for the MDSS to generate a software vsync interrupt when the hardware TE interrupt doesn't arrive. Configuring this to double the

[Freedreno] [PATCH AUTOSEL 4.9 21/24] drm/msm/mdp5: Configure PP_SYNC_HEIGHT to double the vtotal

2021-05-03 Thread Sasha Levin
From: Marijn Suijten [ Upstream commit 2ad52bdb220de5ab348098e3482b01235d15a842 ] Leaving this at a close-to-maximum register value 0xFFF0 means it takes very long for the MDSS to generate a software vsync interrupt when the hardware TE interrupt doesn't arrive. Configuring this to double the

[Freedreno] [PATCH AUTOSEL 4.14 27/31] drm/msm/mdp5: Configure PP_SYNC_HEIGHT to double the vtotal

2021-05-03 Thread Sasha Levin
From: Marijn Suijten [ Upstream commit 2ad52bdb220de5ab348098e3482b01235d15a842 ] Leaving this at a close-to-maximum register value 0xFFF0 means it takes very long for the MDSS to generate a software vsync interrupt when the hardware TE interrupt doesn't arrive. Configuring this to double the

[Freedreno] [PATCH AUTOSEL 4.19 29/35] drm/msm/mdp5: Configure PP_SYNC_HEIGHT to double the vtotal

2021-05-03 Thread Sasha Levin
From: Marijn Suijten [ Upstream commit 2ad52bdb220de5ab348098e3482b01235d15a842 ] Leaving this at a close-to-maximum register value 0xFFF0 means it takes very long for the MDSS to generate a software vsync interrupt when the hardware TE interrupt doesn't arrive. Configuring this to double the

[Freedreno] [PATCH AUTOSEL 5.4 47/57] drm/msm/mdp5: Configure PP_SYNC_HEIGHT to double the vtotal

2021-05-03 Thread Sasha Levin
From: Marijn Suijten [ Upstream commit 2ad52bdb220de5ab348098e3482b01235d15a842 ] Leaving this at a close-to-maximum register value 0xFFF0 means it takes very long for the MDSS to generate a software vsync interrupt when the hardware TE interrupt doesn't arrive. Configuring this to double the

[Freedreno] [PATCH AUTOSEL 5.4 48/57] drm/msm/mdp5: Do not multiply vclk line count by 100

2021-05-03 Thread Sasha Levin
From: Marijn Suijten [ Upstream commit 377569f82ea8228c421cef4da33e056a900b58ca ] Neither vtotal nor drm_mode_vrefresh contain a value that is premultiplied by 100 making the x100 variable name incorrect and resulting in vclks_line to become 100 times larger than it is supposed to be. The

Re: [Freedreno] [PATCH] drm/msm/dpu: Delete bonkers code

2021-05-03 Thread Maxime Ripard
Hi, On Fri, Apr 30, 2021 at 10:44:53AM -0700, Stephen Boyd wrote: > Quoting Rob Clark (2021-04-30 10:17:39) > > From: Rob Clark > > > > dpu_crtc_atomic_flush() was directly poking it's attached planes in a > > code path that ended up in dpu_plane_atomic_update(), even if the plane > > was not