Re: [Freedreno] [PATCH v3 01/13] drm/msm/dsi: add support for dsc data

2021-11-29 Thread Abhinav Kumar
Hi Vinod On 11/15/2021 10:22 PM, Vinod Koul wrote: Display Stream Compression (DSC) parameters need to be calculated. Add helpers and struct msm_display_dsc_config in msm_drv for this msm_display_dsc_config uses drm_dsc_config for DSC parameters. Signed-off-by: Vinod Koul ---

[Freedreno] [PATCH igt 1/2] igt: Split out I/O helpers

2021-11-29 Thread Rob Clark
From: Rob Clark Split the readN()/writeN() helpers out into an igt_io module, so they can be re-used by tests. Signed-off-by: Rob Clark --- lib/igt_io.c| 96 + lib/igt_io.h| 33 + lib/igt_sysfs.c | 45

[Freedreno] [PATCH igt 2/2] msm: Add test for kernel buffer permissions

2021-11-29 Thread Rob Clark
From: Rob Clark Tests that reads and/or writes to kernel managed buffers which should be inaccessible to userspace controlled cmdstream, are indeed inaccessible. Signed-off-by: Rob Clark --- lib/igt_msm.h | 1 + tests/meson.build | 1 + tests/msm_mapping.c | 257

[Freedreno] [PATCH igt 0/2] msm+lib: Add test for buffer mapping permissions

2021-11-29 Thread Rob Clark
From: Rob Clark First patch just splits out a couple of helpers from igt_sysfs so they can be re-used. Second patch adds a test which locates the address of a given buffer, and verifies (depending on expected permissions) that writes and/or reads trigger an iova fault rather than succeeding.

Re: [Freedreno] [PATCH v4.5 12/14] dt-bindings: msm/dp: Add bindings for HDCP registers

2021-11-29 Thread Rob Herring
On Mon, 15 Nov 2021 20:21:48 +, Sean Paul wrote: > From: Sean Paul > > This patch adds the bindings for the MSM DisplayPort HDCP registers > which are required to write the HDCP key into the display controller as > well as the registers to enable HDCP authentication/key >

Re: [Freedreno] [PATCH] drm/msm/gpu: Don't allow zero fence_id

2021-11-29 Thread Rob Clark
On Mon, Nov 29, 2021 at 10:18 AM Rob Clark wrote: > > From: Rob Clark > > Elsewhere we treat zero as "no fence" and __msm_gem_submit_destroy() > skips removal from fence_idr. We could alternately change this to use > negative values for "no fence" but I think it is more clear to not allow >

[Freedreno] [PATCH] drm/msm/gpu: Don't allow zero fence_id

2021-11-29 Thread Rob Clark
From: Rob Clark Elsewhere we treat zero as "no fence" and __msm_gem_submit_destroy() skips removal from fence_idr. We could alternately change this to use negative values for "no fence" but I think it is more clear to not allow zero as a valid fence_id. Signed-off-by: Rob Clark ---

[Freedreno] [PATCH v5] drm/msm/dp: employ bridge mechanism for display enable and disable

2021-11-29 Thread Kuogee Hsieh
Currently the msm_dp_*** functions implement the same sequence which would happen when drm_bridge is used. hence get rid of this intermediate layer and align with the drm_bridge usage to avoid customized implementation. Signed-off-by: Kuogee Hsieh Changes in v2: -- revise commit text -- rename

Re: [Freedreno] [PATCH v3] drm/msm/dp: employ bridge mechanism for display enable and disable

2021-11-29 Thread Kuogee Hsieh
On 11/24/2021 11:45 AM, Dmitry Baryshkov wrote: On 15/11/2021 21:48, Kuogee Hsieh wrote: Currently the msm_dp_*** functions implement the same sequence which would happen when drm_bridge is used. hence get rid of this intermediate layer and align with the drm_bridge usage to avoid customized

Re: [Freedreno] [PATCH] drm/msm: Initialize MDSS irq domain at probe time

2021-11-29 Thread AngeloGioacchino Del Regno
Il 29/11/21 15:53, Dmitry Baryshkov ha scritto: Hi, On Mon, 29 Nov 2021 at 17:15, AngeloGioacchino Del Regno wrote: Il 29/11/21 03:20, Dmitry Baryshkov ha scritto: Hi, On 25/11/2021 18:09, AngeloGioacchino Del Regno wrote: Since commit 8f59ee9a570c ("drm/msm/dsi: Adjust probe order"), the

Re: [Freedreno] [PATCH] drm/msm: Initialize MDSS irq domain at probe time

2021-11-29 Thread Dmitry Baryshkov
Hi, On Mon, 29 Nov 2021 at 17:15, AngeloGioacchino Del Regno wrote: > > Il 29/11/21 03:20, Dmitry Baryshkov ha scritto: > > Hi, > > > > On 25/11/2021 18:09, AngeloGioacchino Del Regno wrote: > >> Since commit 8f59ee9a570c ("drm/msm/dsi: Adjust probe order"), the > >> DSI host gets initialized

Re: [Freedreno] [PATCH] drm/msm: Initialize MDSS irq domain at probe time

2021-11-29 Thread AngeloGioacchino Del Regno
Il 29/11/21 03:20, Dmitry Baryshkov ha scritto: Hi, On 25/11/2021 18:09, AngeloGioacchino Del Regno wrote: Since commit 8f59ee9a570c ("drm/msm/dsi: Adjust probe order"), the DSI host gets initialized earlier, but this caused unability to probe the entire stack of components because they all