Hi,
On Tue, May 7, 2024 at 4:05 PM Abhinav Kumar wrote:
>
> Since commit 5acf49119630 ("drm/msm: import gen_header.py script from Mesa"),
> compilation is broken on machines having python versions older than 3.9
> due to dependency on argparse.BooleanOptionalAction.
>
> Switch to use simple bool
Hi,
On Sun, May 19, 2024 at 2:01 AM Dmitry Baryshkov
wrote:
>
> On Tue, May 14, 2024 at 03:55:14PM +0300, Jani Nikula wrote:
> > Prefer the struct drm_edid based functions for reading the EDID and
> > updating the connector.
> >
> > Simplify the flow by updating the EDID property when the EDID
Hi,
On Tue, May 7, 2024 at 4:05 PM Abhinav Kumar wrote:
>
> Since commit 5acf49119630 ("drm/msm: import gen_header.py script from Mesa"),
> compilation is broken on machines having python versions older than 3.9
> due to dependency on argparse.BooleanOptionalAction.
>
> Switch to use simple bool
Hi,
On Fri, May 3, 2024 at 11:15 AM Dmitry Baryshkov
wrote:
>
> @@ -941,6 +948,7 @@ def main():
> parser = argparse.ArgumentParser()
> parser.add_argument('--rnn', type=str, required=True)
> parser.add_argument('--xml', type=str, required=True)
> +
Hi,
On Sat, Feb 3, 2024 at 5:47 AM Dmitry Baryshkov
wrote:
>
> Both dp_link_adjust_levels() and dp_ctrl_update_vx_px() limit swing and
> pre-emphasis to 2, while the real maximum value for the sum of the
> voltage swing and pre-emphasis is 3. Fix the DP code to remove this
> limitation.
>
>
Hi,
On Tue, Mar 19, 2024 at 10:27 AM Dmitry Baryshkov
wrote:
>
> On Tue, 19 Mar 2024 at 19:13, Abhinav Kumar wrote:
> >
> >
> >
> > On 3/18/2024 5:55 PM, Dmitry Baryshkov wrote:
> > > On Tue, 19 Mar 2024 at 02:19, Abhinav Kumar
> > > wrote:
> > >>
> > >> +bjorn, johan as fyi for sc8280xp
> >
Hi,
On Mon, Mar 18, 2024 at 12:26 PM Stephen Boyd wrote:
>
> Quoting Douglas Anderson (2024-03-15 14:36:32)
> > This is a no-op change to just fix a typo in the name of a static function.
> >
> > Signed-off-by: Douglas Anderson
> > ---
> >
> > Changes in v2:
> > - ("Fix typo in static function
Hi,
On Wed, Mar 13, 2024 at 1:41 PM Abhinav Kumar wrote:
>
>
>
> On 3/12/2024 5:13 PM, Douglas Anderson wrote:
> > As documented in the description of the transfer() function of
> > "struct drm_dp_aux", the transfer() function can be called at any time
> > regardless of the state of the DP port.
Hi,
On Thu, Mar 7, 2024 at 1:37 AM Colin Ian King wrote:
>
> The variable out is being initialized and incremented but it is never
> actually referenced in any other way. The variable is redundant and can
> be removed.
>
> Cleans up clang scan build warning:
>
Hi,
On Tue, Mar 12, 2024 at 5:47 PM Guenter Roeck wrote:
>
> On Tue, Mar 12, 2024 at 5:14 PM Douglas Anderson
> wrote:
> >
> > As documented in the description of the transfer() function of
> > "struct drm_dp_aux", the transfer() function can be called at any time
> > regardless of the state
Hi,
On Thu, Feb 22, 2024 at 9:32 AM Dmitry Baryshkov
wrote:
>
> On Thu, 22 Feb 2024 at 17:04, Bjorn Andersson
> wrote:
> >
> > On Thu, Feb 22, 2024 at 11:46:26AM +0200, Dmitry Baryshkov wrote:
> > > On Thu, 22 Feb 2024 at 11:28, Konrad Dybcio
> > > wrote:
> > > >
> > > >
> > > >
> > > > On
Hi,
On Thu, Aug 3, 2023 at 10:34 AM Rob Clark wrote:
>
> From: Rob Clark
>
> For normal GPU devfreq, we need to acquire the GMU lock while already
> holding devfreq locks. But in the teardown path, we were calling
> dev_pm_domain_detach() while already holding the GMU lock, resulting in
> this
Hi,
On Sat, Jun 17, 2023 at 9:15 AM Uwe Kleine-König
wrote:
>
> [expanding recipents by the other affected persons]
>
> On Thu, Jun 08, 2023 at 09:08:15AM -0700, Doug Anderson wrote:
> > On Thu, Jun 1, 2023 at 8:40 AM Uwe Kleine-König
> > wrote:
> > >
> &
Hi,
On Mon, Jun 12, 2023 at 11:25 AM Dmitry Baryshkov
wrote:
>
> Change adreno_is_a690() prototype to accept the const struct adreno_gpu
> pointer instead of a non-const one. This fixes the following warning:
>
> In file included from drivers/gpu/drm/msm/msm_drv.c:33:
>
Hi,
On Mon, Jun 12, 2023 at 3:40 PM Dmitry Baryshkov
wrote:
>
> On 13/06/2023 01:01, Bjorn Andersson wrote:
> > Using devres to depopulate the aux bus made sure that upon a probe
> > deferral the EDP panel device would be destroyed and recreated upon next
> > attempt.
> >
> > But the struct
Hi,
On Thu, Jun 8, 2023 at 9:26 AM Laurent Pinchart
wrote:
>
> > The following ones appeared to apply to the top of drm-misc-next, but
> > I didn't apply them since get_maintainer didn't say they were part of
> > drm-misc-next:
> >
> > drm/tiny: Convert to platform remove callback returning void
Hi,
On Thu, Jun 8, 2023 at 10:19 AM Tomi Valkeinen
wrote:
>
> On 08/06/2023 19:26, Laurent Pinchart wrote:
> > Hi Doug,
> >
> > On Thu, Jun 08, 2023 at 09:08:15AM -0700, Doug Anderson wrote:
> >> On Thu, Jun 1, 2023 at 8:40 AM Uwe Kleine-König wrote:
> &g
Hi,
On Thu, Jun 1, 2023 at 8:40 AM Uwe Kleine-König
wrote:
>
> Hello,
>
> On Sun, May 07, 2023 at 06:25:23PM +0200, Uwe Kleine-König wrote:
> > this patch series adapts the platform drivers below drivers/gpu/drm
> > to use the .remove_new() callback. Compared to the traditional .remove()
> >
Hi,
On Wed, May 31, 2023 at 1:00 AM Johan Hovold wrote:
>
> A recent commit started taking the GMU lock in the GPU destroy path,
> which on GPU initialisation failure is called before the GMU and its
> lock have been initialised.
>
> Make sure that the GMU has been initialised before taking the
Mark,
On Mon, May 22, 2023 at 5:59 AM Rodrigo Vivi wrote:
>
> On Sat, May 20, 2023 at 02:07:51AM +0300, Dmitry Baryshkov wrote:
> > On 20/05/2023 00:16, Rodrigo Vivi wrote:
> > > On Fri, May 19, 2023 at 07:55:47PM +0300, Dmitry Baryshkov wrote:
> > > > On 19/04/2023 18:43, Mark Yacoub wrote:
> >
Hi,
On Wed, May 24, 2023 at 1:06 AM Dmitry Baryshkov
wrote:
>
> On 24/05/2023 09:59, Johan Hovold wrote:
> > On Tue, May 23, 2023 at 12:23:04PM -0700, Abhinav Kumar wrote:
> >> On 5/23/2023 8:24 AM, Johan Hovold wrote:
> >>> On Fri, May 12, 2023 at 09:13:04PM +0300, Dmitry Baryshkov wrote:
>
Hi,
On Wed, Apr 19, 2023 at 8:43 AM Mark Yacoub wrote:
>
> Hi all,
> This is v10 of the HDCP patches. The patches are authored by Sean Paul.
> I rebased and addressed the review comments in v6-v10.
>
> Main change in v10 is handling the kernel test bot warnings.
>
> Patches 1-4 focus on moving
Hi,
On Mon, Apr 10, 2023 at 9:59 AM Dmitry Baryshkov
wrote:
>
> Move GMU mutex initialization earlier to make sure that it is always
> initialized. a6xx_destroy can be called from ther failure path before
> GMU initialization.
>
> This fixes the following backtrace:
>
> [ cut here
Hi,
On Fri, Mar 31, 2023 at 6:59 AM Vinod Polimera
wrote:
>
> Certain flags like dirty_fb will be updated into the plane state
> during crtc atomic_check. Allow those updates during PSR commit.
>
> Reported-by: Bjorn Andersson
> Link:
Hi,
On Fri, Mar 31, 2023 at 6:59 AM Vinod Polimera
wrote:
>
> While in virtual terminal mode with PSR enabled, there will be
> no atomic commits triggered without dirty_fb being set. This
> will create a notion of no screen update. Allow atomic commit
> when dirty_fb ioctl is issued, so that it
Hi,
On Fri, Mar 24, 2023 at 12:56 PM Mark Yacoub wrote:
>
> From: Sean Paul
>
> Add the register ranges required for HDCP key injection and
> HDCP TrustZone interaction as described in the dt-bindings for the
> sc7180 dp controller.
>
> Signed-off-by: Sean Paul
> Signed-off-by: Mark Yacoub
>
Hi,
On Fri, Mar 24, 2023 at 12:56 PM Mark Yacoub wrote:
>
> From: Sean Paul
>
> Add the bindings for the MSM DisplayPort HDCP registers
> which are required to write the HDCP key into the display controller as
> well as the registers to enable HDCP authentication/key
> exchange/encryption.
>
>
Hi,
On Wed, Mar 29, 2023 at 4:34 PM Abhinav Kumar wrote:
>
> There are some interop issues seen across a few DP monitors with
> HBR3 and herobrine boards where the DP display stays blank with hbr3.
> This is still under investigation but in preparation for supporting
> higher resolutions, its
Hi,
On Wed, Mar 29, 2023 at 8:47 AM Doug Anderson wrote:
>
> Hi,
>
> On Wed, Mar 29, 2023 at 8:16 AM Vinod Polimera
> wrote:
> >
> >
> >
> > > -Original Message-
> > > From: Stephen Boyd
> > > Sent: Monday, March 27, 2
Hi,
On Wed, Mar 29, 2023 at 8:16 AM Vinod Polimera
wrote:
>
>
>
> > -Original Message-
> > From: Stephen Boyd
> > Sent: Monday, March 27, 2023 9:58 PM
> > To: Bjorn Andersson ; Vinod Polimera (QUIC)
> >
> > Cc: dri-de...@lists.freedesktop.org; linux-arm-...@vger.kernel.org;
> >
Hi,
On Thu, Mar 2, 2023 at 8:33 AM Vinod Polimera wrote:
>
> Changes in v2:
> - Use dp bridge to set psr entry/exit instead of dpu_enocder.
> - Don't modify whitespaces.
> - Set self refresh aware from atomic_check.
> - Set self refresh aware only if psr is supported.
> - Provide a
Hi,
On Mon, Feb 27, 2023 at 5:24 PM Dmitry Baryshkov
wrote:
>
> On 28/02/2023 02:26, Doug Anderson wrote:
> > Hi,
> >
> > On Wed, Feb 1, 2023 at 1:51 AM Dave Stevenson
> > wrote:
> >>
> >> On Tue, 31 Jan 2023 at 22:22, Douglas Anderson
> &
Hi,
On Wed, Mar 1, 2023 at 11:06 AM Doug Anderson wrote:
>
> Hi,
>
> On Sun, Feb 12, 2023 at 8:29 AM Vinod Polimera
> wrote:
> >
> > Changes in v2:
> > - Use dp bridge to set psr entry/exit instead of dpu_enocder.
> > - Don't modify whitespac
Hi,
On Sun, Feb 12, 2023 at 8:29 AM Vinod Polimera
wrote:
>
> Changes in v2:
> - Use dp bridge to set psr entry/exit instead of dpu_enocder.
> - Don't modify whitespaces.
> - Set self refresh aware from atomic_check.
> - Set self refresh aware only if psr is supported.
> - Provide a
Hi,
On Wed, Feb 1, 2023 at 1:51 AM Dave Stevenson
wrote:
>
> On Tue, 31 Jan 2023 at 22:22, Douglas Anderson wrote:
> >
> > Set the "pre_enable_prev_first" as provided by commit 4fb912e5e190
> > ("drm/bridge: Introduce pre_enable_prev_first to alter bridge init
> > order"). This should allow us
Hi,
On Mon, Feb 13, 2023 at 6:02 PM Abhinav Kumar wrote:
>
> Hi Doug
>
> Sorry for the delayed response.
>
> On 2/2/2023 2:46 PM, Doug Anderson wrote:
> > Hi,
> >
> > On Thu, Feb 2, 2023 at 2:37 PM Abhinav Kumar
> > wrote:
> >>
> >&
Hi,
On Mon, Feb 13, 2023 at 3:11 AM Kalyan Thota wrote:
>
> This series will enable color features on sc7280 target which has
> primary panel as eDP
>
> The series removes DSPP allocation based on encoder type and allows
> the DSPP reservation based on user request via CTM.
>
> The series will
Hi,
On Fri, Jan 27, 2023 at 2:15 AM Kalyan Thota wrote:
>
> Flush mechanism for DSPP blocks has changed in sc7280 family, it
> allows individual sub blocks to be flushed in coordination with
> master flush control.
>
> Representation: master_flush && (PCC_flush | IGC_flush .. etc )
>
> This
Turned night light on/off several times. Night light worked on the
internal display.
In case it matters, my ChromeOS root filesystem is R111-15328.0.0
> >-Original Message-
> >From: Kalyan Thota
> >Sent: Thursday, February 9, 2023 9:47 AM
> >To: Doug Anderso
t;
> >-----Original Message-
> >From: Doug Anderson
> >Sent: Wednesday, February 8, 2023 10:44 PM
> >To: Kalyan Thota (QUIC)
> >Cc: dri-de...@lists.freedesktop.org; linux-arm-...@vger.kernel.org;
> >freedreno@lists.freedesktop.org; devicet...@vger.kernel.org
Hi,
On Wed, Feb 8, 2023 at 5:42 AM Kalyan Thota wrote:
>
> This series will enable color features on sc7280 target which has
> primary panel as eDP
>
> The series removes DSPP allocation based on encoder type and allows
> the DSPP reservation based on user request via CTM.
>
> The series will
Hi,
On Thu, Feb 2, 2023 at 2:37 PM Abhinav Kumar wrote:
>
> Hi Doug
>
> On 1/31/2023 2:18 PM, Douglas Anderson wrote:
> > In commit 7d8e9a90509f ("drm/msm/dsi: move DSI host powerup to modeset
> > time") the error handling with regards to dsi_mgr_bridge_power_on()
> > got a bit worse.
Hi,
On Tue, Jan 31, 2023 at 3:32 PM Abhinav Kumar wrote:
>
> On 1/31/2023 2:18 PM, Douglas Anderson wrote:
> > In commit 7d8e9a90509f ("drm/msm/dsi: move DSI host powerup to modeset
> > time"), we moved powering up DSI hosts to modeset time. This wasn't
> > because it was an elegant design, but
Hi,
On Fri, Jan 27, 2023 at 10:54 AM Abhinav Kumar
wrote:
>
> On 1/13/2023 3:56 PM, Douglas Anderson wrote:
> > In commit 7d8e9a90509f ("drm/msm/dsi: move DSI host powerup to modeset
> > time"), we moved powering up DSI hosts to modeset time. This wasn't
> > because it was an elegant design, but
Hi,
On Thu, Jan 26, 2023 at 9:49 PM Dmitry Baryshkov
wrote:
>
> Hi,
>
> On Sat, 14 Jan 2023 at 01:56, Douglas Anderson wrote:
> >
> > In commit 7d8e9a90509f ("drm/msm/dsi: move DSI host powerup to modeset
> > time"), we moved powering up DSI hosts to modeset time. This wasn't
> > because it was
Hi,
On Fri, Jan 13, 2023 at 3:56 PM Douglas Anderson wrote:
>
> In commit 7d8e9a90509f ("drm/msm/dsi: move DSI host powerup to modeset
> time"), we moved powering up DSI hosts to modeset time. This wasn't
> because it was an elegant design, but there were no better options.
>
> That commit
Hi,
On Wed, Jan 25, 2023 at 9:13 AM Kuogee Hsieh wrote:
>
>
> On 1/19/2023 2:53 PM, Douglas Anderson wrote:
> > The DP AUX interrupt handling was a bit of a mess.
> > * There were two functions (one for "native" transfers and one for
> >"i2c" transfers) that were quite similar. It was hard
Hi,
On Wed, Jan 25, 2023 at 9:22 AM Kuogee Hsieh wrote:
>
> > -void dp_ctrl_isr(struct dp_ctrl *dp_ctrl)
> > +irqreturn_t dp_ctrl_isr(struct dp_ctrl *dp_ctrl)
> > {
> > struct dp_ctrl_private *ctrl;
> > u32 isr;
> > + irqreturn_t ret = IRQ_NONE;
> >
> > if (!dp_ctrl)
> >
Hi,
On Wed, Jan 18, 2023 at 2:34 PM Stephen Boyd wrote:
>
> Quoting Doug Anderson (2023-01-18 10:29:59)
> > Hi,
> >
> > On Tue, Dec 27, 2022 at 6:16 PM Kuogee Hsieh
> > wrote:
> > > +
> > > if (isr & DP_INTR_AUX_ERROR) {
>
Hi,
On Tue, Dec 27, 2022 at 6:16 PM Kuogee Hsieh wrote:
>
> dp_display_irq_handler() is the main isr handler with the helps
> of two sub isr, dp_aux_isr and dp_ctrl_isr, to service all DP
> interrupts on every irq triggered. Current all three isr does
> not return IRQ_HANDLED if there are any
Hi,
On Mon, Jan 9, 2023 at 6:50 PM Jiasheng Jiang wrote:
>
> @@ -1954,9 +1949,8 @@ int msm_dsi_host_init(struct msm_dsi *msm_dsi)
>
> msm_host->irq = irq_of_parse_and_map(pdev->dev.of_node, 0);
> if (msm_host->irq < 0) {
> - ret = msm_host->irq;
>
Hi,
On Thu, Dec 15, 2022 at 1:12 PM Dmitry Baryshkov
wrote:
>
> On 15/12/2022 02:38, Stephen Boyd wrote:
> > Quoting Kuogee Hsieh (2022-12-14 14:56:23)
> >>
> >> On 12/13/2022 3:06 PM, Stephen Boyd wrote:
> >>> Quoting Kuogee Hsieh (2022-12-13 13:44:05)
> Add both data-lanes and
Hi,
On Wed, Dec 14, 2022 at 3:46 PM Abhinav Kumar wrote:
>
> Hi Doug
>
> On 12/14/2022 2:29 PM, Doug Anderson wrote:
> > Hi,
> >
> > On Wed, Dec 14, 2022 at 1:21 PM Kuogee Hsieh
> > wrote:
> >>
> >> There are 3 possible interrupt sources ar
Hi,
On Wed, Dec 14, 2022 at 1:21 PM Kuogee Hsieh wrote:
>
> There are 3 possible interrupt sources are handled by DP controller,
> HPDstatus, Controller state changes and Aux read/write transaction.
> At every irq, DP controller have to check isr status of every interrupt
> sources and service
Hi,
On Tue, Dec 6, 2022 at 10:59 PM Miaoqian Lin wrote:
>
> of_icc_get() alloc resources for path1, we should release it when not
> need anymore. Early return when IS_ERR_OR_NULL(path0) may leak path1.
> Defer getting path1 to fix this.
>
> Fixes: b9364eed9232 ("drm/msm/dpu: Move min BW request
Hi,
On Mon, Dec 5, 2022 at 11:55 PM Miaoqian Lin wrote:
>
> of_icc_get() alloc resources for path1, we should release it when not
> need anymore. Early return when IS_ERR_OR_NULL(path0) may leak path1.
> Add icc_put(path1) in the error path to fix this.
>
> Fixes: b9364eed9232 ("drm/msm/dpu:
Hi,
On Tue, Nov 15, 2022 at 7:55 AM Rob Clark wrote:
>
> From: Rob Clark
>
> This was overlooked.
>
> Signed-off-by: Rob Clark
> ---
> drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 14 +++---
> 1 file changed, 7 insertions(+), 7 deletions(-)
Reviewed-by: Douglas Anderson
Hi,
On Mon, Nov 14, 2022 at 12:50 PM Rob Clark wrote:
>
> From: Rob Clark
>
> If we get an error (other than -ENOENT) we need to propagate that up the
> stack. Otherwise if the nvmem driver hasn't probed yet, we'll end up
> end up claiming that we support all the OPPs which is not likely to be
Hi,
On Mon, Nov 14, 2022 at 11:41 AM Rob Clark wrote:
>
> From: Rob Clark
>
> If we get an error (other than -ENOENT) we need to propagate that up the
> stack. Otherwise if the nvmem driver hasn't probed yet, we'll end up with
> whatever OPP(s) are represented by bit zero.
Can you explain the
Hi,
On Wed, Nov 2, 2022 at 10:23 AM Dmitry Baryshkov
wrote:
>
> > 1. Someone figures out how to model this with the bridge chain and
> > then we only allow HBR3 if we detect we've got a TCPC that supports
> > it. This seems like the cleanest / best but feels like a long pole.
> > Not only have
Hi,
On Wed, Nov 2, 2022 at 10:15 AM Dmitry Baryshkov
wrote:
>
> On 01/11/2022 17:37, Doug Anderson wrote:
> > Hi,
> >
> > On Mon, Oct 31, 2022 at 5:15 PM Dmitry Baryshkov
> > wrote:
> >>
> >> On 01/11/2022 03:08, Doug Anderson wrote:
> >>
Hi,
On Tue, Nov 1, 2022 at 7:37 AM Doug Anderson wrote:
>
> Hi,
>
> On Mon, Oct 31, 2022 at 5:15 PM Dmitry Baryshkov
> wrote:
> >
> > On 01/11/2022 03:08, Doug Anderson wrote:
> > > Hi,
> > >
> > > On Mon, Oct 31, 2022 at 2:11
Hi,
On Mon, Oct 31, 2022 at 5:15 PM Dmitry Baryshkov
wrote:
>
> On 01/11/2022 03:08, Doug Anderson wrote:
> > Hi,
> >
> > On Mon, Oct 31, 2022 at 2:11 PM Kuogee Hsieh
> > wrote:
> >>
> >> Hi Dmitry,
> >>
> >>
> &g
Hi,
On Mon, Oct 31, 2022 at 2:11 PM Kuogee Hsieh wrote:
>
> Hi Dmitry,
>
>
> Link rate is advertised by sink, but adjusted (reduced the link rate)
> by host during link training.
>
> Therefore should be fine if host did not support HBR3 rate.
>
> It will reduce to lower link rate during link
Hi,
On Wed, Sep 14, 2022 at 5:16 AM Kalyan Thota wrote:
>
> Flush mechanism for DSPP blocks has changed in sc7280 family, it
> allows individual sub blocks to be flushed in coordination with
> master flush control.
>
> Representation: master_flush && (PCC_flush | IGC_flush .. etc )
>
> This
Hi,
On Tue, Sep 13, 2022 at 9:58 AM Johan Hovold wrote:
>
> Device-managed resources allocated post component bind must be tied to
> the lifetime of the aggregate DRM device or they will not necessarily be
> released when binding of the aggregate device is deferred.
>
> This can lead resource
Hi,
On Mon, Sep 12, 2022 at 7:10 PM Dmitry Baryshkov
wrote:
>
> On 12/09/2022 18:40, Johan Hovold wrote:
> > Device-managed resources allocated post component bind must be tied to
> > the lifetime of the aggregate DRM device or they will not necessarily be
> > released when binding of the
Hi,
On Wed, Aug 24, 2022 at 1:16 PM Kuogee Hsieh wrote:
>
> At current implementation there is an extra 0 at 1.62G link rate which cause
> no correct pixel_div selected for 1.62G link rate to calculate mvid and nvid.
> This patch delete the extra 0 to have mvid and nvid be calculated correctly.
Hi,
On Mon, Aug 22, 2022 at 11:23 PM Yongqin Liu wrote:
>
> Hi, Douglas
>
> Just an update on the fix you pointed out previously here:
> > > [1]
> > > https://lore.kernel.org/r/20220809142738.1.I91625242f137c707bb345c51c80c5ecee02eeff3@changeid
>
> With it I could boot the hikey960 build to the
Hi,
On Sun, Aug 14, 2022 at 11:46 PM Maxime Ripard wrote:
>
> On Fri, Jul 29, 2022 at 12:57:40PM -0700, Doug Anderson wrote:
> > Hi,
> >
> > On Fri, Jul 29, 2022 at 9:41 AM Maxime Ripard wrote:
> > >
> > > On Fri, Jul 29, 2022 at 07:50:20AM -0700, D
Hi,
On Wed, Jul 20, 2022 at 3:42 PM Doug Anderson wrote:
>
> Hi,
>
> On Wed, Jul 20, 2022 at 1:46 PM Rob Clark wrote:
> >
> > On Fri, Jul 8, 2022 at 8:25 AM Doug Anderson wrote:
> > >
> > > Hi,
> > >
> > > On Wed, Jul 6, 2022 at
Hi,
On Tue, Aug 16, 2022 at 5:58 AM Yongqin Liu wrote:
>
> HI, Douglas
>
> With this change, I get one kernel panic with my hikey960
> android-mainline based Android build,
> if it's reverted, then the build could boot to the home screen successfully.
> From the log information I shared here,
Hi,
On Mon, Aug 8, 2022 at 3:44 AM Kalyan Thota wrote:
>
> >I'd like to land at least patches 6-8 from [1] next cycle. They clean up the
> >CTL
> >interface. Could you please rebase your patch on top of them?
> >
>
> Sure I'll wait for the series to rebase. @Doug can you comment if this is
>
Hi,
On Thu, Aug 4, 2022 at 9:21 AM Robert Foss wrote:
>
> On Fri, 29 Jul 2022 at 02:22, Doug Anderson wrote:
> >
> > Hi,
> >
> > On Mon, Jul 11, 2022 at 5:57 AM Vinod Polimera
> > wrote:
> > >
> > > Changes in v2:
> > >
On Thu, Aug 4, 2022 at 3:29 AM Kalyan Thota wrote:
>
> +static void dpu_hw_ctl_set_dspp_hierarchical_flush(struct dpu_hw_ctl *ctx,
> + enum dpu_dspp dspp, enum dpu_dspp_sub_blk dspp_sub_blk)
> +{
> + uint32_t flushbits = 0, active = 0;
nit: don't init to 0 since you just override
Hi,
On Wed, Aug 3, 2022 at 12:19 AM Dmitry Baryshkov
wrote:
>
> On 03/08/2022 01:37, Douglas Anderson wrote:
> > As of the commit 1de452a0edda ("regulator: core: Allow drivers to
> > define their init data as const") we no longer need to do copying of
> > regulator bulk data from initdata to
Hi,
On Wed, Aug 3, 2022 at 12:32 AM Dmitry Baryshkov
wrote:
>
> > @@ -634,88 +631,71 @@ static int dsi_phy_driver_probe(struct
> > platform_device *pdev)
> > phy->cphy_mode = (phy_type == PHY_TYPE_CPHY);
> >
> > phy->base = msm_ioremap_size(pdev, "dsi_phy", >base_size);
> >
Hi,
On Wed, Aug 3, 2022 at 12:12 AM Dmitry Baryshkov
wrote:
>
> On 03/08/2022 01:37, Douglas Anderson wrote:
> > As of commit 6eabfc018e8d ("regulator: core: Allow specifying an
> > initial load w/ the bulk API") we can now specify the initial load in
> > the bulk data rather than having to
Hi,
On Fri, Jul 29, 2022 at 9:41 AM Maxime Ripard wrote:
>
> On Fri, Jul 29, 2022 at 07:50:20AM -0700, Doug Anderson wrote:
> > On Fri, Jul 29, 2022 at 12:51 AM Maxime Ripard wrote:
> > >
> > > On Thu, Jul 28, 2022 at 02:18:38PM -0700, Doug Anderson wrote:
>
Hi,
On Mon, Jul 11, 2022 at 5:57 AM Vinod Polimera
wrote:
>
> Use atomic variants for DP bridge callback functions so that
> the atomic state can be accessed in the interface drivers.
> The atomic state will help the driver find out if the display
> is in self refresh state.
>
> Signed-off-by:
Hi,
On Mon, Jul 11, 2022 at 5:57 AM Vinod Polimera
wrote:
>
> Changes in v2:
> - Use dp bridge to set psr entry/exit instead of dpu_enocder.
> - Don't modify whitespaces.
> - Set self refresh aware from atomic_check.
> - Set self refresh aware only if psr is supported.
> - Provide a
Hi,
On Mon, Jul 11, 2022 at 5:57 AM Vinod Polimera
wrote:
>
> @@ -359,6 +367,24 @@ void dp_catalog_ctrl_lane_mapping(struct dp_catalog
> *dp_catalog)
> ln_mapping);
> }
>
> +void dp_catalog_ctrl_psr_mainlink_enable(struct dp_catalog *dp_catalog,
> +
Hi,
On Mon, Jul 11, 2022 at 5:57 AM Vinod Polimera
wrote:
>
> Add new helper functions, drm_atomic_get_old_crtc_for_encoder
> and drm_atomic_get_new_crtc_for_encoder to retrieve the
> corresponding crtc for the encoder.
>
> Signed-off-by: Sankeerth Billakanti
> Signed-off-by: Vinod Polimera
>
Hi,
On Mon, Jul 11, 2022 at 5:57 AM Vinod Polimera
wrote:
>
> Update crtc retrieval from dpu_enc to dpu_enc connector state,
> since new links get set as part of the dpu enc virt mode set.
> The dpu_enc->crtc cache is no more needed, hence cleaning it as
> part of this change.
I don't know this
Hi,
On Thu, Jul 28, 2022 at 10:34 AM Abhinav Kumar
wrote:
>
> Hi Rob and Doug
>
> On 7/22/2022 10:36 AM, Rob Clark wrote:
> > On Fri, Jul 22, 2022 at 9:48 AM Doug Anderson wrote:
> >>
> >> Hi,
> >>
> >> On Fri, Jul 22, 2022 at 9:37
Hi,
On Wed, Jul 27, 2022 at 6:59 AM Dmitry Baryshkov
wrote:
>
> On Wed, 27 Jul 2022 at 16:57, Doug Anderson wrote:
> >
> > Hi,
> >
> > On Tue, Jul 26, 2022 at 4:53 PM Abhinav Kumar
> > wrote:
> > >
> > > On 7/25/2022 5:49 PM, Dou
Hi,
On Tue, Jul 26, 2022 at 4:53 PM Abhinav Kumar wrote:
>
> On 7/25/2022 5:49 PM, Douglas Anderson wrote:
> > As of commit 5451781dadf8 ("regulator: core: Only count load for
> > enabled consumers"), a load isn't counted for a disabled
> > regulator. That means all the code in the DSI driver to
Hi,
On Fri, Jul 22, 2022 at 9:37 AM Abhinav Kumar wrote:
>
> + sankeerth
>
> Hi Doug
>
> On 7/21/2022 3:23 PM, Douglas Anderson wrote:
> > The Sharp LQ140M1JW46 panel is on the Qualcomm sc7280 CRD reference
> > board. This panel supports 144 Hz and 60 Hz. In the EDID, the 144 Hz
> > mode is
Hi,
On Thu, Jul 21, 2022 at 7:52 AM Doug Anderson wrote:
>
> Hi,
>
> On Thu, Jul 21, 2022 at 7:39 AM Doug Anderson wrote:
> >
> > > You could add a way to specify constant base loads in DT on either a per
> > > regulator or per consumer basis.
> >
Hi,
On Thu, Jul 21, 2022 at 8:06 AM Mark Brown wrote:
>
> On Thu, Jul 21, 2022 at 07:49:55AM -0700, Doug Anderson wrote:
>
> > Every single LDO on Qualcomm's PMICs seems to be able to be set in
> > "high power mode" and "low power mode", but I think the
Hi,
On Thu, Jul 21, 2022 at 6:25 AM Dmitry Baryshkov
wrote:
>
> > This series breaks USB and PCIe for some SC8280XP and SA540P machines
> > where the DP PHY regulators are shared with other PHYs whose drivers do
> > not request a load.
>
> I'm trying to understand, why does this series cause the
Hi,
On Thu, Jul 21, 2022 at 4:20 AM Mark Brown wrote:
>
> On Thu, Jul 21, 2022 at 12:31:41PM +0200, Johan Hovold wrote:
>
> If you're copying someone into a thread that's not obviously relevant
> for them it's good practice to put a note about it at the top of the
> mail to reduce the chances
Hi,
On Wed, Jul 20, 2022 at 1:46 PM Rob Clark wrote:
>
> On Fri, Jul 8, 2022 at 8:25 AM Doug Anderson wrote:
> >
> > Hi,
> >
> > On Wed, Jul 6, 2022 at 12:14 PM Stephen Boyd wrote:
> > >
> > > Set the panel orientation in drm when the panel i
Hi,
On Mon, Jul 11, 2022 at 10:23 AM Doug Anderson wrote:
>
> Hi,
>
> On Mon, Jul 11, 2022 at 2:21 AM Dmitry Baryshkov
> wrote:
> >
> > Now as the driver does not depend on pdata->connector, add support for
> > attaching the bridge with DRM_BRIDGE_ATTACH_NO
Hi,
On Mon, Jul 11, 2022 at 2:21 AM Dmitry Baryshkov
wrote:
>
> Rather than reading the pdata->connector directly, fetch the connector
> using drm_atomic_state. This allows us to make pdata->connector optional
> (and thus supporting DRM_BRIDGE_ATTACH_NO_CONNECTOR).
>
> Reviewed-by: Sam Ravnborg
Hi,
On Fri, Jul 8, 2022 at 11:00 PM Akhil P Oommen wrote:
>
> Update gpu register array with gpucc memory region.
>
> Signed-off-by: Akhil P Oommen
> ---
>
> (no changes since v1)
>
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 6 --
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff
Hi,
On Fri, Jul 8, 2022 at 11:00 PM Akhil P Oommen wrote:
>
> There are some hardware logic under CX domain. For a successful
> recovery, we should ensure cx headswitch collapses to ensure all the
> stale states are cleard out. This is especially true to for a6xx family
> where we can GMU
Hi,
On Mon, Jul 11, 2022 at 2:21 AM Dmitry Baryshkov
wrote:
>
> Now as the driver does not depend on pdata->connector, add support for
> attaching the bridge with DRM_BRIDGE_ATTACH_NO_CONNECTOR.
>
> Reviewed-by: Sam Ravnborg
> Reviewed-by: Laurent Pinchart
> Signed-off-by: Dmitry Baryshkov
>
Hi,
On Mon, Jul 11, 2022 at 2:21 AM Dmitry Baryshkov
wrote:
>
> Rather than reading the pdata->connector directly, fetch the connector
> using drm_atomic_state. This allows us to make pdata->connector optional
> (and thus supporting DRM_BRIDGE_ATTACH_NO_CONNECTOR).
>
> Reviewed-by: Sam Ravnborg
Hi,
On Mon, Jul 11, 2022 at 9:23 AM Kuogee Hsieh wrote:
>
> Both vdda-1p2-supply and vdda-0p9-supply regulators are controlled
> by dp combo phy. Therefore remove them from dp controller.
>
> Signed-off-by: Kuogee Hsieh
> ---
> arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 2 --
>
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