: e6428bcb611f6c164856a41fc5a1ae8471a9b5a9
change-id: 20240524-msm-drm-dsc-dsi-video-upstream-4-22e2266fbe89
Best regards,
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Neil Armstrong # on SM8650-QRD
Tested-by: Neil Armstrong # on SM8650-HDK
with
https://lore.kernel.org/all/20230728012623.22991-1-quic_parel
select DRM_DISPLAY_HELPER
help
Say Y here if you want to enable support for LG sw43408 panel.
The panel has a 1080x2160@60Hz resolution and uses 24 bit RGB per
Reviewed-by: Neil Armstrong
On 22/05/2024 08:25, Dmitry Baryshkov wrote:
Fix sparse warning regarding symbol 'sw43408_backlight_ops' not being
declared.
Reported-by: kernel test robot
Closes:
https://lore.kernel.org/oe-kbuild-all/202404200739.hbwzvohr-...@intel.com/
Reviewed-by: Neil Armstrong
Fixes: 069a6c0e94f9 (&quo
<0x0 0x03d9e000 0x0 0x1000>,
+ <0x0 0x03d9e000 0x0 0x2000>,
<0x0 0x03d61000 0x0 0x800>;
reg-names = "kgsl_3d0_reg_memory",
"cx_mem",
Reviewed-by: Neil Armstrong
<0x0 0x03d9e000 0x0 0x2000>,
<0x0 0x03d61000 0x0 0x800>;
reg-names = "kgsl_3d0_reg_memory",
"cx_mem",
Reviewed-by: Neil Armstrong
On 12/03/2024 01:20, Konrad Dybcio wrote:
On 2/16/24 12:03, Neil Armstrong wrote:
Add GPU nodes for the SM8650 platform.
Signed-off-by: Neil Armstrong
---
arch/arm64/boot/dts/qcom/sm8650.dtsi | 166 +++
1 file changed, 166 insertions(+)
diff --git a/arch
>dp_display.connector_type, hpd);
- drm_bridge_hpd_notify(bridge, dp->dp_display.link_ready);
+ dp_display_send_hpd_event(>dp_display);
return 0;
}
Tested-by: Neil Armstrong # on SM8650-HDK
On 23/02/2024 15:52, Johan Hovold wrote:
On Fri, Feb 23, 2024 at 03:38:13PM +0100, Neil Armstrong wrote:
On 23/02/2024 15:21, Johan Hovold wrote:
But it is *not* standalone as I tried to explain above.
So you have to drop it again as the later patches depend on it and
cannot be merged
-bridge.h | 15 +
5 files changed, 102 insertions(+), 36 deletions(-)
For the serie:
Acked-by: Neil Armstrong
After an offline discussion, Dmitry, it's ok to push the remaining patches to
drm-misc-fixes.
Thanks,
Neil
On 23/02/2024 15:21, Johan Hovold wrote:
On Fri, Feb 23, 2024 at 02:52:28PM +0100, Neil Armstrong wrote:
On 23/02/2024 13:51, Johan Hovold wrote:
On Fri, Feb 23, 2024 at 12:03:10PM +0100, Neil Armstrong wrote:
On 23/02/2024 12:02, Neil Armstrong wrote:
Thanks, Applied to https
On 23/02/2024 13:51, Johan Hovold wrote:
On Fri, Feb 23, 2024 at 12:03:10PM +0100, Neil Armstrong wrote:
On 23/02/2024 12:02, Neil Armstrong wrote:
Hi,
On Sat, 17 Feb 2024 16:02:22 +0100, Johan Hovold wrote:
Starting with 6.8-rc1 the internal display sometimes fails to come up on
machines
; BIT(PMIC_GLINK_CLIENT_UCSI))
pmic_glink_del_aux_device(pg, >ucsi_aux);
+out_release_pdr_handle:
+ pdr_handle_release(pg->pdr);
return ret;
}
Reviewed-by: Neil Armstrong
On 23/02/2024 12:02, Neil Armstrong wrote:
Hi,
On Sat, 17 Feb 2024 16:02:22 +0100, Johan Hovold wrote:
Starting with 6.8-rc1 the internal display sometimes fails to come up on
machines like the Lenovo ThinkPad X13s and the logs indicate that this
is due to a regression in the DRM subsystem [1
Hi,
On Sat, 17 Feb 2024 16:02:22 +0100, Johan Hovold wrote:
> Starting with 6.8-rc1 the internal display sometimes fails to come up on
> machines like the Lenovo ThinkPad X13s and the logs indicate that this
> is due to a regression in the DRM subsystem [1].
>
> This series fixes a race in the
On 17/02/2024 16:02, Johan Hovold wrote:
The two device node references taken during allocation need to be
dropped when the auxiliary device is freed.
Fixes: 6914968a0b52 ("drm/bridge: properly refcount DT nodes in aux bridge
drivers")
Cc: Dmitry Baryshkov
Cc: Neil Armstrong
On 17/02/2024 16:02, Johan Hovold wrote:
The two device node references taken during allocation need to be
dropped when the auxiliary device is freed.
Fixes: 6914968a0b52 ("drm/bridge: properly refcount DT nodes in aux bridge
drivers")
Cc: Dmitry Baryshkov
Cc: Neil Armstrong
int {
+ remote-endpoint = <_glink_sbu_in>;
+ };
+ };
Nice to see the SBU switching works :-)
Reviewed-by: Neil Armstrong
+ };
};
};
@@ -483,6 +521,15 @@ {
status = "okay";
};
+_dp {
On 19/02/2024 22:37, Konrad Dybcio wrote:
On 19.02.2024 15:49, Dmitry Baryshkov wrote:
On Mon, 19 Feb 2024 at 15:36, Konrad Dybcio wrote:
Enable the A702 GPU (also marketed as "3D accelerator by qcom [1], lol).
Is it not?
Sure, every electronic device is also a heater, I suppose.. I
me_enable(dev);
if (ret)
Reviewed-by: Neil Armstrong
Sync missing regs for A750 clock gating control related registers
from Mesa a6xx.xml.h generated file.
Those registers were added in the !27576 merge request [1].
[1] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27576
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/msm/adreno
-by: Konrad Dybcio
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 2 ++
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 28 +---
drivers/gpu/drm/msm/adreno/adreno_device.c | 14 ++
drivers/gpu/drm/msm/adreno/adreno_gpu.h| 10
Add path of the GPU firmware for the SM8650-QRD board
Reviewed-by: Konrad Dybcio
Signed-off-by: Neil Armstrong
---
arch/arm64/boot/dts/qcom/sm8650-qrd.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
b/arch/arm64/boot/dts/qcom/sm8650
Add GPU nodes for the SM8650 platform.
Signed-off-by: Neil Armstrong
---
arch/arm64/boot/dts/qcom/sm8650.dtsi | 166 +++
1 file changed, 166 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi
b/arch/arm64/boot/dts/qcom/sm8650.dtsi
index
Document the Adreno 750 GMU found on the SM8650 platform.
Reviewed-by: Konrad Dybcio
Acked-by: Conor Dooley
Signed-off-by: Neil Armstrong
---
Documentation/devicetree/bindings/display/msm/gmu.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display
Document the GPU SMMU found on the SM8650 platform.
Signed-off-by: Neil Armstrong
---
Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
b/Documentation/devicetree
The if condition for the SM8[45]50 GPU SMMU is too large,
add the other compatible strings to the condition to only
allow the clocks for the GPU SMMU nodes.
Fixes: 4fff78dc2490 ("dt-bindings: arm-smmu: Document SM8[45]50 GPU SMMU")
Suggested-by: Dmitry Baryshkov
Signed-off-by: Neil
ttps://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26934
Signed-off-by: Neil Armstrong
---
Changes in v3:
- Fixed smmu bindings if condition for GMU smmu
- Collected reviews
- Link to v2:
https://lore.kernel.org/r/20240215-topic-sm8650-gpu-v2-0-6be0b4bf2...@linaro.org
Changes in v2:
- Added sepa
On 15/02/2024 10:32, Dmitry Baryshkov wrote:
On Thu, 15 Feb 2024 at 11:29, Neil Armstrong wrote:
On 15/02/2024 10:25, Dmitry Baryshkov wrote:
On Thu, 15 Feb 2024 at 11:20, Neil Armstrong wrote:
Document the GPU SMMU found on the SM8650 platform.
Signed-off-by: Neil Armstrong
On 15/02/2024 10:25, Dmitry Baryshkov wrote:
On Thu, 15 Feb 2024 at 11:20, Neil Armstrong wrote:
Document the GPU SMMU found on the SM8650 platform.
Signed-off-by: Neil Armstrong
---
Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 7 +--
1 file changed, 5 insertions(+), 2
Sync missing regs for A750 clock gating control related registers
from Mesa a6xx.xml.h generated file.
Those registers were added in the !27576 merge request [1].
[1] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27576
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/msm/adreno
Add path of the GPU firmware for the SM8650-QRD board
Reviewed-by: Konrad Dybcio
Signed-off-by: Neil Armstrong
---
arch/arm64/boot/dts/qcom/sm8650-qrd.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
b/arch/arm64/boot/dts/qcom/sm8650
Add GPU nodes for the SM8650 platform.
Signed-off-by: Neil Armstrong
---
arch/arm64/boot/dts/qcom/sm8650.dtsi | 166 +++
1 file changed, 166 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi
b/arch/arm64/boot/dts/qcom/sm8650.dtsi
index
-by: Neil Armstrong
---
drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 2 ++
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 28 +---
drivers/gpu/drm/msm/adreno/adreno_device.c | 14 ++
drivers/gpu/drm/msm/adreno/adreno_gpu.h| 10 --
4 files changed, 49
Document the GPU SMMU found on the SM8650 platform.
Signed-off-by: Neil Armstrong
---
Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
b/Documentation
ttps://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26934
Signed-off-by: Neil Armstrong
---
Changes in v2:
- Added separate a6xx.xml.h sync from
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27576
- Collected review tags
- Inlined skip_programming
- Use A7XX_RBBM_CGC_P2S_STATUS_TXDONE ins
Document the Adreno 750 GMU found on the SM8650 platform.
Reviewed-by: Konrad Dybcio
Signed-off-by: Neil Armstrong
---
Documentation/devicetree/bindings/display/msm/gmu.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/msm/gmu.yaml
b
On 14/02/2024 22:43, Konrad Dybcio wrote:
On 12.02.2024 15:45, Neil Armstrong wrote:
On 12/02/2024 11:46, Konrad Dybcio wrote:
On 12.02.2024 11:37, Neil Armstrong wrote:
Add support for the A750 GPU found on the SM8650 platform
Unlike the the very close A740 GPU on the SM8550 SoC, the A750
On 12/02/2024 11:46, Konrad Dybcio wrote:
On 12.02.2024 11:37, Neil Armstrong wrote:
Add support for the A750 GPU found on the SM8650 platform
Unlike the the very close A740 GPU on the SM8550 SoC, the A750 GPU
doesn't have an HWCFG block but a separate register set.
The missing registers
On 12/02/2024 11:50, Konrad Dybcio wrote:
On 12.02.2024 11:37, Neil Armstrong wrote:
Add GPU nodes for the SM8650 platform.
Signed-off-by: Neil Armstrong
---
arch/arm64/boot/dts/qcom/sm8650.dtsi | 169 +++
1 file changed, 169 insertions(+)
diff --git a/arch
Hi,
On 12/02/2024 14:32, Dmitry Baryshkov wrote:
On Mon, 12 Feb 2024 at 12:37, Neil Armstrong wrote:
Add path of the GPU firmware for the SM8650-QRD board
Signed-off-by: Neil Armstrong
---
arch/arm64/boot/dts/qcom/sm8650-qrd.dts | 8
1 file changed, 8 insertions(+)
diff --git
Add GPU nodes for the SM8650 platform.
Signed-off-by: Neil Armstrong
---
arch/arm64/boot/dts/qcom/sm8650.dtsi | 169 +++
1 file changed, 169 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi
b/arch/arm64/boot/dts/qcom/sm8650.dtsi
index
Add path of the GPU firmware for the SM8650-QRD board
Signed-off-by: Neil Armstrong
---
arch/arm64/boot/dts/qcom/sm8650-qrd.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts
index 8515498553bf
Document the GPU SMMU found on the SM8650 platform.
Signed-off-by: Neil Armstrong
---
Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
b/Documentation
hwcfg is handled
in a6xx_set_hwcg().
The A750 GPU info are added under the adreno_is_a750() macro and
the ADRENO_7XX_GEN3 family id.
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/msm/adreno/a6xx.xml.h | 8
drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 2 ++
drivers/gpu/drm/msm
Document the Adreno 750 GMU found on the SM8650 platform.
Signed-off-by: Neil Armstrong
---
Documentation/devicetree/bindings/display/msm/gmu.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/msm/gmu.yaml
b/Documentation/devicetree/bindings
ttps://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26934
Signed-off-by: Neil Armstrong
---
Neil Armstrong (5):
dt-bindings: display/msm/gmu: Document Adreno 750 GMU
dt-bindings: arm-smmu: Document SM8650 GPU SMMU
drm: msm: add support for A750 GPU
arm64: dts: qcom: sm8650: add
link clocks\n");
+ drm_dbg_dp(ctrl->drm_dev, "enable link clocks\n");
drm_dbg_dp(ctrl->drm_dev, "stream_clks:%s link_clks:%s core_clks:%s\n",
ctrl->stream_clks_on ? "on" : "off",
ctrl->link_clks_on ? "on" : "off",
Reviewed-by: Neil Armstrong
rent;
- adev->dev.of_node = parent->of_node;
+ adev->dev.of_node = of_node_get(parent->of_node);
adev->dev.release = drm_aux_hpd_bridge_release;
- adev->dev.platform_data = np;
+ adev->dev.platform_data = of_node_get(np);
ret = auxiliary_device_init(adev);
if (ret) {
Reviewed-by: Neil Armstrong
On 11/12/2023 10:50, Konrad Dybcio wrote:
On 11.12.2023 10:46, Dmitry Baryshkov wrote:
On Mon, 11 Dec 2023 at 11:33, Konrad Dybcio wrote:
On 10.12.2023 00:21, Dmitry Baryshkov wrote:
Expand Combo USB+DP QMP PHY device node with the OF ports required to
support USB-C / DisplayPort switching.
On 08/12/2023 04:38, Bjorn Andersson wrote:
On Thu, Dec 07, 2023 at 05:37:19PM +0100, Neil Armstrong wrote:
diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi
b/arch/arm64/boot/dts/qcom/sm8650.dtsi
[..]
+
+ mdss_dp0: displayport-controller@af54000
On 07/12/2023 20:47, Konrad Dybcio wrote:
On 12/7/23 17:37, Neil Armstrong wrote:
Declare the displayport controller present on the Qualcomm SM8650 SoC
and connected to the USB3/DP Combo PHY.
Signed-off-by: Neil Armstrong
---
[...]
+ clocks = < DISP_CC_MDSS_AHB_
Declare the displayport controller present on the Qualcomm SM8650 SoC
and connected to the USB3/DP Combo PHY.
Signed-off-by: Neil Armstrong
---
arch/arm64/boot/dts/qcom/sm8650.dtsi | 120 ++-
1 file changed, 118 insertions(+), 2 deletions(-)
diff --git a/arch
The Qualcomm SM8650 platform comes with a DisplayPort controller
with a different base offset than the previous SM8550 SoC,
add support for this in the DisplayPort driver.
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/msm/dp/dp_display.c | 6 ++
1 file changed, 6 insertions(+)
diff
Document the DisplayPort controller found in the Qualcomm SM8650 SoC,
the Controller base addresses and layout differ and thus cannot use
the SM8350 compatible as fallback.
Signed-off-by: Neil Armstrong
---
Documentation/devicetree/bindings/display/msm/dp-controller.yaml| 1 +
Documentation
to declare the DisplayPort
Controller.
Dependencies:
- DT:
https://lore.kernel.org/all/20231130-topic-sm8650-upstream-dt-v5-0-b25fb781d...@linaro.org/
Signed-off-by: Neil Armstrong
---
Neil Armstrong (3):
dt-bindings: display: msm: dp-controller: document SM8650 compatible
drm/msm/dp
On 08/11/2023 16:58, Laurent Pinchart wrote:
On Wed, Nov 08, 2023 at 04:34:39PM +0100, Maxime Ripard wrote:
On Tue, Nov 07, 2023 at 04:26:34PM +0100, Greg Kroah-Hartman wrote:
On Tue, Nov 07, 2023 at 01:18:14PM +0100, Maxime Ripard wrote:
On Tue, Nov 07, 2023 at 12:22:21PM +0100, Greg
+ * Author: Dmitry Baryshkov
+ */
+#ifndef DRM_AUX_BRIDGE_H
+#define DRM_AUX_BRIDGE_H
+
+#if IS_ENABLED(CONFIG_DRM_AUX_BRIDGE)
+int drm_aux_bridge_register(struct device *parent);
+#else
+static inline int drm_aux_bridge_register(struct device *parent)
+{
+ return 0;
+}
+#endif
+
+#endif
LGTM:
Reviewed-by: Neil Armstrong
idge_register(struct device *parent,
+ struct device_node *np)
+{
+ return 0;
+}
+
+static inline void drm_aux_hpd_bridge_notify(struct device *dev, enum
drm_connector_status status)
+{
+}
+#endif
+
#endif
LGTM:
Acked-by: Neil Armstrong
Hi,
On 28/09/2023 13:35, Dmitry Baryshkov wrote:
From: Konrad Dybcio
Apart from the already handled data bus (MAS_MDP_Pn<->DDR), there are
other connection paths:
- a path that connects rotator block to the DDR.
- a path that needs to be handled to ensure MDSS register access
functions
Document the Mobile Display Subsystem (MDSS) on the SM8650 Platform.
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Neil Armstrong
---
.../bindings/display/msm/qcom,sm8650-mdss.yaml | 322 +
1 file changed, 322 insertions(+)
diff --git
a/Documentation/devicetree
Add Mobile Display Subsystem (MDSS) support for the SM8650 platform.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/msm/msm_mdss.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index
Add DSI Controller version 2.8.0 support for the SM8650 platform.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/msm/dsi/dsi_cfg.c | 17 +
drivers/gpu/drm/msm/dsi/dsi_cfg.h | 1 +
2 files changed, 18 insertions(+)
diff --git a/drivers/gpu/drm
Add DPU version 10.0 support for the SM8650 platform.
Signed-off-by: Neil Armstrong
---
.../drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h| 457 +
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 26 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 1
Add DSI PHY support for the SM8650 platform.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 2 ++
drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 1 +
drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 27 +++
3 files
Document the DPU Display Controller on the SM8650 Platform.
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Neil Armstrong
---
.../bindings/display/msm/qcom,sm8650-dpu.yaml | 127 +
1 file changed, 127 insertions(+)
diff --git a/Documentation/devicetree/bindings
Document the DSI Controller on the SM8650 Platform.
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Neil Armstrong
---
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/msm/dsi
Document the DSI PHY on the SM8650 Platform.
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Neil Armstrong
---
Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml
b
le at:
https://git.codelinaro.org/neil.armstrong/linux/-/tree/topic/sm8650/upstream/integ
Signed-off-by: Neil Armstrong
---
Changes in v2:
- Rebased on top of https://patchwork.freedesktop.org/series/119804/
- Enabled SDMA
- Fixed sm8650_rt_pri_lvl table
- Collected Reviewed-by tags
- Link t
On 25/10/2023 10:03, Dmitry Baryshkov wrote:
On Wed, 25 Oct 2023 at 10:35, Neil Armstrong wrote:
Add DSI PHY support for the SM8650 platform.
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 2 ++
drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 1 +
drivers
On 25/10/2023 09:49, Dmitry Baryshkov wrote:
On Wed, 25 Oct 2023 at 10:35, Neil Armstrong wrote:
Add DPU version 10.0 support for the SM8650 platform.
Signed-off-by: Neil Armstrong
Thanks for your patch. Could you please rebase it on top of
https://patchwork.freedesktop.org/series/119804
Add DSI Controller version 2.8.0 support for the SM8650 platform.
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/msm/dsi/dsi_cfg.c | 17 +
drivers/gpu/drm/msm/dsi/dsi_cfg.h | 1 +
2 files changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c
b/drivers
Add DSI PHY support for the SM8650 platform.
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 2 ++
drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 1 +
drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 27 +++
3 files changed, 30 insertions(+)
diff
Add DPU version 10.0 support for the SM8650 platform.
Signed-off-by: Neil Armstrong
---
.../drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h| 458 +
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 23 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 1
Add Mobile Display Subsystem (MDSS) support for the SM8650 platform.
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/msm/msm_mdss.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index 6865db1e3ce8..33947a2e313c 100644
Document the Mobile Display Subsystem (MDSS) on the SM8650 Platform.
Signed-off-by: Neil Armstrong
---
.../bindings/display/msm/qcom,sm8650-mdss.yaml | 322 +
1 file changed, 322 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/msm/qcom,sm8650
Document the DPU Display Controller on the SM8650 Platform.
Signed-off-by: Neil Armstrong
---
.../bindings/display/msm/qcom,sm8650-dpu.yaml | 127 +
1 file changed, 127 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml
b
Document the DSI Controller on the SM8650 Platform.
Signed-off-by: Neil Armstrong
---
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
b
Document the DSI PHY on the SM8650 Platform.
Signed-off-by: Neil Armstrong
---
Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml
b/Documentation/devicetree/bindings
le at:
https://git.codelinaro.org/neil.armstrong/linux/-/tree/topic/sm85650/upstream/integ
Signed-off-by: Neil Armstrong
---
Neil Armstrong (8):
dt-bindings: display: msm-dsi-phy-7nm: document the SM8650 DSI PHY
dt-bindings: display: msm-dsi-controller-main: document the SM8650 DSI
Control
On 16/10/2023 18:53, Dmitry Baryshkov wrote:
The MIPI DSI links do not fully fall into the DRM callbacks model. The
drm_bridge_funcs abstraction. Instead of having just two states (off and
on) the DSI hosts have separate LP-11 state. In this state the host is
on, but the video stream is not yet
The SM8550 has the SSPP clk_ctrl in the SSPP registers, remove the
duplicate clock controls from the MDP top.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Neil Armstrong
---
.../gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 20
1 file changed, 20 deletions(-)
diff
Enable WB2 hardware block, enabling writeback support on this platform.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1
Now SSPP and WB can have setup_force_clk_ctrl() ops, it's simpler to call
them from the plane and wb code and call into the mdp ops if not present.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Neil Armstrong
---
.../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c| 37
Add an helper to setup the force clock control as it will
be used in multiple HW files.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 23 +--
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c | 21
Starting from SM8550, the SSPP & WB clock controls are moved
the SSPP and WB register range, as it's called "VBIF_CLK_SPLIT"
downstream.
Implement setup_clk_force_ctrl() only starting from major version 9
which corresponds to SM8550 MDSS.
Reviewed-by: Dmitry Baryshkov
Signe
-a -s 40@103:1024x768 -o test.d -P 47@103:1024x768
Signed-off-by: Neil Armstrong
---
Changes in v3:
- Collected reviews
- Add static const to clk_ctrl struct in sspp/wb
- Link to v2:
https://lore.kernel.org/r/20231011-topic-sm8550-graphics-sspp-split-clk-v2-0-b219c945d...@linaro.org
Changes in v2:
On 11/10/2023 14:45, Dmitry Baryshkov wrote:
On Wed, 11 Oct 2023 at 14:59, Neil Armstrong wrote:
Starting from SM8550, the SSPP & WB clock controls are moved
the SSPP and WB register range, as it's called "VBIF_CLK_SPLIT"
downstream.
Implement setup_clk_force_ctrl() only start
Now SSPP and WB can have setup_force_clk_ctrl() ops, it's simpler to call
them from the plane and wb code and call into the mdp ops if not present.
Signed-off-by: Neil Armstrong
---
.../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c| 37 +--
drivers/gpu/drm/msm/disp/dpu1
Enable WB2 hardware block, enabling writeback support on this platform.
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
b
The SM8550 has the SSPP clk_ctrl in the SSPP registers, remove the
duplicate clock controls from the MDP top.
Signed-off-by: Neil Armstrong
---
.../gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 20
1 file changed, 20 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp
Starting from SM8550, the SSPP & WB clock controls are moved
the SSPP and WB register range, as it's called "VBIF_CLK_SPLIT"
downstream.
Implement setup_clk_force_ctrl() only starting from major version 9
which corresponds to SM8550 MDSS.
Signed-off-by: Neil Armstrong
---
drive
Add an helper to setup the force clock control as it will
be used in multiple HW files.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 23 +--
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c | 21
Starting with the SM8550 platform, the SSPP & WB Clock Controls are
no more in the MDP TOP registers, but in the SSPP & WB register space.
Add the corresponding SSPP & WB ops and use them before/after calling the
QoS and OT limit setup functions.
Signed-off-by: Neil Armstrong
---
C
alt_port->bridge.type = DRM_MODE_CONNECTOR_USB;
+ alt_port->bridge.type = DRM_MODE_CONNECTOR_DisplayPort;
ret = devm_drm_bridge_add(dev, _port->bridge);
if (ret) {
Reviewed-by: Neil Armstrong
On 10/10/2023 10:10, Marijn Suijten wrote:
On 2023-10-09 18:36:11, Neil Armstrong wrote:
Starting with the SM8550 platform, the SSPP & WB Clock Controls are
no more in the MDP TOP registers, but in the SSPP & WB register space.
Add the corresponding SSPP & WB ops and use them from
On 09/10/2023 19:10, Dmitry Baryshkov wrote:
On 09/10/2023 19:36, Neil Armstrong wrote:
The SM8550 has the SSPP clk_ctrl in the SSPP registers, move them
out of the MDP top.
Signed-off-by: Neil Armstrong
---
.../gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 35 ++
1
On 09/10/2023 19:10, Dmitry Baryshkov wrote:
On 09/10/2023 19:36, Neil Armstrong wrote:
The SM8550 has the SSPP clk_ctrl in the SSPP registers, move them
out of the MDP top.
Signed-off-by: Neil Armstrong
---
.../gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 35 ++
1
On 09/10/2023 19:07, Dmitry Baryshkov wrote:
On 09/10/2023 19:36, Neil Armstrong wrote:
Now clk_ctrl IDs can be optional and the clk_ctrl_reg can be specified
on the SSPP & WB caps directly, pass the SSPP & WB hw struct to the
qos & limit params then call the clk_force_ctrl() op
The SM8550 has the SSPP clk_ctrl in the SSPP registers, move them
out of the MDP top.
Signed-off-by: Neil Armstrong
---
.../gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 35 ++
1 file changed, 15 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1
Starting from SM8550, the SSPP & WB clock controls are moved
the SSPP and WB register range, as it's called "VBIF_CLK_SPLIT"
downstream.
An optional clk_ctrl struct is added to the SSPP & WB caps,
which can be used by the setup_clk_force_ctrl() op.
Signed-off-by: Neil Armstrong
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