On Mon, Sep 22, 2025 at 9:46 AM Stephan Gerhold
wrote:
>
> On Mon, Sep 22, 2025 at 09:41:07AM -0700, Rob Clark wrote:
> > On Mon, Sep 22, 2025 at 9:33 AM Stephan Gerhold
> > wrote:
> > > On Wed, Jul 23, 2025 at 12:08:49PM -0700, Rob Clark wrote:
> > >
On Mon, Sep 22, 2025 at 9:33 AM Stephan Gerhold
wrote:
>
> Hi Rob,
>
> On Wed, Jul 23, 2025 at 12:08:49PM -0700, Rob Clark wrote:
> > If we hit an error path in GEM obj creation before msm_gem_new_handle()
> > updates obj->resv to point to the gpuvm resv object, then ob
On Fri, Sep 19, 2025 at 11:35 AM Dmitry Baryshkov
wrote:
>
> On Fri, Sep 19, 2025 at 10:24:31PM +0800, Xiangxu Yin wrote:
> > QCS615 platform requires non-default logical-to-physical lane mapping due
> > to its unique hardware routing. Unlike the standard mapping sequence
> > <0 1 2 3>, QCS615 use
Sync from mesa commit 04e2140d8be7 ("freedreno/registers: remove python
3.9 dependency for compiling msm").
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/registers/gen_header.py | 157 +---
1 file changed, 107 insertions(+), 50 deletions(-)
diff --git a/drivers/g
registers: improve reproducibility"), but in a way that was semi-
kernel specific. We can just reduce the divergence between kernel
and mesa by just dropping all of this.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/registers/gen_header.py | 37 +
1 file changed, 1 i
or x1e80100 GPU
Qianfeng Rong (1):
drm/msm/dpu: fix incorrect type for ret
Rob Clark (9):
drm/msm: Fix obj leak in VM_BIND error path
drm/msm: Fix missing VM_BIND offset/range validation
drm/msm: Fix 32b size truncation
drm/msm: Drop unneeded NULL check
dr
On Wed, Sep 10, 2025 at 12:38 PM Dmitry Baryshkov
wrote:
>
> On Tue, Sep 09, 2025 at 10:25:52AM -0700, Rob Clark wrote:
> > On Tue, Sep 9, 2025 at 8:01 AM Dmitry Baryshkov
> > wrote:
> > >
> > > On Mon, Sep 08, 2025 at 12:30:04PM -0700, Rob Clark wrote:
> &
gpu/drm/msm/msm_gem_vma.h
> b/drivers/gpu/drm/msm/msm_gem_vma.h
> new file mode 100644
> index
> ..f702f81529e72b86bffb4960408f1912bc65851a
> --- /dev/null
> +++ b/drivers/gpu/drm/msm/msm_gem_vma.h
> @@ -0,0 +1,105 @@
> +/* SPDX-License-Id
Synced from mesa commit 77c42c1a5752 ("freedreno/registers: Make
TPL1_BICUBIC_WEIGHTS_TABLE an array").
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 10 +-
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 10 +-
drivers/gpu/drm/msm/regist
On Mon, Sep 8, 2025 at 6:39 AM Ryan Eatmon wrote:
>
>
>
> On 9/6/2025 6:24 PM, Rob Clark wrote:
> > On Sat, May 24, 2025 at 10:15 AM Dmitry Baryshkov
> > wrote:
> >>
> >> On Sat, May 24, 2025 at 09:25:37PM +0530, Viswanath Kraleti wrote:
> >>&
On Tue, Sep 9, 2025 at 8:01 AM Dmitry Baryshkov
wrote:
>
> On Mon, Sep 08, 2025 at 12:30:04PM -0700, Rob Clark wrote:
> > Since these generated files are no longer checked in, either in mesa or
> > in the linux kernel, simplify things by dropping the verbose generated
> >
In particular, to pull in a SP_READ_SEL_LOCATION bitfield size fix to
fix a7xx GPU snapshot.
Sync from mesa commit 15ee3873aa4d ("freedreno/registers: Update GMU
register xml").
Cc: Karmjit Mahil
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 8 +-
d
C builders
with missing _HI/LO builders.
So handle the special case of reg64, automatically generating the
missing _HI/LO builders.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/registers/gen_header.py | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/msm/registers/g
Now that https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37216
has synced kernel side changes back to mesa, this completes the round
trip by syncing mesa side changes back to the kernel.
Rob Clark (5):
drm/msm/registers: Remove license/etc from generated headers
drm/msm/registers
On Mon, Sep 8, 2025 at 10:59 AM Ryan Eatmon wrote:
>
>
>
> On 9/8/2025 9:19 AM, Rob Clark wrote:
> > On Mon, Sep 8, 2025 at 6:39 AM Ryan Eatmon wrote:
> >>
> >>
> >>
> >> On 9/6/2025 6:24 PM, Rob Clark wrote:
> >>> On Sat, May 24
On Mon, Sep 8, 2025 at 8:42 AM Akhil P Oommen wrote:
>
> On 9/2/2025 9:25 PM, Rob Clark wrote:
> > On Tue, Sep 2, 2025 at 4:50 AM Akhil P Oommen
> > wrote:
> >>
> >> The drm_gem_for_each_gpuvm_bo() call from lookup_vma() accesses
> >> drm_gem_obj.
In particular, to pull in a SP_READ_SEL_LOCATION bitfield size fix to
fix a7xx GPU snapshot.
Sync from mesa commit 76fece61c6ff ("freedreno/registers: Add A7XX_CX_DBGC")
Cc: Karmjit Mahil
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 10 +-
drivers/g
On Sat, May 24, 2025 at 10:15 AM Dmitry Baryshkov
wrote:
>
> On Sat, May 24, 2025 at 09:25:37PM +0530, Viswanath Kraleti wrote:
> > From: Ryan Eatmon
> >
> > The files generated by gen_header.py capture the source path to the
> > input files and the date. While that can be informative, it varies
On Sat, Sep 6, 2025 at 1:56 PM Akhil P Oommen wrote:
>
> On 9/3/2025 8:44 PM, Konrad Dybcio wrote:
> > On 9/3/25 4:00 PM, Dmitry Baryshkov wrote:
> >> On Wed, Sep 03, 2025 at 03:36:34PM +0200, Konrad Dybcio wrote:
> >>> On 9/3/25 2:39 PM, Dmitry Baryshkov wrote:
> On Wed, Sep 03, 2025 at 02:2
On Sat, Sep 6, 2025 at 11:55 AM Dmitry Baryshkov
wrote:
>
> On Sat, Sep 06, 2025 at 10:05:40AM -0700, Rob Clark wrote:
> > In particular, to pull in a SP_READ_SEL_LOCATION bitfield size fix to
> > fix a7xx GPU snapshot.
> >
> > Sync from mesa commit 76fece61c
On Tue, Sep 2, 2025 at 5:33 AM Konrad Dybcio
wrote:
>
> On 9/2/25 1:50 PM, Akhil P Oommen wrote:
> > It is not obvious why we can skip error checking of
> > dev_pm_opp_find_freq_exact() API. Add a comment explaining it.
> >
> > Signed-off-by: Akhil P Oommen
> > ---
> > drivers/gpu/drm/msm/adreno
On Tue, Sep 2, 2025 at 4:50 AM Akhil P Oommen wrote:
>
> The drm_gem_for_each_gpuvm_bo() call from lookup_vma() accesses
> drm_gem_obj.gpuva.list, which is not initialized when the drm driver
> does not support DRIVER_GEM_GPUVA feature. Enable it for msm_kms
> drm driver to fix the splat seen when
On Tue, Sep 2, 2025 at 5:26 AM wrote:
>
> Hello,
> I am working on making linux for the Xperia X1 (HTC Kovsky) a thing , problem
> is I have implemented a few drivers except for graphics as they are
> undocumented and the android drivers are hard to figure out with decompiling,
> and since your
te global fault counter when faulty process has already ended
Nathan Chancellor (1):
drm/msm/dpu: Initialize crtc_state to NULL in
dpu_plane_virtual_atomic_check()
Rob Clark (15):
drm/msm: Fix build with KMS disabled
drm/msm: Fix pagetables setup/teardown serialization
drm/
On Mon, Aug 25, 2025 at 9:23 AM Akhil P Oommen wrote:
>
> On 8/23/2025 7:46 PM, Rob Clark wrote:
> > On Sat, Aug 23, 2025 at 6:49 AM Dmitry Baryshkov
> > wrote:
> >>
> >> On Sat, Aug 23, 2025 at 02:09:39AM +, Alex Robinson wrote:
> >>> Builds c
> Move op_mode initialization after finalizing all addresses and right
> > before the drm_gpuva_init_from_op() call.
> >
> > Reported-by: Danct12
> > Fixes: 3309323241fb ("drm/gpuvm: Kill drm_gpuva_init()")
> > Suggested-by: Rob Clark
> > Signed-
On Sat, Aug 23, 2025 at 6:49 AM Dmitry Baryshkov
wrote:
>
> On Sat, Aug 23, 2025 at 02:09:39AM +, Alex Robinson wrote:
> > Builds can compile msm-y objects (e.g. msm_gpu_devfreq.o)
> > before adreno_common.xml.h is generated in trees that generate Adreno
> > headers at build time. Make msm-y d
On Sat, Aug 23, 2025 at 6:50 AM Dmitry Baryshkov
wrote:
>
> On Fri, Aug 22, 2025 at 05:14:02PM -0700, Rob Clark wrote:
> > On Fri, Aug 22, 2025 at 5:12 PM Dmitry Baryshkov
> > wrote:
> > >
> > > Since commit 3309323241fb ("drm/gpuvm: Kill drm_gpuv
On Fri, Aug 22, 2025 at 7:09 PM Alex Robinson wrote:
>
> Builds can compile msm-y objects (e.g. msm_gpu_devfreq.o)
> before adreno_common.xml.h is generated in trees that generate Adreno
> headers at build time. Make msm-y depend on the generated headers,
> removing the race.
>
> Signed-off-by: Al
) call.
>
> Reported-by: Danct12
> Fixes: 3309323241fb ("drm/gpuvm: Kill drm_gpuva_init()")
> Suggested-by: Rob Clark
> Signed-off-by: Dmitry Baryshkov
> ---
> drivers/gpu/drm/msm/msm_gem_vma.c | 13 +++--
> 1 file changed, 7 insertions(+), 6 deletions(-)
We need to reject the MAP op if offset+range is larger than the BO size.
Reported-by: Connor Abbott
Fixes: 2e6a8a1fe2b2 ("drm/msm: Add VM_BIND ioctl")
Signed-off-by: Rob Clark
Tested-by: Connor Abbott
---
drivers/gpu/drm/msm/msm_gem_vma.c | 6 ++
1 file changed, 6 insertion
Somehow we never noticed this when arm64 became a thing, many years ago.
v2: also fix npages
Signed-off-by: Rob Clark
Tested-by: Connor Abbott
---
drivers/gpu/drm/msm/msm_gem.c | 21 ++---
drivers/gpu/drm/msm/msm_gem.h | 6 +++---
drivers/gpu/drm/msm
Fixes for a few issues found in vkd3d-proton testing.
Rob Clark (3):
drm/msm: Fix obj leak in VM_BIND error path
drm/msm: Fix missing VM_BIND offset/range validation
drm/msm: Fix 32b size truncation
drivers/gpu/drm/msm/msm_gem.c | 21 ++-
drivers/gpu/drm/msm
If we fail a handle-lookup part way thru, we need to drop the already
obtained obj references.
Fixes: 2e6a8a1fe2b2 ("drm/msm: Add VM_BIND ioctl")
Signed-off-by: Rob Clark
Tested-by: Connor Abbott
---
drivers/gpu/drm/msm/msm_gem_vma.c | 25 +++--
1 file c
On Wed, Aug 20, 2025 at 6:51 AM Connor Abbott wrote:
>
> On Tue, Aug 19, 2025 at 7:29 PM Rob Clark
> wrote:
> >
> > Somehow we never noticed this when arm64 became a thing, many years ago.
> >
> > Signed-off-by: Rob Clark
> > ---
If we fail a handle-lookup part way thru, we need to drop the already
obtained obj references.
Fixes: 2e6a8a1fe2b2 ("drm/msm: Add VM_BIND ioctl")
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gem_vma.c | 25 +++--
1 file changed, 19 insertions(+), 6 deletion
We need to reject the MAP op if offset+range is larger than the BO size.
Reported-by: Connor Abbott
Fixes: 2e6a8a1fe2b2 ("drm/msm: Add VM_BIND ioctl")
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gem_vma.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/g
Fixes for a few issues found in vkd3d-proton testing.
Rob Clark (3):
drm/msm: Fix obj leak in VM_BIND error path
drm/msm: Fix missing VM_BIND offset/range validation
drm/msm: Fix 32b size truncation
drivers/gpu/drm/msm/msm_gem.c | 17 -
drivers/gpu/drm/msm/msm_gem.h
Somehow we never noticed this when arm64 became a thing, many years ago.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gem.c | 17 -
drivers/gpu/drm/msm/msm_gem.h | 6 +++---
2 files changed, 11 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_gem.c b
On Mon, Aug 18, 2025 at 5:10 AM Akhil P Oommen wrote:
>
> On 8/13/2025 6:34 PM, Antonino Maniscalco wrote:
> > When a VM is marked as an usuable we disallow new submissions from it,
> > however submissions that where already scheduled on the ring would still
> > be re-sent.
> >
> > Since this can
12578c075f89 ("drm/msm/gpu: Skip retired submits in recover worker")
> > Signed-off-by: Maíra Canal
> > ---
> >
> > v1 -> v2:
> > https://lore.kernel.org/dri-devel/20250714230813.46279-1-mca...@igalia.com/T/
> >
> > * Don't delete t
On Thu, Aug 14, 2025 at 11:05 PM Dan Carpenter wrote:
>
> On Thu, Aug 14, 2025 at 06:57:35AM -0700, Rob Clark wrote:
> > On Thu, Aug 14, 2025 at 12:06 AM Dan Carpenter
> > wrote:
> > >
> > > On Thu, Aug 14, 2025 at 12:28:31AM +0530, Akhil P Oommen wrote
On Thu, Aug 14, 2025 at 12:06 AM Dan Carpenter wrote:
>
> On Thu, Aug 14, 2025 at 12:28:31AM +0530, Akhil P Oommen wrote:
> > On 8/13/2025 11:18 AM, Dan Carpenter wrote:
> > > On Fri, Aug 08, 2025 at 10:28:38PM +0530, Akhil P Oommen wrote:
> > >> On 8/7/2025 9:23 PM, Dan Carpenter wrote:
> > >>> H
On Tue, Aug 12, 2025 at 1:58 AM Danilo Krummrich wrote:
>
> On 6/29/25 10:12 PM, Rob Clark wrote:
> > + /*
> > + * We mostly want to use DRM_GPUVM_RESV_PROTECTED, except that
> > + * makes drm_gpuvm_bo_evict() a no-op for extobjs (ie. we loose
> > +
On Thu, Aug 7, 2025 at 6:11 AM Sasha Levin wrote:
>
> Split the vmbind case into a separate helper function
> submit_lock_objects_vmbind() to fix objtool warning:
>
> drivers/gpu/drm/msm/msm.o: warning: objtool: submit_lock_objects+0x451:
> sibling call from callable instruction with modified
On Tue, Aug 5, 2025 at 3:56 PM Sasha Levin wrote:
>
> Restructure submit_lock_objects() to use a single loop with break
> statements to fix objtool warning:
>
> drivers/gpu/drm/msm/msm.o: warning: objtool: submit_lock_objects+0x451:
> sibling call from callable instruction with modified stack
: Rob Clark
---
drivers/gpu/drm/msm/msm_gem_vma.c | 41 ---
1 file changed, 37 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_gem_vma.c
b/drivers/gpu/drm/msm/msm_gem_vma.c
index d1f5bb2e0a16..00d0f3b7ba32 100644
--- a/drivers/gpu/drm/msm/msm_gem_vma.c
Fix a couple comments which had become (partially) obsolete or incorrect
with the gpuvm conversion.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gem.h | 2 +-
drivers/gpu/drm/msm/msm_gem_vma.c | 5 +
2 files changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm
On Tue, Aug 5, 2025 at 7:48 AM Danilo Krummrich wrote:
>
> On Tue Aug 5, 2025 at 4:32 PM CEST, Rob Clark wrote:
> > On Tue, Aug 5, 2025 at 2:33 AM Danilo Krummrich wrote:
> >> On Mon Aug 4, 2025 at 11:43 PM CEST, Rob Clark wrote:
> >> > diff --git a/drivers/gpu/
On Tue, Aug 5, 2025 at 2:33 AM Danilo Krummrich wrote:
>
> (Cc: Thomas, Boris, Matt, Alice)
>
> On Mon Aug 4, 2025 at 11:43 PM CEST, Rob Clark wrote:
> > The 'keep' hint on the unmap is only half useful, without being able to
> > link it to a map cb. Instead c
The 'keep' hint on the unmap is only half useful, without being able to
link it to a map cb. Instead combine the two ops into a remap op to
give the driver a chance to figure things out.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/drm_gpuvm.c| 21 +
d
UBMIT).
This series attempts to avoid that by turning an exact-remap into a
remap op instead, where the driver can handle the special case since
it can see both the unmap and map steps at the same time.
Rob Clark (2):
drm/gpuvm: Send in-place re-maps to the driver as remap
drm/msm: Handle in-
Handle the special case of a MAP op simply updating the va flags by
detecting the special case, and skip pgtable updates.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gem_vma.c | 17 +++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm
On Sat, Aug 2, 2025 at 12:49 AM Dan Carpenter wrote:
>
> Hello Rob Clark,
>
> Commit 2e6a8a1fe2b2 ("drm/msm: Add VM_BIND ioctl") from Jun 29, 2025
> (linux-next), leads to the following Smatch static checker warning:
>
> drivers/gpu/drm/msm/msm_gem_vma
We weren't setting the # of captured debugbus blocks.
Reported-by: Connor Abbott
Suggested-by: Connor Abbott
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/a
Later gens have both a PIPE_BR and PIPE_NONE section. The snapshot tool
seems to expect this for x1-85 as well. I guess this was just a bug in
downstream kgsl, which went unnoticed?
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/adreno_gen7_0_0_snapshot.h | 11 +--
drivers
The bitfield positions changed in a7xx.
v2: Don't open-code the bitfield building
v3: Also fix cx_debugbus
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 32 ++-
drivers/gpu/drm/msm/registers/adreno/a6xx.xml | 14 +++-
2 files change
Program the selector _after_ selecting the aperture. This aligns with
the downstream driver, and fixes a case where we were failing to capture
ctx0 regs (and presumably what we thought were ctx1 regs were actually
ctx0).
Suggested-by: Akhil P Oommen
Signed-off-by: Rob Clark
---
drivers/gpu
A bit of divergence from the downstream driver from which these headers
were imported. But no need for these tables not to be const.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 2 +-
drivers/gpu/drm/msm/adreno/adreno_gen7_0_0_snapshot.h | 8
The section names randomly appended _DATA or _ADDR in many cases, and/or
didn't match the reg names. Fix them so crashdec can properly resolve
the section names back to reg names.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h | 38 +--
.../dr
Various fixes I've found so far while ingesting upstream devcore dumps
into internal tools.
Rob Clark (7):
drm/msm: Add missing "location"s to devcoredump
drm/msm: Fix section names and sizes
drm/msm: Fix order of selector programming in cluster snapshot
drm/msm: Constify
This is needed to properly interpret some of the sections.
v2: Fix missing \n
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c
b/drivers/gpu/drm/msm/adreno
On Thu, Jul 31, 2025 at 12:16 PM Connor Abbott wrote:
>
> On Tue, Jul 29, 2025 at 9:40 AM Rob Clark wrote:
> >
> > On Mon, Jul 28, 2025 at 3:15 PM Rob Clark
> > wrote:
> > >
> > > On Mon, Jul 28, 2025 at 2:04 PM Connor Abbott wrote:
> > >
Later gens have both a PIPE_BR and PIPE_NONE section. The snapshot tool
seems to expect this for x1-85 as well. I guess this was just a bug in
downstream kgsl, which went unnoticed?
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/adreno_gen7_0_0_snapshot.h | 11 +--
drivers
We weren't setting the # of captured debugbus blocks.
Reported-by: Connor Abbott
Suggested-by: Connor Abbott
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/a
The bitfield positions changed in a7xx.
v2: Don't open-code the bitfield building
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 11 +--
drivers/gpu/drm/msm/registers/adreno/a6xx.xml | 6 +-
2 files changed, 14 insertions(+), 3 deletions(-)
A bit of divergence from the downstream driver from which these headers
were imported. But no need for these tables not to be const.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 2 +-
drivers/gpu/drm/msm/adreno/adreno_gen7_0_0_snapshot.h | 8
This is needed to properly interpret some of the sections.
v2: Fix missing \n
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c
b/drivers/gpu/drm/msm/adreno
Program the selector _after_ selecting the aperture. This aligns with
the downstream driver, and fixes a case where we were failing to capture
ctx0 regs (and presumably what we thought were ctx1 regs were actually
ctx0).
Suggested-by: Akhil P Oommen
Signed-off-by: Rob Clark
---
drivers/gpu
The section names randomly appended _DATA or _ADDR in many cases, and/or
didn't match the reg names. Fix them so crashdec can properly resolve
the section names back to reg names.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h | 38 +--
.../dr
Various fixes I've found so far while ingesting upstream devcore dumps
into internal tools.
Rob Clark (7):
drm/msm: Add missing "location"s to devcoredump
drm/msm: Fix section names and sizes
drm/msm: Fix order of selector programming in cluster snapshot
drm/msm: Constify
On Mon, Jul 28, 2025 at 3:15 PM Rob Clark wrote:
>
> On Mon, Jul 28, 2025 at 2:04 PM Connor Abbott wrote:
> >
> > On Mon, Jul 28, 2025 at 4:43 PM Rob Clark
> > wrote:
> > >
> > > This is needed to properly interpret some of the sect
On Mon, Jul 28, 2025 at 2:04 PM Connor Abbott wrote:
>
> On Mon, Jul 28, 2025 at 4:43 PM Rob Clark
> wrote:
> >
> > This is needed to properly interpret some of the sections.
> >
> > Signed-off-by: Rob Clark
> > ---
> > drivers/gpu/drm/msm/adreno/a
Later gens have both a PIPE_BR and PIPE_NONE section. The snapshot tool
seems to expect this for x1-85 as well. I guess this was just a bug in
downstream kgsl, which went unnoticed?
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/adreno_gen7_0_0_snapshot.h | 11 +--
drivers
We weren't setting the # of captured debugbus blocks.
Reported-by: Connor Abbott
Suggested-by: Connor Abbott
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/a
The bitfield positions changed in a7xx.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c
b/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c
index
A bit of divergence from the downstream driver from which these headers
were imported. But no need for these tables not to be const.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 2 +-
drivers/gpu/drm/msm/adreno/adreno_gen7_0_0_snapshot.h | 8
The section names randomly appended _DATA or _ADDR in many cases, and/or
didn't match the reg names. Fix them so crashdec can properly resolve
the section names back to reg names.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h | 38 +--
.../dr
Program the selector _after_ selecting the aperture. This aligns with
the downstream driver, and fixes a case where we were failing to capture
ctx0 regs (and presumably what we thought were ctx1 regs were actually
ctx0).
Suggested-by: Akhil P Oommen
Signed-off-by: Rob Clark
---
drivers/gpu
This is needed to properly interpret some of the sections.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c
b/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c
index faca2a0243ab
Various fixes I've found so far while ingesting upstream devcore dumps
into internal tools.
Rob Clark (7):
drm/msm: Add missing "location"s to devcoredump
drm/msm: Fix section names and sizes
drm/msm: Fix order of selector programming in cluster snapshot
drm/msm: Constify
Handle the special case of a MAP op simply updating the va flags by
detecting the special case, and skip pgtable updates.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gem_vma.c | 17 +++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm
The 'keep' hint on the unmap is only half useful, without being able to
link it to a map cb. Instead combine the two ops into a remap op to
give the driver a chance to figure things out.
Signed-off-by: Rob Clark
---
In theory, drivers should treat an unmap+map combined in a remap ste
UBMIT).
This series attempts to avoid that by turning an exact-remap into a
remap op instead, where the driver can handle the special case since
it can see both the unmap and map steps at the same time.
Rob Clark (2):
drm/gpuvm: Send in-place re-maps to the driver as remap
drm/msm: Handle in-
Avoid fd_install() until there are no more potential error paths, to
avoid put_unused_fd() after the fd is made visible to userspace.
Fixes: 03b6becb03c8 ("Merge tag 'drm-msm-next-2025-07-05' into HEAD")
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gem_vma.c | 14 ++
Avoid fd_install() until there are no more potential error paths, to
avoid put_unused_fd() after the fd is made visible to userspace.
Fixes: 68dc6c2d5eec ("drm/msm: Fix submit error-path leaks")
Reported-by: Dan Carpenter
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gem_sub
The first patch fixes an issue that Dan Carpenter reported in
https://lore.kernel.org/all/55953f27-0762-4ef2-8dda-3208b34a5c75@sabinyo.mountain/
and the second fixes the same issue in the more recently introduced
VM_BIND ioctl.
Rob Clark (2):
drm/msm: Defer fd_install in SUBMIT ioctl
drm/msm
m/msm: drm_gpuvm conversion")
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gem_submit.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_gem_submit.c
b/drivers/gpu/drm/msm/msm_gem_submit.c
index 5f8e939a5906..0ac4c199ec93 100644
---
("drm/msm: Add _NO_SHARE flag")
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gem.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c
index 33d3354c6102..958bac4e2768 100644
--- a/drivers/gpu/drm/m
For reasons unknown to me, systemd-udev recently started limiting
max-files to 64k (at least in f42), which exposed some problematic
allocation related error paths.
Rob Clark (2):
drm/msm: Fix refcnt underflow in error path
drm/msm: Fix submit error path cleanup
drivers/gpu/drm/msm
On Wed, Jul 23, 2025 at 3:19 AM Konrad Dybcio
wrote:
>
> On 7/20/25 2:16 PM, Akhil P Oommen wrote:
> > CP_ALWAYS_ON counter falls under GX domain which is collapsed during
> > IFPC. So switch to GMU_ALWAYS_ON counter for any CPU reads since it is
> > not impacted by IFPC. Both counters are clocked
On Tue, Jul 22, 2025 at 12:23 PM Akhil P Oommen
wrote:
>
> On 7/22/2025 9:08 PM, Rob Clark wrote:
> > On Tue, Jul 22, 2025 at 6:50 AM Dmitry Baryshkov
> > wrote:
> >>
> >> On Sun, Jul 20, 2025 at 05:46:13PM +0530, Akhil P Oommen wrote:
> >>> Whe
On Tue, Jul 22, 2025 at 6:33 AM Dmitry Baryshkov
wrote:
>
> On Sun, Jul 20, 2025 at 05:46:06PM +0530, Akhil P Oommen wrote:
> > Since the PDC resides out of the GPU subsystem and cannot be reset in
> > case it enters bad state, utmost care must be taken to trigger the PDC
> > wake/sleep routines i
49cab36ce8409372
> > 100644
> > --- a/drivers/gpu/drm/msm/msm_gpu_devfreq.c
> > +++ b/drivers/gpu/drm/msm/msm_gpu_devfreq.c
> > @@ -4,6 +4,7 @@
> > * Author: Rob Clark
> > */
> >
> > +#include "adreno/adreno_gpu.h&quo
On Fri, Jul 18, 2025 at 6:50 AM Connor Abbott wrote:
>
> If there is a flood of faults then the MMU can become saturated while it
> waits for the kernel to process the first fault and resume it, so that
> the GMU becomes blocked. This is mainly a problem when the kernel reads
> the state of the GP
;)
but got bigger in commit dbbde63c9e9d ("drm/msm: Add PRR support").
Fixes: dbbde63c9e9d ("drm/msm: Add PRR support")
Fixes: b145c6e65eb0 ("drm/msm: Add support to create a local pagetable")
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_iommu.c | 16 +++
This is always set in msm_gpu_init(), and can never be NULL.
Reported-by: Dan Carpenter
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_iommu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/msm_iommu.c b/drivers/gpu/drm/msm/msm_iommu.c
index
On Mon, Jul 14, 2025 at 4:08 PM Maíra Canal wrote:
>
> The global fault counter is no longer used since commit 12578c075f89
> ("drm/msm/gpu: Skip retired submits in recover worker"). Additionally,
> with commit eab7766c79fd ("drm/msm: Remove vram carveout support"), all
> supported devices now hav
On Mon, Jul 14, 2025 at 12:56 PM Doug Anderson wrote:
>
> Hi,
>
> On Mon, Jun 30, 2025 at 9:15 AM Akhil P Oommen
> wrote:
> >
> > On 6/30/2025 9:26 PM, Konrad Dybcio wrote:
> > >
> > >
> > > On 30-Jun-25 15:46, Rob Clark wrote:
> > &g
On Mon, Jul 14, 2025 at 10:36 AM Dale Whinham wrote:
>
> From: Jérôme de Bretagne
>
> The OLED display in the Surface Pro 11 reports a maximum link rate of
> zero in its DPCD, causing it to fail to probe correctly.
>
> The Surface Pro 11's DSDT table contains some XML with an
> "EDPOverrideDPCDCa
1 - 100 of 1813 matches
Mail list logo
