Re: [Freedreno] [v4] drm/msm/disp/dpu1: add support for dspp sub block flush in sc7280

2022-09-11 Thread Stephen Boyd
Quoting Kalyan Thota (2022-09-08 00:26:28) > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c > b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c > index a35ecb6..bbda09a 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c > @@ -307,6

Re: [Freedreno] [v4] drm/msm/disp/dpu1: add support for dspp sub block flush in sc7280

2022-09-08 Thread Dmitry Baryshkov
On 08/09/2022 10:26, Kalyan Thota wrote: Flush mechanism for DSPP blocks has changed in sc7280 family, it allows individual sub blocks to be flushed in coordination with master flush control. Representation: master_flush && (PCC_flush | IGC_flush .. etc ) This change adds necessary support for

[Freedreno] [v4] drm/msm/disp/dpu1: add support for dspp sub block flush in sc7280

2022-09-08 Thread Kalyan Thota
Flush mechanism for DSPP blocks has changed in sc7280 family, it allows individual sub blocks to be flushed in coordination with master flush control. Representation: master_flush && (PCC_flush | IGC_flush .. etc ) This change adds necessary support for the above design. Changes in v1: - Few