On 3/16/2023 9:16 AM, Dmitry Baryshkov wrote:
It is possible to use multirect feature and split source to use the SSPP
to output two consecutive rectangles. This commit brings in this
capability to support wider screen resolutions.
Tested-by: Abhinav Kumar # sc7280
Signed-off-by: Dmitry
On 3/29/2023 8:30 PM, Dmitry Baryshkov wrote:
On 30/03/2023 05:53, Abhinav Kumar wrote:
On 3/16/2023 9:16 AM, Dmitry Baryshkov wrote:
It is possible to use multirect feature and split source to use the SSPP
to output two consecutive rectangles. This commit brings in this
capability to
On 30/03/2023 05:53, Abhinav Kumar wrote:
On 3/16/2023 9:16 AM, Dmitry Baryshkov wrote:
It is possible to use multirect feature and split source to use the SSPP
to output two consecutive rectangles. This commit brings in this
capability to support wider screen resolutions.
Tested-by: Abhinav
On Wed, Mar 29, 2023 at 04:04:44PM +0200, Konrad Dybcio wrote:
> If we fail to initialize the GPU for whatever reason (say we don't
> embed the GPU firmware files in the initrd), the error path involves
> pm_runtime_put_sync() which then calls idle() instead of suspend().
>
> This is suboptimal,
Hi,
On Wed, Mar 29, 2023 at 8:16 AM Vinod Polimera
wrote:
>
>
>
> > -Original Message-
> > From: Stephen Boyd
> > Sent: Monday, March 27, 2023 9:58 PM
> > To: Bjorn Andersson ; Vinod Polimera (QUIC)
> >
> > Cc: dri-de...@lists.freedesktop.org; linux-arm-...@vger.kernel.org;
> >
If we fail to initialize the GPU for whatever reason (say we don't
embed the GPU firmware files in the initrd), the error path involves
pm_runtime_put_sync() which then calls idle() instead of suspend().
This is suboptimal, as it means that we're not going through the
clean shutdown sequence.
> -Original Message-
> From: Stephen Boyd
> Sent: Monday, March 27, 2023 9:58 PM
> To: Bjorn Andersson ; Vinod Polimera (QUIC)
>
> Cc: dri-de...@lists.freedesktop.org; linux-arm-...@vger.kernel.org;
> freedreno@lists.freedesktop.org; devicet...@vger.kernel.org; linux-
>
On 29.03.2023 16:37, Johan Hovold wrote:
> On Wed, Mar 29, 2023 at 04:04:44PM +0200, Konrad Dybcio wrote:
>> If we fail to initialize the GPU for whatever reason (say we don't
>> embed the GPU firmware files in the initrd), the error path involves
>> pm_runtime_put_sync() which then calls
There is a spelling mistake in a dev_error message. Fix it.
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/msm/msm_mdss.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index c15d1e2dc718..7cb301854e64
On Wed, Mar 29, 2023 at 8:48 AM Konrad Dybcio wrote:
>
>
>
> On 29.03.2023 16:37, Johan Hovold wrote:
> > On Wed, Mar 29, 2023 at 04:04:44PM +0200, Konrad Dybcio wrote:
> >> If we fail to initialize the GPU for whatever reason (say we don't
> >> embed the GPU firmware files in the initrd), the
On 29.03.2023 19:30, Rob Clark wrote:
> On Wed, Mar 29, 2023 at 8:48 AM Konrad Dybcio
> wrote:
>>
>>
>>
>> On 29.03.2023 16:37, Johan Hovold wrote:
>>> On Wed, Mar 29, 2023 at 04:04:44PM +0200, Konrad Dybcio wrote:
If we fail to initialize the GPU for whatever reason (say we don't
On Wed, 29 Mar 2023 at 18:48, Konrad Dybcio wrote:
>
>
>
> On 29.03.2023 16:37, Johan Hovold wrote:
> > On Wed, Mar 29, 2023 at 04:04:44PM +0200, Konrad Dybcio wrote:
> >> If we fail to initialize the GPU for whatever reason (say we don't
> >> embed the GPU firmware files in the initrd), the
On 12.02.2023 00:12, Dmitry Baryshkov wrote:
> DSC hw catalog data is not supposed to be changed, so mark it as const
> data.
>
> Signed-off-by: Dmitry Baryshkov
> ---
Reviewed-by: Konrad Dybcio
Konrad
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 4 ++--
>
Some a5xx Adreno devices might need additional power domains to handle
voltage scaling. While we do not (yet) have support for CPR3 providing
voltage scaling, allow specifying MX domain to scale the memory cell
voltage.
Signed-off-by: Dmitry Baryshkov
---
Konrad brought up the topic of scaling the MX domain according to the
OPP changes. Here is my RFC for this functionality. I post it as an RFC
for two reasons:
1) I'm not sure that we should scale MX if we are not scaling main
voltage following the CPR3
2) With this patchset I'm getting the
The GPU on msm8996 is powered on by several power domains. Add
configuration for the GFX CPR and MX domains.
Signed-off-by: Dmitry Baryshkov
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git
For some a5xx Adrenos we have to specify both GX and MX power domains.
GX is used to power up the GPU clocks and logic. MX is used for scaling
voltage of memory cells.
In case the DT specifies several (GX, MX) power domains, none will be
bound by the core. We have to manage GX manually. Also make
Correct the math for slice_last_group_size so that it matches the
calculations downstream.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
Add helpers to calculate det_thresh_flatness and initial_scale_value as
these calculations are defined within the DSC spec.
Signed-off-by: Jessica Zhang
---
include/drm/display/drm_dsc_helper.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/include/drm/display/drm_dsc_helper.h
Use MSM and DRM DSC helper methods.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 18 --
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c
b/drivers/gpu/drm/msm/dsi/dsi_host.c
index
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
index 619926da1441..648c530b5d05 100644
---
Introduce MSM-specific DSC helper methods, as some calculations are
common between DP and DSC.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/Makefile | 1 +
drivers/gpu/drm/msm/disp/msm_dsc_helper.c | 74 +++
change-id: 20230329-rfc-msm-dsc-helper-981a95edfbd0
Best regards,
--
Jessica Zhang
On 30/03/2023 02:18, Jessica Zhang wrote:
Add helpers to calculate det_thresh_flatness and initial_scale_value as
these calculations are defined within the DSC spec.
Signed-off-by: Jessica Zhang
---
include/drm/display/drm_dsc_helper.h | 10 ++
1 file changed, 10 insertions(+)
diff
On 30/03/2023 02:18, Jessica Zhang wrote:
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
index
There are some interop issues seen across a few DP monitors with
HBR3 and herobrine boards where the DP display stays blank with hbr3.
This is still under investigation but in preparation for supporting
higher resolutions, its better to disable HBR3 till the issues are
root-caused as there is
On 30/03/2023 02:18, Jessica Zhang wrote:
Correct the math for slice_last_group_size so that it matches the
calculations downstream.
Signed-off-by: Jessica Zhang
Fixes: c110cfd1753e ("drm/msm/disp/dpu1: Add support for DSC")
Reviewed-by: Dmitry Baryshkov
---
On 3/29/2023 4:31 PM, Dmitry Baryshkov wrote:
On 30/03/2023 02:18, Jessica Zhang wrote:
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
On 3/29/2023 4:25 PM, Dmitry Baryshkov wrote:
On 30/03/2023 02:18, Jessica Zhang wrote:
Add helpers to calculate det_thresh_flatness and initial_scale_value as
these calculations are defined within the DSC spec.
Signed-off-by: Jessica Zhang
---
include/drm/display/drm_dsc_helper.h | 10
On 30/03/2023 02:18, Jessica Zhang wrote:
Use MSM and DRM DSC helper methods.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 18 --
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c
On 30/03/2023 02:45, Jessica Zhang wrote:
On 3/29/2023 4:31 PM, Dmitry Baryshkov wrote:
On 30/03/2023 02:18, Jessica Zhang wrote:
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git
On 30/03/2023 02:18, Jessica Zhang wrote:
Introduce MSM-specific DSC helper methods, as some calculations are
common between DP and DSC.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/Makefile | 1 +
drivers/gpu/drm/msm/disp/msm_dsc_helper.c | 74
On 30/03/2023 02:18, Jessica Zhang wrote:
Introduce MSM-specific DSC helper methods, as some calculations are
common between DP and DSC.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/Makefile | 1 +
drivers/gpu/drm/msm/disp/msm_dsc_helper.c | 74
On Tue, Mar 28, 2023 at 5:38 PM Dmitry Baryshkov
wrote:
>
>
> On Mon, 09 Jan 2023 11:15:17 +0100, Neil Armstrong wrote:
> > This adds support for the MDSS/DPU/DSI on the Qualcomm SM8550 platform.
> >
> > This patchset is based on the SM8450 display support serie at [1].
> >
> > In order to work,
On 13/02/2023 13:18, Dmitry Baryshkov wrote:
On 13/02/2023 13:01, Konrad Dybcio wrote:
On 12.02.2023 00:12, Dmitry Baryshkov wrote:
From: Konrad Dybcio
These blocks are of variable length on different SoCs. Set the
correct values where I was able to retrieve it from downstream
DTs and
On 29/03/2023 22:52, Rob Herring wrote:
On Tue, Mar 28, 2023 at 5:38 PM Dmitry Baryshkov
wrote:
On Mon, 09 Jan 2023 11:15:17 +0100, Neil Armstrong wrote:
This adds support for the MDSS/DPU/DSI on the Qualcomm SM8550 platform.
This patchset is based on the SM8450 display support serie at
On 12.02.2023 00:12, Dmitry Baryshkov wrote:
> Fix several leftover _pp strutures and mark them as const, making all hw
> catalog fit into the rodata section.
>
> Signed-off-by: Dmitry Baryshkov
> ---
Reviewed-by: Konrad Dybcio
Konrad
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 6
On 12.02.2023 00:12, Dmitry Baryshkov wrote:
> UBWC and highest bank settings differ slightly between different DPU
> units of the same generation, while the dpu_caps and dpu_mdp_cfg are
> much more stable. To ease configuration reuse move ubwc_swizzle and
> highest_bank_bit data to separate
On 12.02.2023 00:12, Dmitry Baryshkov wrote:
> Signed-off-by: Dmitry Baryshkov
> ---
> .../msm/disp/dpu1/catalog/dpu_9_0_sm8550.h| 178 +
> .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 181 +-
> 2 files changed, 180 insertions(+), 179 deletions(-)
>
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