There is currently a race condition occuring when accessing
vblank_refcount. Therefore, vblank irq timeouts may occur.
Avoid any vblank irq timeouts by stablizing the use of vblank_refcount.
Changes from prior versions:
v2: - Slightly changed wording of patch #2 commit message
Paloma
To add a missing mutex lock to control vblank irq. To prevent race
conditions when registering/unregistering the irq callback.
Signed-off-by: Paloma Arellano
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 6 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 6 ++
When the irq callback returns a value other than zero,
modify vblank_refcount by performing the inverse
operation of its corresponding if-else condition.
Signed-off-by: Paloma Arellano
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 9 +++--
On Fri, 1 Dec 2023 at 03:41, Paloma Arellano wrote:
>
> There is currently a race condition occuring when accessing
> vblank_refcount. Therefore, vblank irq timeouts may occur.
>
> Avoid any vblank irq timeouts by stablizing the use of vblank_refcount.
>
> Changes from prior versions:
>v2: -
This series drops the frame_count and enable parameters (as they're always
set to the same value). It also sets input_sel=0x1 for INTF.
Signed-off-by: Jessica Zhang
---
Jessica Zhang (2):
drm/msm/dpu: Drop enable and frame_count parameters from
dpu_hw_setup_misr()
drm/msm/dpu: Set
Drop the enable and frame_count parameters from dpu_hw_setup_misr() as they
are always set to the same values.
In addition, replace MISR_FRAME_COUNT_MASK with MISR_FRAME_COUNT as
frame_count is always set to the same value.
Fixes: 7b37523fb1d1 ("drm/msm/dpu: Move MISR methods to dpu_hw_util")
Set the input_sel bit for encoders as it was missed in the initial
implementation.
Reported-by: Rob Clark
Fixes: 91143873a05d ("drm/msm/dpu: Add MISR register support for interface")
Closes: https://gitlab.freedesktop.org/drm/msm/-/issues/39
Signed-off-by: Jessica Zhang
---
There is currently a race condition occuring when accessing
vblank_refcount. Therefore, vblank irq timeouts may occur.
Avoid any vblank irq timeouts by stablizing the use of vblank_refcount.
Changes from prior versions:
v2: - Slightly changed wording of patch #2 commit message
v3: -
On Fri, 1 Dec 2023 at 02:50, Abhinav Kumar wrote:
>
>
>
> On 8/30/2023 5:24 PM, Dmitry Baryshkov wrote:
> > On Thu, 31 Aug 2023 at 01:50, Abhinav Kumar
> > wrote:
> >>
> >> On chipsets where CDM block is not available OR where support has
> >> not been added yet do not allow YUV formats for
On Fri, 1 Dec 2023 at 02:41, Abhinav Kumar wrote:
>
>
>
> On 8/30/2023 5:11 PM, Dmitry Baryshkov wrote:
> > On Thu, 31 Aug 2023 at 01:50, Abhinav Kumar
> > wrote:
> >>
> >> Add an API dpu_encoder_helper_phys_setup_cdm() which can be used by
> >> the writeback encoder to setup the CDM block.
>
On Fri, 1 Dec 2023 at 03:31, Jessica Zhang wrote:
>
> Set the input_sel bit for encoders as it was missed in the initial
> implementation.
>
> Reported-by: Rob Clark
> Fixes: 91143873a05d ("drm/msm/dpu: Add MISR register support for interface")
> Closes:
On Fri, 1 Dec 2023 at 03:31, Jessica Zhang wrote:
>
> Drop the enable and frame_count parameters from dpu_hw_setup_misr() as they
> are always set to the same values.
>
> In addition, replace MISR_FRAME_COUNT_MASK with MISR_FRAME_COUNT as
> frame_count is always set to the same value.
>
> Fixes:
On Fri, 1 Dec 2023 at 03:31, Jessica Zhang wrote:
>
> This series drops the frame_count and enable parameters (as they're always
> set to the same value). It also sets input_sel=0x1 for INTF.
>
> Signed-off-by: Jessica Zhang
> ---
> Jessica Zhang (2):
> drm/msm/dpu: Drop enable and
On Fri, 1 Dec 2023 at 03:41, Paloma Arellano wrote:
>
> When the irq callback returns a value other than zero,
> modify vblank_refcount by performing the inverse
> operation of its corresponding if-else condition.
I think it might be better to follow Bjorn's suggestion: once we have
the lock, we
On Thu, Nov 30, 2023 at 05:40:55PM -0800, Paloma Arellano wrote:
> Add a missing mutex lock to control vblank irq. Thus prevent race
> conditions when registering/unregistering the irq callback.
>
I'm guessing that the mutex is needed because vblank_refcount, while
being an atomic_t, doesn't
On Fri, 1 Dec 2023 at 01:36, Abhinav Kumar wrote:
>
>
>
> On 8/30/2023 5:00 PM, Dmitry Baryshkov wrote:
> > On Thu, 31 Aug 2023 at 01:50, Abhinav Kumar
> > wrote:
> >>
> >> CDM block comes with its own set of registers and operations
> >> which can be done. In-line with other hardware
When the irq callback returns a value other than zero,
modify vblank_refcount by performing the inverse
operation of its corresponding if-else condition.
Signed-off-by: Paloma Arellano
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 9 +++--
Add a missing mutex lock to control vblank irq. Thus prevent race
conditions when registering/unregistering the irq callback.
v2: Slightly changed wording of commit message
v3: Mistakenly did not change wording in last version. It is done now.
Signed-off-by: Paloma Arellano
---
Hi Kuogee,
kernel test robot noticed the following build warnings:
[auto build test WARNING on drm-misc/drm-misc-next]
[also build test WARNING on drm/drm-next drm-exynos/exynos-drm-next
drm-intel/for-linux-next drm-intel/for-linux-next-fixes drm-tip/drm-tip
linus/master v6.7-rc3 next-20231130
Add support for the Adreno 305B GPU that is found in MSM8226(v2) SoC.
Previously this was mistakenly claimed to be supported but using wrong
a configuration.
In MSM8226v1 there's also a A305B but with chipid 0x03000510 which
should work with the same configuration but due to lack of hardware for
Some GPUs like the Adreno A305B has a patchid higher than 9, in this
case 18. Make sure the regexes can account for that.
Signed-off-by: Luca Weiss
---
Documentation/devicetree/bindings/display/msm/gpu.yaml | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git
The msm8226 SoC contains an Adreno 305B. Add a node to configure it.
Signed-off-by: Luca Weiss
---
arch/arm/boot/dts/qcom/qcom-msm8226.dtsi | 40
1 file changed, 40 insertions(+)
diff --git a/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi
| 5 +++
5 files changed, 71 insertions(+), 10 deletions(-)
---
base-commit: 32bbbdc6dbe6ca65a3e3e2ed2ca3c562793e7797
change-id: 20231130-msm8226-gpu-c2ff8473a9ff
Best regards,
--
Luca Weiss
On Thu, Nov 30, 2023 at 1:21 PM Rob Clark wrote:
>
> From: Rob Clark
>
> The UBWC settings need to match between the display and GPU. When we
> updated the GPU settings, we forgot to make the corresponding update on
> the display side.
>
> Reported-by: Steev Klimaszewski
> Fixes: 07e6de738aa6
On 11/30/2023 11:21 AM, Rob Clark wrote:
From: Rob Clark
The UBWC settings need to match between the display and GPU. When we
updated the GPU settings, we forgot to make the corresponding update on
the display side.
Reported-by: Steev Klimaszewski
Fixes: 07e6de738aa6 ("drm/msm/a690: Fix
On 8/30/2023 3:57 PM, Dmitry Baryshkov wrote:
On Thu, 31 Aug 2023 at 01:49, Abhinav Kumar wrote:
Add CDM blocks to the sc7280 dpu_hw_catalog to support
YUV format output from writeback block.
Signed-off-by: Abhinav Kumar
---
.../gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h | 9
Trigger a devcoredump to dump dpu registers and capture the drm atomic
state when the frame_done_timer timeouts.
v2: Optimize the format in which frame_done_timeout_cnt is incremented
v3: Describe parameter frame_done_timeout_cnt in dpu_encoder_virt
Reported-by: kernel test robot
Closes:
On 11/30/2023 2:47 PM, Paloma Arellano wrote:
Trigger a devcoredump to dump dpu registers and capture the drm atomic
state when the frame_done_timer timeouts.
v2: Optimize the format in which frame_done_timeout_cnt is incremented
v3: Describe parameter frame_done_timeout_cnt in
Hi Kuogee,
kernel test robot noticed the following build warnings:
[auto build test WARNING on drm-misc/drm-misc-next]
[also build test WARNING on drm/drm-next drm-exynos/exynos-drm-next
drm-intel/for-linux-next drm-intel/for-linux-next-fixes drm-tip/drm-tip
linus/master v6.7-rc3 next-20231130
Hi Kuogee,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-misc/drm-misc-next]
[also build test ERROR on drm/drm-next drm-exynos/exynos-drm-next
drm-intel/for-linux-next drm-intel/for-linux-next-fixes drm-tip/drm-tip
linus/master v6.7-rc3 next-20231130
From: Rob Clark
The UBWC settings need to match between the display and GPU. When we
updated the GPU settings, we forgot to make the corresponding update on
the display side.
Reported-by: Steev Klimaszewski
Fixes: 07e6de738aa6 ("drm/msm/a690: Fix reg values for a690")
Signed-off-by: Rob Clark
Hi Paloma,
kernel test robot noticed the following build warnings:
[auto build test WARNING on drm-misc/drm-misc-next]
[also build test WARNING on linus/master v6.7-rc3 next-20231130]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest
On 8/30/2023 5:00 PM, Dmitry Baryshkov wrote:
On Thu, 31 Aug 2023 at 01:50, Abhinav Kumar wrote:
CDM block comes with its own set of registers and operations
which can be done. In-line with other hardware sub-blocks, this
change adds the dpu_hw_cdm abstraction for the CDM block.
On 8/30/2023 4:48 PM, Dmitry Baryshkov wrote:
On Thu, 31 Aug 2023 at 01:50, Abhinav Kumar wrote:
Add the RM APIs necessary to initialize and allocate CDM
blocks by the rest of the DPU pipeline.
... to be used by the rest?
Yes, thanks.
Signed-off-by: Abhinav Kumar
---
On 8/30/2023 5:06 PM, Dmitry Baryshkov wrote:
On Thu, 31 Aug 2023 at 01:50, Abhinav Kumar wrote:
Even though there is usually only one CDM block, it can be
used by either HDMI, DisplayPort OR Writeback interfaces.
Hence its allocation needs to be tracked properly by the
resource manager
On 8/30/2023 5:12 PM, Dmitry Baryshkov wrote:
On Thu, 31 Aug 2023 at 01:50, Abhinav Kumar wrote:
CDM block will need its own logic to program the flush and active
bits in the dpu_hw_ctl layer.
Make necessary changes in dpu_hw_ctl to support CDM programming.
Signed-off-by: Abhinav Kumar
On 8/30/2023 5:14 PM, Dmitry Baryshkov wrote:
On Thu, 31 Aug 2023 at 01:50, Abhinav Kumar wrote:
In preparation of setting up CDM block, add the logic to disable it
properly during encoder cleanup.
Signed-off-by: Abhinav Kumar
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 8
_CHIP_IDS(0x0608),
+ .chip_ids = ADRENO_CHIP_IDS(0x06080001),
.family = ADRENO_6XX_GEN2,
.revn = 680,
.fw = {
---
base-commit: 3cd3fe06ff81cfb3a969acb12a56796cff5af23d
change-id: 20231130-adreno-a680-1-639717a53b56
Best regards,
--
Bjorn Andersson
x, 0x0},
+ .safe_lut_tbl = {0xfff0, 0xf000, 0x},
.qos_lut_tbl = {
{.nentry = ARRAY_SIZE(sc7180_qos_linear),
.entries = sc7180_qos_linear
---
base-commit: 3cd3fe06ff81cfb3a969acb12a56796cff5af23d
change-id: 20231130-sc8180x-dpu-safe-lut-ffd0df22
On 8/30/2023 5:11 PM, Dmitry Baryshkov wrote:
On Thu, 31 Aug 2023 at 01:50, Abhinav Kumar wrote:
Add an API dpu_encoder_helper_phys_setup_cdm() which can be used by
the writeback encoder to setup the CDM block.
Currently, this is defined and used within the writeback's physical
encoder
On 8/30/2023 5:23 PM, Dmitry Baryshkov wrote:
On Thu, 31 Aug 2023 at 01:50, Abhinav Kumar wrote:
Reserve CDM blocks for writeback if the format of the output fb
is YUV. At the moment, the reservation is done only for writeback
but can easily be extended by relaxing the checks once other
; {.nentry = ARRAY_SIZE(sc7180_qos_linear),
> .entries = sc7180_qos_linear
>
> ---
> base-commit: 3cd3fe06ff81cfb3a969acb12a56796cff5af23d
> change-id: 20231130-sc8180x-dpu-safe-lut-ffd0df221d67
>
> Best regards,
> --
> Bjorn Andersson
>
On 8/30/2023 5:24 PM, Dmitry Baryshkov wrote:
On Thu, 31 Aug 2023 at 01:50, Abhinav Kumar wrote:
On chipsets where CDM block is not available OR where support has
not been added yet do not allow YUV formats for writeback block.
Signed-off-by: Abhinav Kumar
---
There is currently a race condition occuring when accessing
vblank_refcount. Therefore, vblank irq timeouts may occur.
Avoid any vblank irq timeouts by stablizing the use of vblank_refcount.
Paloma Arellano (2):
drm/msm/dpu: Modify vblank_refcount if error in callback
drm/msm/dpu: Add mutex
When the irq callback returns a value other than zero,
modify vblank_refcount by performing the inverse
operation of its corresponding if-else condition.
Signed-off-by: Paloma Arellano
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 9 +++--
To add a missing mutex lock to control vblank irq. To prevent race
conditions when registering/unregistering the irq callback.
Signed-off-by: Paloma Arellano
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 6 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 6 ++
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