From: Rob Clark
Wire up support to stall the SMMU on iova fault, and collect a devcore-
dump snapshot for easier debugging of faults.
Currently this is a6xx-only, but mostly only because so far it is the
only one using adreno-smmu-priv.
Signed-off-by: Rob Clark
---
From: Rob Clark
Add, via the adreno-smmu-priv interface, a way for the GPU to request
the SMMU to stall translation on faults, and then later resume the
translation, either retrying or terminating the current translation.
This will be used on the GPU side to "freeze" the GPU while we snapshot
From: Jordan Crouse
Use the new adreno-smmu-priv fault info function to get more SMMU
debug registers and print the current TTBR0 to debug per-instance
pagetables and figure out which GPU block generated the request.
Signed-off-by: Jordan Crouse
Signed-off-by: Rob Clark
---
From: Jordan Crouse
Add a callback in adreno-smmu-priv to read interesting SMMU
registers to provide an opportunity for a richer debug experience
in the GPU driver.
Signed-off-by: Jordan Crouse
Signed-off-by: Rob Clark
---
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 17
From: Jordan Crouse
Call report_iommu_fault() to allow upper-level drivers to register their
own fault handlers.
Signed-off-by: Jordan Crouse
Signed-off-by: Rob Clark
Acked-by: Will Deacon
---
drivers/iommu/arm/arm-smmu/arm-smmu.c | 9 +++--
1 file changed, 7 insertions(+), 2
From: Rob Clark
This picks up an earlier series[1] from Jordan, and adds additional
support needed to generate GPU devcore dumps on iova faults. Original
description:
This is a stack to add an Adreno GPU specific handler for pagefaults. The first
patch starts by wiring up report_iommu_fault
On 2021-06-08 16:10, Bjorn Andersson wrote:
On Tue 08 Jun 17:44 CDT 2021, Stephen Boyd wrote:
Quoting Bjorn Andersson (2021-06-08 15:34:01)
> On Tue 08 Jun 17:29 CDT 2021, Stephen Boyd wrote:
>
> > Quoting Bjorn Andersson (2021-06-08 15:26:23)
> > > On Tue 08 Jun 17:15 CDT 2021, Stephen Boyd
Hi Dmitry
I will take a look at this next week for sure.
Thanks
Abhinav
On 2021-06-10 06:48, Dmitry Baryshkov wrote:
On 15/05/2021 16:12, Dmitry Baryshkov wrote:
This patch series brings back several patches targeting assigning
dispcc
clock parents, that were removed from the massive dsi
Hi Dave & Daniel,
A few late fixes for v5.13. This supersedes the previous fixes pull
and adds a fix for a DSI issue which was preventing display from
coming up on coachz.
The following changes since commit f2f46b878777e0d3f885c7ddad48f477b4dea247:
drm/msm/dp: initialize audio_comp when
On Thu 10 Jun 06:46 CDT 2021, Dmitry Baryshkov wrote:
> On 10/06/2021 02:15, Bjorn Andersson wrote:
> > Handling of the interrupt callback lists is done in dpu_core_irq.c,
> > under the "cb_lock" spinlock. When these operations results in the need
> > for enableing or disabling the IRQ in the
On 15/05/2021 16:12, Dmitry Baryshkov wrote:
This patch series brings back several patches targeting assigning dispcc
clock parents, that were removed from the massive dsi rework patchset
earlier.
Gracious ping for this series. I'd ask to skip patch 8 for now (as we
might bring that back for
On 10/06/2021 02:15, Bjorn Andersson wrote:
Handling of the interrupt callback lists is done in dpu_core_irq.c,
under the "cb_lock" spinlock. When these operations results in the need
for enableing or disabling the IRQ in the hardware the code jumps to
dpu_hw_interrupts.c, which protects its
12 matches
Mail list logo
