On 2018-11-16 10:42, Sean Paul wrote:
From: Sean Paul
Matches dpu_crtc_enable and we'll need the old state in a future patch
Changes in v2:
- None
Signed-off-by: Sean Paul
Reviewed-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 5 +++--
1 file changed, 3
.
In a later patch, we'll make use of this further.
Changes in v2:
- None
Cc: Jeykumar Sankaran
Signed-off-by: Sean Paul
Reviewed-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c| 8 +++
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h| 6 +
drivers/gpu/drm/msm/disp
nd add a modeset lock check.
While we're at it, use the encoder mask from crtc state instead of
legacy pointer.
Changes in v2:
- None
Signed-off-by: Sean Paul
Reviewed-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 12 +++-
1 file changed, 3 insertions
Paul
Reviewed-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index 9be24907f8c1..80de5289ada3 100644
--- a/drivers/gpu/drm/msm/disp
On 2018-11-16 10:42, Sean Paul wrote:
From: Sean Paul
Instead of registering through dpu_power_handle just to get a call on
runtime_resume, call the crtc function directly.
Changes in v2:
- None
Signed-off-by: Sean Paul
Reviewed-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1
On 2018-11-16 13:37, Sean Paul wrote:
On Fri, Nov 16, 2018 at 04:35:26PM -0500, Sean Paul wrote:
On Fri, Nov 16, 2018 at 11:22:21AM -0800, Jeykumar Sankaran wrote:
> Add encoder interface to release dpu encoder
> on mode_init failures in kms.
>
> Signed-off-by: Jeyku
On 2018-11-16 13:35, Sean Paul wrote:
On Fri, Nov 16, 2018 at 11:22:21AM -0800, Jeykumar Sankaran wrote:
Add encoder interface to release dpu encoder
on mode_init failures in kms.
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 12 ++--
drivers/gpu
On 2018-11-16 12:02, Sean Paul wrote:
On Thu, Nov 08, 2018 at 02:00:51PM -0800, Jeykumar Sankaran wrote:
On 2018-10-30 09:00, Sean Paul wrote:
> From: Sean Paul
>
> This patch sprinkles a few async/legacy_cursor_update checks
> through commit to ensure that cursor updates ar
On 2018-11-16 10:42, Sean Paul wrote:
From: Sean Paul
Add modeset lock checks to functions that could be called outside the
core atomic stack.
Changes in v2:
- None
Signed-off-by: Sean Paul
---
Reviewed-by: Jeykumar Sankaran
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 ++
drivers/gpu
On 2018-11-16 10:42, Sean Paul wrote:
From: Sean Paul
It's for legacy drivers, for atomic drivers crtc->state->encoder_mask
should be used to map encoder to crtc.
Changes in v2:
- None
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 46
On 2018-11-16 10:42, Sean Paul wrote:
From: Sean Paul
This patch wraps dpu_core_perf_crtc_release_bw() with modeset locks
since it digs into the state objects.
Changes in v2:
- None
Signed-off-by: Sean Paul
---
Reviewed-by: Jeykumar Sankaran
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2
Add display port support in DPU by creating hooks
for DP encoder enumeration and encoder mode
initialization.
This change is based on the SDM845 Display port
driver changes[1].
[1] https://lwn.net/Articles/768265/
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1
Add encoder interface to release dpu encoder
on mode_init failures in kms.
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 12 ++--
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 6 ++
2 files changed, 16 insertions(+), 2 deletions(-)
diff --git
optimization on system wq (Sean Paul)
changes in v3:
- none
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/msm_drv.c | 65 +--
drivers/gpu/drm/msm/msm_drv.h | 7 -
2 files changed, 19 insertions(+), 53 deletions(-)
diff --git a/drivers
performance hits, use system workqueue
to queue requests. A separate patch is submitted later in this
series to remove the display threads altogether.
changes in v2:
- switch to system wq before removing disp threads (Sean Paul)
changes in v3:
- none
Signed-off-by: Jeykumar Sankaran
-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 22 ++
1 file changed, 6 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index 82c55ef..dd7ab85 100644
--- a/drivers
use kthread_destroy_worker to destroy workers and
release their associated kthreads.
changes in v3:
- introduced in the series
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/msm_drv.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm
Since there are no clients using these threads,
cleaning it up.
changes in v2:
- switch all the dependent clients to use system wq
before removing the disp_threads (Sean Paul)
changes in v3:
- none
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/msm_drv.c
On 2018-11-14 12:52, Sean Paul wrote:
On Wed, Nov 14, 2018 at 12:46:32PM -0800, Jeykumar Sankaran wrote:
On 2018-11-14 11:57, Ville Syrjälä wrote:
> On Wed, Nov 14, 2018 at 11:43:51AM -0800, Jeykumar Sankaran wrote:
> > On 2018-11-14 07:16, Sean Paul wrote:
> > > On Tue, Nov
On 2018-11-14 11:57, Ville Syrjälä wrote:
On Wed, Nov 14, 2018 at 11:43:51AM -0800, Jeykumar Sankaran wrote:
On 2018-11-14 07:16, Sean Paul wrote:
> On Tue, Nov 13, 2018 at 04:48:12PM -0800, Jeykumar Sankaran wrote:
>> On 2018-11-13 12:52, Sean Paul wrote:
>> &g
On 2018-11-14 07:16, Sean Paul wrote:
On Tue, Nov 13, 2018 at 04:48:12PM -0800, Jeykumar Sankaran wrote:
On 2018-11-13 12:52, Sean Paul wrote:
> From: Sean Paul
>
> Instead of assigning/clearing the crtc on vblank enable/disable, we
can
> just assign and clear the crt
On 2018-11-14 07:13, Sean Paul wrote:
On Tue, Nov 13, 2018 at 04:47:22PM -0800, Jeykumar Sankaran wrote:
On 2018-11-13 12:52, Sean Paul wrote:
> From: Sean Paul
>
> The indirection of registering a callback and opaque pointer isn't
real
> useful when there's only one callsite
On 2018-11-13 12:52, Sean Paul wrote:
From: Sean Paul
Instead of assigning/clearing the crtc on vblank enable/disable, we can
just assign and clear the crtc on modeset. That allows us to just
toggle
the encoder's vblank interrupts on vblank_enable.
So why is this important? Previously the
On 2018-11-13 12:52, Sean Paul wrote:
From: Sean Paul
It's just for debug output, we don't need it
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 6 --
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 2 --
drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h | 14
On 2018-11-13 12:52, Sean Paul wrote:
From: Sean Paul
The indirection of registering a callback and opaque pointer isn't real
useful when there's only one callsite. So instead of having the
vblank_cb registration, just give encoder a crtc and let it directly
call the vblank handler.
In a
On 2018-11-12 11:42, Sean Paul wrote:
From: Sean Paul
The crtc runtime resume doesn't actually operate on the crtc, but
rather
its encoders. The problem with this is that we need to inspect the crtc
state to get the currently connected encoders. Since runtime resume
isn't guaranteed to be
On 2018-11-12 11:42, Sean Paul wrote:
From: Sean Paul
Add a bool to dpu_encoder_virt to track whether the encoder is enabled
or not. Repurpose the enc_lock mutex to ensure that it is consistent
with the hw state.
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 27
On 2018-11-12 11:42, Sean Paul wrote:
From: Sean Paul
enc_spinlock instead of enc_spin_lock.
Signed-off-by: Sean Paul
---
Reviewed-by: Jeykumar Sankaran
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm
On 2018-11-12 17:06, Jeykumar Sankaran wrote:
On 2018-11-12 11:42, Sean Paul wrote:
From: Sean Paul
power_events are only used for pm_runtime, and that's all handled in
dpu_kms. So just call vbif_init_memtypes at the correct times.
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1
On 2018-11-12 11:42, Sean Paul wrote:
From: Sean Paul
Now that we don't have any event handlers, remove dpu_power_handle!
Signed-off-by: Sean Paul
Reviewed-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/Makefile | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
On 2018-11-12 11:42, Sean Paul wrote:
From: Sean Paul
It's only used in core_perf, so stick it there (and change the name to
reflect that).
Signed-off-by: Sean Paul
---
Reviewed-by: Jeykumar Sankaran
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 34 +--
drivers/gpu
On 2018-11-12 11:42, Sean Paul wrote:
From: Sean Paul
It's needed for struct dss_module_power, and is currently being pulled
in by dpu_power_handle.h
Signed-off-by: Sean Paul
---
Reviewed-by: Jeykumar Sankaran
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 +
1 file changed, 1 insertion
On 2018-11-12 11:42, Sean Paul wrote:
From: Sean Paul
It's unused
Signed-off-by: Sean Paul
---
Reviewed-by: Jeykumar Sankaran
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 3 ---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h | 5 -
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
On 2018-11-12 11:42, Sean Paul wrote:
From: Sean Paul
Instead of registering through dpu_power_handle just to get a call on
runtime_resume, call the crtc function directly.
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 23 ++-
On 2018-11-12 11:42, Sean Paul wrote:
From: Sean Paul
power_events are only used for pm_runtime, and that's all handled in
dpu_kms. So just call vbif_init_memtypes at the correct times.
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 21 +++--
On 2018-11-12 11:42, Sean Paul wrote:
From: Sean Paul
power_events are only used for pm_runtime, and that's all handled in
dpu_kms. So just call vbif_init_memtypes at the correct times.
Signed-off-by: Sean Paul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 21 +++--
On 2018-11-12 11:42, Sean Paul wrote:
From: Sean Paul
There's only one client -- core, and it's only used for runtime pm
which
is already refcounted.
Signed-off-by: Sean Paul
Reviewed-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 22 +
drivers/gpu/drm
On 2018-11-12 11:42, Sean Paul wrote:
From: Sean Paul
Signed-off-by: Sean Paul
---
Reviewed-by: Jeykumar Sankaran
drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h | 21 -
1 file changed, 21 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
b/drivers/gpu
On 2018-11-12 11:42, Sean Paul wrote:
From: Sean Paul
It's only used for debugfs, so just output the enum value instead.
Signed-off-by: Sean Paul
---
Reviewed-by: Jeykumar Sankaran
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 6 ++
drivers/gpu/drm/msm/disp/dpu1
On 2018-11-08 13:40, Sean Paul wrote:
On Thu, Nov 08, 2018 at 01:03:03PM -0800, Jeykumar Sankaran wrote:
On 2018-10-30 09:00, Sean Paul wrote:
> From: Sean Paul
>
> This patch masks any pending flushes which have not been latched for a
> commit. This will catch the case where an
On 2018-11-01 12:09, Sean Paul wrote:
On Wed, Oct 31, 2018 at 05:19:04PM -0700, Jeykumar Sankaran wrote:
DPU was using one thread per display to dispatch async
commits and vblank requests. Since clean up already happened
in msm to use the common thread for all the display commits,
display
On 2018-10-30 09:00, Sean Paul wrote:
From: Sean Paul
This patch sprinkles a few async/legacy_cursor_update checks
through commit to ensure that cursor updates aren't blocked on vsync.
There are 2 main components to this, the first is that we don't want to
wait_for_commit_done in msm_atomic
On 2018-10-30 09:00, Sean Paul wrote:
From: Sean Paul
This patch masks any pending flushes which have not been latched for a
commit. This will catch the case where an asynchronous update is
nullified by a disable in the same frame.
Changes in v2:
- Added to the set
Signed-off-by: Sean Paul
bit for the disabled plane. Since the bit remains active,
pending_kickoff_cnt will never decrement and we'll miss frame_done
events.
This patch limits the check of flush_register to include only those
bits
which have been updated with the latest commit.
Changes in v2:
- None
Reviewed-by: Jeykumar Sank
msm is using system wq for dispatching commit and vblank
events. Switch idle power collapse feature also to use
system wq to handle delayed work handlers so that
msm can get rid of redundant display threads.
changes in v2:
- patch introduced in v2
Signed-off-by: Jeykumar Sankaran
Since there are no clients using these threads,
cleaning it up.
changes in v2:
- switch all the dependent clients to use system wq
before removing the disp_threads (Sean Paul)
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/msm_drv.c | 35
-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/msm_drv.c | 36 +---
1 file changed, 17 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index 9c9f7ff..e913059 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b
performance hits, use system workqueue
to queue requests. A separate patch is submitted later in this
series to remove the display threads altogether.
changes in v2:
- switch to system wq before removing disp threads (Sean Paul)
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm
optimization on system wq (Sean Paul)
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/msm_drv.c | 67 +--
drivers/gpu/drm/msm/msm_drv.h | 7 -
2 files changed, 20 insertions(+), 54 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers
On 2018-11-05 09:24, Sean Paul wrote:
On Fri, Nov 02, 2018 at 04:38:48PM -0700, Jeykumar Sankaran wrote:
On 2018-11-01 12:18, Sean Paul wrote:
> On Wed, Oct 31, 2018 at 05:19:05PM -0700, Jeykumar Sankaran wrote:
> > msm maintains a separate structure to define vblank
> > w
On 2018-11-01 12:18, Sean Paul wrote:
On Wed, Oct 31, 2018 at 05:19:05PM -0700, Jeykumar Sankaran wrote:
msm maintains a separate structure to define vblank
work definitions and a list to track events submitted
to the display worker thread. We can avoid these
redundant list and its protection
On 2018-11-01 12:09, Sean Paul wrote:
On Wed, Oct 31, 2018 at 05:19:04PM -0700, Jeykumar Sankaran wrote:
DPU was using one thread per display to dispatch async
commits and vblank requests. Since clean up already happened
in msm to use the common thread for all the display commits,
display
Add mdss, dsi, dsi_phy, dsi pinctrl and truly nt35597 panel nodes to
sdm845 MTP board dtsi.
Changes in v4:
- patch introduced in the series
- move around added nodes to preserve alphabetical order (Doug Anderson)
Signed-off-by: Jeykumar Sankaran
---
arch/arm64/boot/dts/qcom
and Regards,
Jeykumar S.
Changes in v4:
- changes to add pinctrl nodes to SoC dts and display nodes to MTP
are included in the series
- clock name clean up in dsi nodes
- move around added nodes to maintain naming orders
Jeykumar Sankaran (3):
arm64: dts: qcom: sdm845
Add dsi active/suspend pinctrl nodes to sdm845 SoC dts.
Changes in v4:
- patch introduced in the series
Signed-off-by: Jeykumar Sankaran
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b
- remove _clk suffix from dsi clocks
(both the comments are from Doug Anderson)
Signed-off-by: Jeykumar Sankaran
Signed-off-by: Sean Paul
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 191 +++
1 file changed, 191 insertions(+)
diff --git a/arch/arm64/boot
Add mdss, dsi, dsi_phy, dsi pinctrl and truly nt35597 panel nodes to
sdm845 MTP board dtsi.
Signed-off-by: Jeykumar Sankaran
---
arch/arm64/boot/dts/qcom/sdm845-mtp.dts | 124
1 file changed, 124 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845
Add dsi active/suspend pinctrl nodes to sdm845 SoC dts.
Signed-off-by: Jeykumar Sankaran
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index dd612ac
On 2018-11-02 07:30, Jordan Crouse wrote:
Devices that are bound as components should not use devm since
device managed memory is not freed when the component is
unbound.
In particular this is an issue if the component bind fails
due to an -EPROBE_DEFER. In this case the bind would try again
On 2018-11-01 23:17, Jayant Shekhar wrote:
In case of msm drm bind failure, dpu_mdss_destroy is triggered.
In this function, resources are freed and pm runtime disable is
called, which triggers dpu_mdss_disable. Now in dpu_mdss_disable,
driver tries to access a memory which is already freed.
and Regards,
Jeykumar S.
Jeykumar Sankaran (1):
arm64: dts: qcom: sdm845: Add dpu to sdm845 dts file
arch/arm64/boot/dts/qcom/sdm845.dtsi | 191 +++
1 file changed, 191 insertions(+)
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum
)
- Use assigned-clocks to set initial clock frequency(Rob H)
Changes in v3:
- added IOMMU node
- Fix device naming (remove _phys)
- Use correct IRQ_TYPE in interrupt specifiers
Signed-off-by: Jeykumar Sankaran
Signed-off-by: Sean Paul
---
arch/arm64/boot/dts/qcom
msm maintains a separate structure to define vblank
work definitions and a list to track events submitted
to the display worker thread. We can avoid these
redundant list and its protection mechanism, if we
subclass the work object to encapsulate vblank
event parameters.
Signed-off-by: Jeykumar
hits.
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 6 +---
drivers/gpu/drm/msm/msm_drv.c | 50 -
drivers/gpu/drm/msm/msm_drv.h | 2 +-
3 files changed, 23 insertions(+), 35 deletions(-)
diff --git
On 2018-10-09 23:28, Jeykumar Sankaran wrote:
On 2018-10-09 14:06, Sean Paul wrote:
On Mon, Oct 08, 2018 at 09:27:24PM -0700, Jeykumar Sankaran wrote:
DPU maintained reservation lists to cache assigned
HW blocks for the display and a retrieval mechanism for
the individual DRM components
(Sean Paul)
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/msm_drv.c | 49 ++-
1 file changed, 16 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index 4904d0d..dcff812 100644
On 2018-10-10 08:06, Sean Paul wrote:
On Mon, Oct 08, 2018 at 09:27:31PM -0700, Jeykumar Sankaran wrote:
RM was using encoder id's to tag HW block's to reserve
and retrieve later for display pipeline. Now
that all the reserved HW blocks for a display are
maintained in its crtc state
On 2018-10-10 07:36, Sean Paul wrote:
On Tue, Oct 09, 2018 at 11:03:24PM -0700, Jeykumar Sankaran wrote:
On 2018-10-09 12:57, Sean Paul wrote:
> On Mon, Oct 08, 2018 at 09:27:41PM -0700, Jeykumar Sankaran wrote:
> > Since HW reservations are happening through atomic_check
&g
On 2018-10-10 07:29, Sean Paul wrote:
On Tue, Oct 09, 2018 at 10:46:41PM -0700, Jeykumar Sankaran wrote:
On 2018-10-09 11:07, Sean Paul wrote:
> On Mon, Oct 08, 2018 at 09:27:18PM -0700, Jeykumar Sankaran wrote:
> > Layer mixer/pingpong block counts and hw ctl block counts
> > w
On 2018-10-10 10:15, Chandan Uddaraju wrote:
These patches add support for Display-Port driver on SnapDragon 845
hardware. It adds
DP driver and DP PLL driver files along with the needed device-tree
bindings.
The block diagram of DP driver is shown below:
+-+
On 2018-10-09 14:06, Sean Paul wrote:
On Mon, Oct 08, 2018 at 09:27:24PM -0700, Jeykumar Sankaran wrote:
DPU maintained reservation lists to cache assigned
HW blocks for the display and a retrieval mechanism for
the individual DRM components to query their respective
HW blocks.
This patch uses
On 2018-10-09 13:41, Sean Paul wrote:
On Mon, Oct 08, 2018 at 09:27:39PM -0700, Jeykumar Sankaran wrote:
Instead of letting encoder make a centralized reservation for
all of its display DRM components, this path splits the
responsibility between CRTC and Encoder, each requesting
RM for the HW
On 2018-10-09 12:57, Sean Paul wrote:
On Mon, Oct 08, 2018 at 09:27:41PM -0700, Jeykumar Sankaran wrote:
Since HW reservations are happening through atomic_check
and all the display commits are catered by a single commit thread,
it is not necessary to protect the interfaces by a separate
mutex
On 2018-10-09 11:07, Sean Paul wrote:
On Mon, Oct 08, 2018 at 09:27:18PM -0700, Jeykumar Sankaran wrote:
Layer mixer/pingpong block counts and hw ctl block counts
will not be same for all the topologies (e.g. layer
mixer muxing to single interface)
Use the encoder's split_role info to retrieve
On 2018-10-04 11:09, Sean Paul wrote:
From: Sean Paul
They're not needed.
Signed-off-by: Sean Paul
---
Reviewed-by: Jeykumar Sankaran
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 13 +
1 file changed, 1 insertion(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp
ted-by: Doug Anderson
Signed-off-by: Sean Paul
---
With the nit addressed:
Reviewed-by: Jeykumar Sankaran
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
b/drivers/gpu/drm/msm/disp/d
On 2018-10-09 09:50, Jordan Crouse wrote:
On Mon, Oct 08, 2018 at 09:27:35PM -0700, Jeykumar Sankaran wrote:
we don't have enough reasons why the HW block looping's
cannot happen in the same function. So merge them.
looping's -> looping. So there are reasons one might break them
On 2018-10-09 07:24, Sean Paul wrote:
On Mon, Oct 08, 2018 at 04:55:45PM -0700, Jeykumar Sankaran wrote:
While creating display and event threads per crtc, validate
them before setting their priorities.
changes in v2:
- use dev_warn (Abhinav Kumar)
changes in v3:
- fix
Move and maintain RM initialization flag checks
from KMS to RM.
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 6 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 12
drivers/gpu/drm/msm/disp/dpu1
RM was using encoder id's to tag HW block's to reserve
and retrieve later for display pipeline. Now
that all the reserved HW blocks for a display are
maintained in its crtc state, no retrieval is needed.
This patch cleans up RM of encoder id tagging.
Signed-off-by: Jeykumar Sankaran
---
drivers
Replacing with simpler linked list helper iterators.
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 120 +
1 file changed, 46 insertions(+), 74 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
b/drivers/gpu/drm/msm
Since HW reservations are happening through atomic_check
and all the display commits are catered by a single commit thread,
it is not necessary to protect the interfaces by a separate
mutex.
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 24
we don't have enough reasons why the HW block looping's
cannot happen in the same function. So merge them.
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 63 ++
1 file changed, 26 insertions(+), 37 deletions(-)
diff --git a/drivers
Get rid of hw block pointer in RM iter as we can
access the same through dpu_hw_blk.
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 10 ++
1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
b/drivers/gpu
This flag was introduced as a fix to notify modeset complete
when hw reservations were happening in both atomic_check
and atomic_commit paths. Now that we are reserving only in
atomic_check, we can get rid of this flag.
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1
Validate layer mixer pairs for compatibility before retrieving
the connected pingpong blocks.
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 61 ++
1 file changed, 17 insertions(+), 44 deletions(-)
diff --git a/drivers/gpu/drm/msm
the assigned HW blocks for providing the info,
we can conveniently get rid of this structure.
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 29 --
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 82 -
drivers/gpu/drm/msm/disp/dpu1
Instead of letting encoder make a centralized reservation for
all of its display DRM components, this path splits the
responsibility between CRTC and Encoder, each requesting
RM for the HW mapping of its own domain.
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
We cleaned up RM reserve api's enough to get rid of
most of its unwanted checks and release handlers. To
improve further the readability of the function, merging
down the individual HW type allocators into one function.
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
.
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 13 +++--
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 4 +---
3 files changed, 5 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/msm
hw_mdp block is common for displays. No need
to reserve per display.
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 7 ++-
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 20
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 10 --
3 files
Not used. Remove from RM.
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 3 +--
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 7 ++-
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 6 +-
3 files changed, 4 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu
Unused variable in the driver.
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 12
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 2 --
2 files changed, 14 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
b/drivers/gpu/drm/msm/disp/dpu1
Definition was removed already. Clean up header declaration.
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 8
1 file changed, 8 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
index f41fd19
the support from RM. Replace rsvp with the corresponding
encoder id to tag the HW blocks reserved.
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 284 +
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 4 -
2 files changed, 43 insertions(+), 245
struct dpu_hw_blk has hw block type info. Remove duplicate
type tracking in struct dpu_rm_hw_blk.
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 17 -
1 file changed, 4 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1
Layer mixer/pingpong block counts and hw ctl block counts
will not be same for all the topologies (e.g. layer
mixer muxing to single interface)
Use the encoder's split_role info to retrieve the
respective control path for programming.
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm
Not actively used. Clean up the crtc mixer struct.
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 --
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 2 --
2 files changed, 4 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
b/drivers/gpu/drm/msm
Usage of hw block iterators are only RM internal. Instead
of using generic void pointers for HW blocks, use dpu
specific structure. It helps us to get rid of duplicate
hw block id's maintained in RM wrapper.
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 27
HW blocks reserved for a display are stored in crtc state.
No one outside RM is interested in using these API's for
HW block list iterations.
Signed-off-by: Jeykumar Sankaran
---
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 37 ++-
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 46
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