Re: [Freedreno] [PATCH v3 1/9] drm/msm/dpu: fix SSPP register definitions

2023-05-24 Thread Jeykumar Sankaran
On 5/18/2023 3:22 PM, Dmitry Baryshkov wrote: Reorder SSPP register definitions to sort them in the ascending order. Move register bitfields after the register definitions. Signed-off-by: Dmitry Baryshkov --- Reviewed-by: Jeykumar Sankaran drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c |

[Freedreno] [PATCH v3 1/9] drm/msm/dpu: fix SSPP register definitions

2023-05-18 Thread Dmitry Baryshkov
Reorder SSPP register definitions to sort them in the ascending order. Move register bitfields after the register definitions. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 64 ++--- 1 file changed, 32 insertions(+), 32 deletions(-) diff