On Wed, May 23, 2018 at 12:30:57PM -0700, Jeykumar Sankaran wrote:
> This change removes all the dpu plane custom properties
> and its handlers.
>
> Signed-off-by: Jeykumar Sankaran
> ---
> Makefile |2 +-
> drivers/gpu/drm/msm/Makefile
On Wed, May 23, 2018 at 12:31:00PM -0700, Jeykumar Sankaran wrote:
> Remove dpu crtc custom properties and its handlers.
>
> Signed-off-by: Jeykumar Sankaran
Reviewed-by: Sean Paul
> ---
> drivers/gpu/drm/msm/Makefile | 1 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
On Wed, May 23, 2018 at 03:21:15PM -0600, Jordan Crouse wrote:
> On Wed, May 23, 2018 at 12:30:59PM -0700, Jeykumar Sankaran wrote:
> > Replace custom plane zpos property with drm core zpos
> > property. CRTC relies on the normalized zpos values
> > to configure blend stages of each plane.
> >
>
On Wed, May 23, 2018 at 12:30:59PM -0700, Jeykumar Sankaran wrote:
> Replace custom plane zpos property with drm core zpos
> property. CRTC relies on the normalized zpos values
> to configure blend stages of each plane.
>
> Signed-off-by: Jeykumar Sankaran
> ---
>
On Wed, May 23, 2018 at 12:31:01PM -0700, Jeykumar Sankaran wrote:
> Remove hand rolled msm property caching to handle DPU
> custom properties. This change also cleans up all its
> dependencies to cache and restore respective drm
> states.
>
> Signed-off-by: Jeykumar Sankaran
Reviewed-by: Sean
Convert some MASK/SHIFT "registers" into bitmasks, correct the bit positions
for GMU_SPTPRAC_PWR_CLK_STATUS and add a few more definitions.
---
rnndb/adreno/a6xx.xml | 134 ++
rnndb/adreno/a6xx_gmu.xml | 4 +-
2 files changed, 79 insertions(+), 59
Document the bindings used for the sn65dsi86 DSI to eDP bridge.
Changes in v1:
- Rephrase the dt-binding descriptions to be more inline with existing
bindings (Andrzej Hajda).
- Add missing dt-binding that are parsed by corresponding driver
(Andrzej Hajda).
Changes in v2:
- Remove edp
Add support for Innolux TV123WAM, which is a 12.3" eDP
display panel with 2160x1440 resolution.
Changes in v1:
- Add the compatibility string, display_mode and panel_desc
structures in alphabetical order (Sean Paul).
Signed-off-by: Sandeep Panda
---
drivers/gpu/drm/panel/panel-simple.c |
Add support for the A6XX family of Adreno GPUs. The biggest addition
is the GMU (Graphics Management Unit) which takes over most of the
power management of the GPU itself but in a ironic twist of fate
needs a goodly amount of management itself. Add support for the
A6XX core code, the GMU and the
Add a helper function to parse the clock names and set up
the bulk data so we can take advantage of the bulk clock
functions instead of rolling our own. This is added
as a helper function so the upcoming a6xx GMU code can
also take avantage of it.
Signed-off-by: Jordan Crouse
---
From: Sharat Masetty
Add initial register headers for A6XX targets.
Signed-off-by: Sharat Masetty
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/msm/adreno/a6xx.xml.h | 1784 +
drivers/gpu/drm/msm/adreno/a6xx_gmu.xml.h | 382 +
2 files changed, 2166
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