Add bindings doc for Qcom's smmu-v2 implementation.
Signed-off-by: Vivek Gautam
Reviewed-by: Tomasz Figa
Tested-by: Srinivas Kandagatla
Reviewed-by: Rob Herring
Reviewed-by: Robin Murphy
---
Changes since v18:
None.
.../devicetree/bindings/iommu/arm,smmu.txt | 39
From: Sricharan R
Enable pm-runtime on devices that implement a pm domain. Then,
add pm runtime hooks to several iommu_ops to power cycle the
smmu device for explicit TLB invalidation requests, and
register space accesses, etc.
We need these hooks when the smmu, linked to its master through
Changes since v18:
- Addressing Stephen's comment [5]:
Replaced the entire clock bulk data filling and handling with
devm_clk_bulk_get_all().
Changes since v17:
- Addressing Will's comment to embed Thor's change [2] for pulling
clocks information from device tree. This is done by
From: Sricharan R
Finally add the device link between the master device and
smmu, so that the smmu gets runtime enabled/disabled only when the
master needs it. This is done from add_device callback which gets
called once when the master is added to the smmu.
Signed-off-by: Sricharan R
qcom,smmu-v2 is an arm,smmu-v2 implementation with specific
clock and power requirements.
On msm8996, multiple cores, viz. mdss, video, etc. use this
smmu. On sdm845, this smmu is used with gpu.
Add bindings for the same.
Signed-off-by: Vivek Gautam
Reviewed-by: Rob Herring
Reviewed-by: Tomasz
Hi,
On Mon, Dec 3, 2018 at 2:27 PM Jeykumar Sankaran wrote:
> + dsi0: dsi@ae94000 {
> + compatible = "qcom,mdss-dsi-ctrl";
> + reg = <0xae94000 0x400>;
> + reg-names = "dsi_ctrl";
> +
On Mon, Dec 3, 2018 at 7:56 PM Rob Clark wrote:
>
> On Mon, Dec 3, 2018 at 7:45 AM Robin Murphy wrote:
> >
> > Hi Rob,
> >
> > On 01/12/2018 16:53, Rob Clark wrote:
> > > This solves a problem we see with drm/msm, caused by getting
> > > iommu_dma_ops while we attach our own domain and manage it
Hi Tomasz,
On 2018-12-03 01:10, Tomasz Figa wrote:
> On Sat, Dec 1, 2018 at 8:54 AM Rob Clark wrote:
>> This solves a problem we see with drm/msm, caused by getting
>> iommu_dma_ops while we attach our own domain and manage it directly at
>> the iommu API level:
>>
>> [0038] user
Hi Rob,
On 01/12/2018 16:53, Rob Clark wrote:
This solves a problem we see with drm/msm, caused by getting
iommu_dma_ops while we attach our own domain and manage it directly at
the iommu API level:
[0038] user address but active_mm is swapper
Internal error: Oops: 9605
On Fri, Nov 30, 2018 at 04:21:15PM -0800, Jeykumar Sankaran wrote:
> On 2018-11-30 12:07, Sean Paul wrote:
> > On Fri, Nov 30, 2018 at 11:45:55AM -0800, Jeykumar Sankaran wrote:
> > > On 2018-11-29 14:15, Sean Paul wrote:
> > > > On Tue, Nov 20, 2018 at 02:04:14PM -0800, Jeykumar Sankaran wrote:
>
On Tue, Nov 27, 2018 at 02:28:30PM -0800, Jeykumar Sankaran wrote:
> Add display port support in DPU by creating hooks
> for DP encoder enumeration and encoder mode
> initialization.
>
> This change is based on the SDM845 Display port
> driver changes[1].
>
> changes in v2:
> - rebase on
On Thu, Nov 29, 2018 at 10:08:07AM +0100, Andrzej Hajda wrote:
> On 21.11.2018 19:19, Laurent Pinchart wrote:
> > Hi Ville,
> >
> > Thank you for the patch.
> >
> > On Tuesday, 20 November 2018 18:13:42 EET Ville Syrjala wrote:
> >> From: Ville Syrjälä
> >>
> >> Make life easier for drivers by
This allows controlling which of the 8 lanes are used for 6 bit color.
Signed-off-by: Jonathan Marek
---
v3: removed empty line and added documentation
.../devicetree/bindings/display/msm/mdp4.txt | 2 ++
.../gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c | 21 ---
2 files
Signed-off-by: Jonathan Marek
---
arch/arm/boot/dts/imx51.dtsi | 17 +
arch/arm/boot/dts/imx53.dtsi | 17 +
2 files changed, 34 insertions(+)
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
index 67d462715..e9a7bbce9 100644
---
A2XX has its own very simple MMU.
Added a msm_use_mmu() function because we can't rely on iommu_present to
decide to use MMU or not.
Signed-off-by: Jonathan Marek
---
v3: rebased on msm-next-staging and moved is_a2xx initialization earlier
drivers/gpu/drm/msm/Makefile | 3 +-
This patch allows using drm/msm without qcom display hardware. It adds a
amd,imageon compatible, which is used instead of qcom,adreno, but does
not require a top level msm node.
Signed-off-by: Jonathan Marek
---
v3: reworked to work with only a amd,imageon node
drivers/gpu/drm/msm/Kconfig
On Fri, Nov 30, 2018 at 05:00:02PM -0500, Sean Paul wrote:
> From: Sean Paul
>
> This patch wraps dpu_core_perf_crtc_release_bw() with modeset locks
> since it digs into the state objects.
>
> Changes in v2:
> - None
> Changes in v3:
> - Use those nifty new DRM_MODESET_LOCK_ALL_* helpers
On Mon, Dec 3, 2018 at 7:45 AM Robin Murphy wrote:
>
> Hi Rob,
>
> On 01/12/2018 16:53, Rob Clark wrote:
> > This solves a problem we see with drm/msm, caused by getting
> > iommu_dma_ops while we attach our own domain and manage it directly at
> > the iommu API level:
> >
> >
On Mon, Dec 3, 2018 at 7:45 AM Robin Murphy wrote:
>
> Hi Rob,
>
> On 01/12/2018 16:53, Rob Clark wrote:
> > This solves a problem we see with drm/msm, caused by getting
> > iommu_dma_ops while we attach our own domain and manage it directly at
> > the iommu API level:
> >
> >
The GMU code currently has some misguided code to try to work around
a hardware quirk that requires the power domains on the GPU be
collapsed in a certain order. Future changes will do this the
right way so get rid of the unused and unwanted regulator
code.
Signed-off-by: Jordan Crouse
---
On 2018-11-16 10:42, Sean Paul wrote:
From: Sean Paul
The crtc runtime resume doesn't actually operate on the crtc, but
rather
its encoders. The problem with this is that we need to inspect the crtc
state to get the currently connected encoders. Since runtime resume
isn't guaranteed to be
On 2018-11-16 10:42, Sean Paul wrote:
From: Sean Paul
Add a bool to dpu_encoder_virt to track whether the encoder is enabled
or not. Repurpose the enc_lock mutex to ensure that it is consistent
with the hw state.
Changes in v2:
- None
Cc: Jeykumar Sankaran
Signed-off-by: Sean Paul
---
On 2018-11-30 14:00, Sean Paul wrote:
From: Sean Paul
This patch wraps dpu_core_perf_crtc_release_bw() with modeset locks
since it digs into the state objects.
Changes in v2:
- None
Changes in v3:
- Use those nifty new DRM_MODESET_LOCK_ALL_* helpers (Daniel)
Cc: Daniel Vetter
Cc: Jeykumar
On 2018-11-26 13:53, Sean Paul wrote:
On Mon, Nov 19, 2018 at 12:03:53PM -0800, Jeykumar Sankaran wrote:
On 2018-11-16 13:14, Sean Paul wrote:
> On Fri, Nov 16, 2018 at 12:05:09PM -0800, Jeykumar Sankaran wrote:
> > On 2018-11-16 10:42, Sean Paul wrote:
> > > From: Sean Paul
> > >
> > > It's
From: Sean Paul
Since dpu_crtc subclasses crtc_state, we need a custom .reset hook in
order to allocate the right amount of memory to accommodate the
additional struct members in dpu_crtc_state. So bring it [partially]
back.
Relevant KASAN splat:
[ 10.82]
On 2018-12-03 06:21, Sean Paul wrote:
On Fri, Nov 30, 2018 at 04:21:15PM -0800, Jeykumar Sankaran wrote:
On 2018-11-30 12:07, Sean Paul wrote:
> On Fri, Nov 30, 2018 at 11:45:55AM -0800, Jeykumar Sankaran wrote:
> > On 2018-11-29 14:15, Sean Paul wrote:
> > > On Tue, Nov 20, 2018 at 02:04:14PM
Add a buffer object name for the a6xx crashdumper so it can be
seen with the changes introduced by 7799a98edd
("drm/msm: Add a name field for gem objects").
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
dadb36b7ec42 ("drm/msm: Add a common function to free kernel buffer objects")
missed freeing the crashdumper state for a6xx.
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 11 +--
1 file changed, 1 insertion(+), 10 deletions(-)
diff --git
On 2018-11-16 10:42, Sean Paul wrote:
From: Sean Paul
power_events are only used for pm_runtime, and that's all handled in
dpu_kms. So just call vbif_init_memtypes at the correct times.
Changes in v2:
- Removed obsolete comment (Jeykumar)
Cc: Jeykumar Sankaran
Signed-off-by: Sean Paul
---
On Mon, Dec 3, 2018 at 8:24 PM Jonathan marek wrote:
> > I can't find the dt-bindings for these compatible entries. Have you
> > documented them?
> >
>
> It is the same as qcom,adreno which is documented here:
>
> Documentation/devicetree/bindings/display/msm/gpu.txt
>
> I guess I should add
We already have the DEFINE_SHOW_ATTRIBUTE.There is no need to define
such a macro separately,so remove DEFINE_DPU_DEBUGFS_SEQ_FOPS.
Also use DEFINE_SHOW_ATTRIBUTE to simplify some code.
Signed-off-by: Yangtao Li
---
drivers/gpu/drm/armada/armada_debugfs.c | 21
Hi Jonathan,
Thanks for working on this. Really nice to see GPU support for mx51/mx53!
On Mon, Dec 3, 2018 at 7:21 PM Jonathan Marek wrote:
Please add a commit log.
> Signed-off-by: Jonathan Marek
> ---
> arch/arm/boot/dts/imx51.dtsi | 17 +
> arch/arm/boot/dts/imx53.dtsi |
Quoting Vivek Gautam (2018-12-02 22:43:38)
> On Fri, Nov 30, 2018 at 11:45 PM Will Deacon wrote:
> >
> > On Thu, Nov 29, 2018 at 08:25:20PM +0530, Vivek Gautam wrote:
> > > clk_bulk_get_all() seems like going only the OF way.
> > > Is there another way here to have something common between ACPI
>
On Thu, Nov 29, 2018 at 09:46:16AM +0100, Andrzej Hajda wrote:
> Quite late, hopefully not too late.
>
>
> On 21.11.2018 12:51, Ville Syrjälä wrote:
> > On Wed, Nov 21, 2018 at 01:40:43PM +0200, Jani Nikula wrote:
> >>
> >>> return;
> >>> diff --git
On 12/03/2018 05:16 PM, Fabio Estevam wrote:
Hi Jonathan,
Thanks for working on this. Really nice to see GPU support for mx51/mx53!
On Mon, Dec 3, 2018 at 7:21 PM Jonathan Marek wrote:
Please add a commit log.
Signed-off-by: Jonathan Marek
---
arch/arm/boot/dts/imx51.dtsi | 17
On 12/03/2018 05:10 PM, Jordan Crouse wrote:
On Mon, Dec 03, 2018 at 04:18:16PM -0500, Jonathan Marek wrote:
Signed-off-by: Jonathan Marek
---
arch/arm/boot/dts/imx51.dtsi | 17 +
arch/arm/boot/dts/imx53.dtsi | 17 +
2 files changed, 34 insertions(+)
diff
dpu_irq.c does some unneeded checks and passes control
to dpu_core_irq.c The simple functions can be defined
in the same file where we use them and the files and
their associated hangers on can be deleted.
Additionally the postinstall hook isn't used even
in dpu_core_irq.c so zap that entire
Remove some unused container_of() helper functions.
v3: No changes
v2: Retained still used helper functions in the name of readability
Reviewed-by: Sean Paul
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h | 10 --
This is a rebase of
https://patchwork.freedesktop.org/series/51214/
On top of
https://gitlab.freedesktop.org/seanpaul/dpu-staging/tags/for_jcrouse
Which should be up to date for the latest and greatest of the DPU. This should
be mostly unchanged since the last revision with the exception that
Outside of superfluous parameter checks the dpu_hw_blk_init()
doesn't have any failure paths. Switch it over to be a void
function and we can remove error handling paths in all the functions
that call it. While we're in those functions remove unneeded
initialization for a static variable.
v3: No
Do some debugfs cleanups from across the DPU driver. The DRM
destroy functions will do a recursive delete on the entire
debugfs node so there is no need to store dentry pointers for
the debugfs files that are persistent for the life of the
driver. This also means that the destroy functions can go
The functions in dpu_dbg.c aren't used. The two main dump functions
fail after a lookup from dpu_dbg_base.reg_base_list which turns out
to never be populated and once those are removed the rest of the
file doesn't make any sense.
v3: No changes
v2: Moved some unrelated changes to another patch
Remove more static inline functions that are lightly used and/or
very simple and easy to build into the calling functions.
v3: Fix a nit from Sean Paul
v2: Removed another unused function from dpu_hw_lm.c and add back
dpu_crtc_get_client_type() since there was a question regarding
its usefulness.
The static inline function dpu_crtc_enabled() is only called once
and the function that calls it in turn is only called once and
the return value can be easily checked in the calling functions
so collapse everything down.
v3: No changes
Reviewed-by: Sean Paul
Signed-off-by: Jordan Crouse
---
Do some cleanup in the static inline functions defined in
dpu_media_info.h by cleaning up gotos and unneeded local
variables.
v3: Added spaces between operators per Seal Paul and Sam Ravnborg
Reviewed-by: Sean Paul
Signed-off-by: Jordan Crouse
---
.../gpu/drm/msm/disp/dpu1/msm_media_info.h
dpu_crtc_get_mixer_height() is only used once and the value it
returns can be easily derived from the calling function.
v3: No changes
Reviewed-by: Sean Paul
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 3 +--
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 13
Allow the KMS operation 'irq_postinstall' to be optional
so that the target display drivers don't need to define
a dummy function if they don't need one.
v3: No changes
Reviewed-by: Sean Paul
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/msm/msm_drv.c | 6 +-
1 file changed, 5
On Mon, Dec 03, 2018 at 04:18:16PM -0500, Jonathan Marek wrote:
> Signed-off-by: Jonathan Marek
> ---
> arch/arm/boot/dts/imx51.dtsi | 17 +
> arch/arm/boot/dts/imx53.dtsi | 17 +
> 2 files changed, 34 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx51.dtsi
DPU is short for the Display Processing Unit. It is the display
controller on Qualcomm SDM845 chips.
This change adds MDSS and DSI nodes to enable display on the
target device.
Changes in v2:
- Beefed up commit message
- Use SoC specific compatibles for mdss and dpu (Rob H)
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