[Bug fortran/78033] Internal Compiler Error in enforce_single_undo_checkpoint

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78033 --- Comment #2 from kargl at gcc dot gnu.org --- (In reply to kargl from comment #1) > Reduced testcase. > > function f(n, x) >integer, intent(in) :: n >complex, intent(in) :: x(1:n) >real :: f >f = g([real(x(1:n)),

[Bug fortran/78033] Internal Compiler Error in enforce_single_undo_checkpoint

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78033 kargl at gcc dot gnu.org changed: What|Removed |Added CC||kargl at gcc dot gnu.org ---

Re: RFC [1/3] divmod transform v2

On 19 October 2016 at 03:03, Jeff Law wrote: > On 10/17/2016 11:23 PM, Prathamesh Kulkarni wrote: >> >> The divmod transform isn't enabled if target supports hardware div in >> the same or wider mode even if divmod libfunc is available for the >> given mode. > > Good. That seems

[Bug fortran/78033] New: Internal Compiler Error in enforce_single_undo_checkpoint

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78033 Bug ID: 78033 Summary: Internal Compiler Error in enforce_single_undo_checkpoint Product: gcc Version: 7.0 Status: UNCONFIRMED Severity: normal

[RFC][IPA-VRP] ADDR_EXPR and nonnull

Hi, While computing jump function value range for pointer, I am wondering if we can assume that any tree with ADDR_EXPR will be nonnull. That is, in cases like: int arr[10]; foo ([1]); OR struct st { int a; int b; }; struct st s2; foo (); Attached patch tries to do this. I am not sure

[Bug libgcc/78017] weak reference usage in gthr-posix.h (__gthread*) is broken

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78017 --- Comment #3 from Andrew Pinski --- There are other reasons why using static libraries does not make sense for libpthread.

[Bug libstdc++/78030] Lambda capture expression (different results than Clang & MSVC)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78030 Andrew Pinski changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug libstdc++/78030] Lambda capture expression (different results than Clang & MSVC)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78030 Andrew Pinski changed: What|Removed |Added Component|c++ |libstdc++ --- Comment #1 from Andrew

[Bug sanitizer/78028] ASAN doesn't find memory leak

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78028 --- Comment #1 from Kostya Serebryany --- interestingly, this works for me with clang

Re: [PATCH v2,rs6000] Add built-in function support for Power9 string operations

This patch broke bootstrap on AIX. In altivec_init_builtins(), the loop to initialize predicates is encountering mode1 == SImode. Thanks, David

[Bug c++/78022] constexpr int template rejected unless constructor is used before hand

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78022 Andrew Pinski changed: What|Removed |Added Keywords||rejects-valid

[Bug libfortran/77828] [7 Regression] Linking gfortran-7 compiled program with libgfortran of 5.x allowed but crashes when containing write to string

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77828 Jerry DeLisle changed: What|Removed |Added CC||damian at sourceryinstitute dot or

[Bug other/64184] libcilkrts fails to build on darwin due to error: '_SC_NPROCESSORS_ONLN' undeclared

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64184 Andrew Pinski changed: What|Removed |Added Keywords||build Status|WAITING

[Bug c++/78032] [5/6/7 Regression] Incorrect code generated

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78032 Andrew Pinski changed: What|Removed |Added Keywords||accepts-invalid

[Bug c++/78032] Incorrect code generated

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78032 Patrick Oppenlander changed: What|Removed |Added Known to work||5.3.0 Known to fail|

[Bug c++/78032] New: Incorrect code generated

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78032 Bug ID: 78032 Summary: Incorrect code generated Product: gcc Version: 6.2.1 Status: UNCONFIRMED Severity: normal Priority: P3 Component: c++ Assignee:

[patch, fortran] PR77828 Linking gfortran-7 compiled program with libgfortran of 5.x allowed but crashes

Hi Folks, The attached patch does some minor cleanup and bumps the libgfortran version number. I have wanted to reorder the dtp structure for many years now. Not strictly needed but it has bugged me forever. The bump is needed because of the significant changes from implementation of DTIO.

[Bug other/64184] error: '_SC_NPROCESSORS_ONLN' undeclared (first use in this function)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64184 --- Comment #2 from Jonathan Wakely --- It looks like it's used unconditionally even on trunk. Libstdc++ has an autoconf check for it, see GLIBCXX_CHECK_SC_NPROCESSORS_ONLN in libstdc++-v3/acinclude.m4

[Bug c++/77999] GCC diagnoses usage of STL literal operators as invalid.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77999 Ville Voutilainen changed: What|Removed |Added CC||ville.voutilainen at gmail dot com

[Bug c++/78031] Warning when a standard library UDL is brought to scope with a using-declaration

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78031 Ville Voutilainen changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

gcc-5-20161018 is now available

Snapshot gcc-5-20161018 is now available on ftp://gcc.gnu.org/pub/gcc/snapshots/5-20161018/ and on various mirrors, see http://gcc.gnu.org/mirrors.html for details. This snapshot has been generated from the GCC 5 SVN branch with the following options: svn://gcc.gnu.org/svn/gcc/branches/gcc-5

[Bug c++/78031] New: Warning when a standard library UDL is brought to scope with a using-declaration

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78031 Bug ID: 78031 Summary: Warning when a standard library UDL is brought to scope with a using-declaration Product: gcc Version: 7.0 Status: UNCONFIRMED Severity:

Re: PING: new pass to warn on questionable uses of alloca() and VLAs

On 09/13/2016 04:28 PM, Jeff Law wrote: On 08/19/2016 08:58 AM, Aldy Hernandez wrote: I'd just drop the /*strict_mode_p*/ comment in both places it appears in your patch's change to passes.def. I think we've generally frowned on those embedded comments, even though some have snuck in. I've

[Bug c++/32071] Partial explicit specialization template parameters not checked

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=32071 Paolo Carlini changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

Re: RFC [1/3] divmod transform v2

On 10/17/2016 11:23 PM, Prathamesh Kulkarni wrote: The divmod transform isn't enabled if target supports hardware div in the same or wider mode even if divmod libfunc is available for the given mode. Good. That seems like the right thing to do. Thanks. I had erroneously assumed

[Bug c++/78030] New: Lambda capture expression (different results than Clang & MSVC)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78030 Bug ID: 78030 Summary: Lambda capture expression (different results than Clang & MSVC) Product: gcc Version: 7.0 Status: UNCONFIRMED Severity: normal

[Bug rtl-optimization/78029] ICE in maybe_record_trace_start, at dwarf2cfi.c:2285

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78029 Segher Boessenkool changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug rtl-optimization/78029] New: ICE in maybe_record_trace_start, at dwarf2cfi.c:2285

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78029 Bug ID: 78029 Summary: ICE in maybe_record_trace_start, at dwarf2cfi.c:2285 Product: gcc Version: 7.0 Status: UNCONFIRMED Severity: normal Priority: P3

Re: [PATCH 0/8] NVPTX offloading to NVPTX: backend patches

On Tue, Oct 18, 2016 at 07:58:49PM +0300, Alexander Monakov wrote: > On Tue, 18 Oct 2016, Bernd Schmidt wrote: > > The performance I saw was lower by a factor of 80 or so compared to their > > CUDA > > version, and even lower than OpenMP on the host. > > The currently published OpenMP version of

Re: [rs6000] Fix reload failures in 64-bit mode with no special constant pool

> I don't fully understand what you mean. This code was created for > PR65810, if that helps? OK, let's turn it into "mode" then, this doesn't change anything. -- Eric Botcazou

Re: [Ada] Set Always_Compatible_Rep to False everywhere

> Agreed, let's do that for starters. Here it is, applied on the mainline. 2016-10-18 Eric Botcazou * gcc-interface/Makefile.in (EXTRA_GNATRTL_NONTASKING_OBJS): Define. (EXTRA_GNATRTL_TASKING_OBJS): Likewise. (ARM/Android): Add atomic support.

Re: [PATCH 09/16] Split class rtx_reader into base_rtx_reader vs rtx_reader

[CCing Richard; this is re: https://gcc.gnu.org/ml/gcc-patches/2016-10/msg00273.html ] Essentially I want to split class rtx_reader into two parts: a base class covering the things implemented in read-md.o, and a subclass implemented in read-rtl.o. The motivation is that I want to make some

Re: [C++ Patch/RFC] PR 67980 ("left shift count is negative [-Wshift-count-negative] generated for unreachable code")

... sorry, what I sent earlier in fact causes a regression in the libstdc++-v3 testsuite: 23_containers/list/61347.cc. Thus, I'm back to one of my first tries earlier today: a much more conservative change which uses fold_non_dependent_expr only for the purpose of suppressing the unwanted

Re: [rs6000] Fix reload failures in 64-bit mode with no special constant pool

On Tue, Oct 18, 2016 at 08:37:47PM +0200, Eric Botcazou wrote: > > We need to pass the mode of the actual datum we would put in the TOC to > > the use_toc_relative_ref function, not the mode of its address. > > Right, but this mode is not "mode", the TOC contains only Pmode entries if > the >

Re: Clear basic block flags before using BB_VISITED for OpenACC loops processing

Hi! On Mon, 17 Oct 2016 15:38:50 +0200, I wrote: > On Mon, 17 Oct 2016 14:08:44 +0200, Richard Biener > wrote: > > On Mon, Oct 17, 2016 at 1:47 PM, Thomas Schwinge > > wrote: > > > On Mon, 17 Oct 2016 13:22:17 +0200, Richard Biener > > >

Re: Clear basic block flags before using BB_VISITED for OpenACC loops processing

Hi! On Mon, 17 Oct 2016 15:38:50 +0200, I wrote: > On Mon, 17 Oct 2016 14:08:44 +0200, Richard Biener > wrote: > > On Mon, Oct 17, 2016 at 1:47 PM, Thomas Schwinge > > wrote: > > > On Mon, 17 Oct 2016 13:22:17 +0200, Richard Biener > > >

[PATCH, v2] Fix computation of register limit for -fsched-pressure

The patch here, https://gcc.gnu.org/ml/gcc-patches/2014-10/msg01872.html, attempted to scale down the register limit used by -fsched-pressure for the case where the block in question executes as frequently as the entry block to just the call_clobbered (i.e. call_used) regs. But the code is

Re: Use FOR_ALL_BB_FN in a few more places

Hi! On Tue, 18 Oct 2016 07:38:17 +0200, Richard Biener wrote: > On October 17, 2016 6:09:02 PM GMT+02:00, Thomas Schwinge > wrote: > >[FOR_ALL_BB_FN] > > > >We could use the former in a few more places; OK for trunk once tested? > > OK. As posted,

Re: [PATCH] xtensa: don't use unwind-dw2-fde-dip with elf targets

On Tue, Oct 18, 2016 at 11:22 AM, augustine.sterl...@gmail.com wrote: > On Mon, Oct 17, 2016 at 4:23 PM, Max Filippov wrote: >> Define LIB2ADDEH_XTENSA_UNWIND_DW2_FDE to unwind-dw2-fde.c in >> xtensa/t-elf and to unwind-dw2-fde-dip.c in

Re: [PATCH] xtensa: add HW FPU sequences for DIV/SQRT/RECIP/RSQRT

On Tue, Oct 18, 2016 at 11:22 AM, augustine.sterl...@gmail.com wrote: > On Fri, Oct 14, 2016 at 12:14 PM, Max Filippov wrote: >> >> Use new FPU instruction sequences documented in the ISA book to >> implement __divsf3, __divdf3, __recipsf2,

[Bug tree-optimization/78024] [7 regression] test cases gfortran.dg/goacc/routine-4.f90 and also routine-5.f90 fail starting with r241296

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78024 Dominique d'Humieres changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug fortran/78027] [6/7 Regression] ICE in new_oacc_loop_routine, at omp-low.c:19000

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78027 Martin Liška changed: What|Removed |Added Keywords||ice-on-valid-code, openacc,

[Bug fortran/78025] [5/6/7 Regression] ICE in simd_clone_adjust, at omp-simd-clone.c:1126

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78025 Martin Liška changed: What|Removed |Added Keywords||ice-on-invalid-code, openmp

[Bug fortran/78026] [5/6/7 Regression] ICE in gfc_resolve_omp_declare_simd, at fortran/openmp.c:5190

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78026 Martin Liška changed: What|Removed |Added Keywords||ice-on-invalid-code, openmp

[Bug libstdc++/78015] pthread_cancel while some exception is pending results in std::terminate ()

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78015 Jason Merrill changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug fortran/78025] ICE in simd_clone_adjust, at omp-simd-clone.c:1126

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78025 Dominique d'Humieres changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

Re: [PATCH] Fix typos in experimental::shared_ptr

On 18/10/16 19:30 +0100, Jonathan Wakely wrote: A couple of minor things I found whlie reviewing this code. * include/experimental/bits/shared_ptr.h (shared_ptr(shared_ptr&&)): Remove const from parameter. (operator<(const shared_ptr&, nullptr_t)): Use correct

Re: [rs6000] Fix reload failures in 64-bit mode with no special constant pool

> We need to pass the mode of the actual datum we would put in the TOC to > the use_toc_relative_ref function, not the mode of its address. Right, but this mode is not "mode", the TOC contains only Pmode entries if the special constant pool is excluded. -- Eric Botcazou

[PATCH] Fix typos in experimental::shared_ptr

A couple of minor things I found whlie reviewing this code. * include/experimental/bits/shared_ptr.h (shared_ptr(shared_ptr&&)): Remove const from parameter. (operator<(const shared_ptr&, nullptr_t)): Use correct specialization of std::less. *

Re: [PATCH] xtensa: don't use unwind-dw2-fde-dip with elf targets

On Mon, Oct 17, 2016 at 4:23 PM, Max Filippov wrote: > Define LIB2ADDEH_XTENSA_UNWIND_DW2_FDE to unwind-dw2-fde.c in > xtensa/t-elf and to unwind-dw2-fde-dip.c in xtensa/t-linux and use > LIB2ADDEH_XTENSA_UNWIND_DW2_FDE in LIB2ADDEH definition. > > 2016-10-17 Max Filippov

Re: [PATCH] xtensa: add HW FPU sequences for DIV/SQRT/RECIP/RSQRT

On Fri, Oct 14, 2016 at 12:14 PM, Max Filippov wrote: > > Use new FPU instruction sequences documented in the ISA book to > implement __divsf3, __divdf3, __recipsf2, __recipdf2, __rsqrtsf2, > __rsqrtdf2 and __ieee754_sqrtf and __ieee754_sqrt. > > 2013-02-12 Ding-Kai Chen

[Bug sanitizer/78028] New: ASAN doesn't find memory leak

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78028 Bug ID: 78028 Summary: ASAN doesn't find memory leak Product: gcc Version: 5.2.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: sanitizer

Re: [PATCH] Make -Wint-in-bool-context warn on suspicious shift ops

On 10/18/16 19:05, Joseph Myers wrote: > On Tue, 18 Oct 2016, Bernd Edlinger wrote: > >> Hi, >> >> this restricts the -Wint-in-bool-context warning to signed shifts, >> to reduce the number of false positives Markus reported yesterday. > > This patch seems to be missing testcases (that warned

Re: [PATCH][AArch64] Improve stack adjustment

James Greenhalgh wrote: On Mon, Oct 17, 2016 at 12:38:36PM +, Wilco Dijkstra wrote: >> +  /* We need two add/sub instructions, each one perform part of the >> + addition/subtraction, but don't this if the addend can be loaded into >> + register by single instruction, in that case we

[Bug fortran/77678] ICE in fold_read_from_constant_string, at fold-const.c:13706

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77678 kargl at gcc dot gnu.org changed: What|Removed |Added CC||kargl at gcc dot gnu.org ---

Re: RFC [1/3] divmod transform v2

On 10/18/2016 02:25 AM, Richard Biener wrote: I don't even think we have a way of knowing in the compiler if the target has enabled divmod support in libgcc. Yeah, that's what bothers me with the current optab libfunc query setup -- it isn't reliable. I wonder if we ought to just have them

Re: [PATCH][AArch64] Improve stack adjustment

On Mon, Oct 17, 2016 at 12:38:36PM +, Wilco Dijkstra wrote: > > ping > > > From: Wilco Dijkstra > Sent: 10 August 2016 17:20 > To: Richard Earnshaw; GCC Patches > Cc: nd > Subject: Re: [PATCH][AArch64] Improve stack adjustment >   > Richard Earnshaw wrote: > > I see you've added a

Re: [PATCH] Make -Wint-in-bool-context warn on suspicious shift ops

On Tue, 18 Oct 2016, Bernd Edlinger wrote: > Hi, > > this restricts the -Wint-in-bool-context warning to signed shifts, > to reduce the number of false positives Markus reported yesterday. This patch seems to be missing testcases (that warned before the patch and don't warn after it). --

Re: [PATCH] Make -Wint-in-bool-context warn on suspicious shift ops

Hi, this restricts the -Wint-in-bool-context warning to signed shifts, to reduce the number of false positives Markus reported yesterday. Bootstrap and reg-testing on x86_64-pc-linux-gnu was fine. Is it OK for trunk? Thanks Bernd. 2016-10-17 Bernd Edlinger *

[Bug fortran/78027] ICE in new_oacc_loop_routine, at omp-low.c:19000

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78027 --- Comment #1 from Gerhard Steinmetz --- No ICE with one loop only : $ cat z3.f90 real function f() !$omp declare target(f) f = 1. !$acc parallel !$acc loop do i = 1, 8 end do

Re: [PATCH 0/8] NVPTX offloading to NVPTX: backend patches

On Tue, 18 Oct 2016, Bernd Schmidt wrote: > The performance I saw was lower by a factor of 80 or so compared to their CUDA > version, and even lower than OpenMP on the host. The currently published OpenMP version of LULESH simply doesn't use openmp-simd anywhere. This should make it obvious that

[Bug fortran/78027] New: ICE in new_oacc_loop_routine, at omp-low.c:19000

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78027 Bug ID: 78027 Summary: ICE in new_oacc_loop_routine, at omp-low.c:19000 Product: gcc Version: 7.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component:

[Bug fortran/78026] New: ICE in gfc_resolve_omp_declare_simd, at fortran/openmp.c:5190

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78026 Bug ID: 78026 Summary: ICE in gfc_resolve_omp_declare_simd, at fortran/openmp.c:5190 Product: gcc Version: 7.0 Status: UNCONFIRMED Severity: normal

Re: [PATCH 3/7] use rtx_insn * more

On Tue, Oct 18, 2016 at 03:54:43PM +0200, Bernd Schmidt wrote: > On 10/18/2016 03:54 PM, Trevor Saunders wrote: > > > > I do really prefer reading code where variables are declared at first > > use > > In general, so do I, but in this case it's one variable out of a whole > bunch, which makes

[Bug fortran/78025] New: ICE in simd_clone_adjust, at omp-simd-clone.c:1126

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78025 Bug ID: 78025 Summary: ICE in simd_clone_adjust, at omp-simd-clone.c:1126 Product: gcc Version: 7.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component:

[Bug libstdc++/41861] [DR 887][C++0x] does not use monotonic_clock

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=41861 --- Comment #14 from Mike Crowe --- (In reply to Jonathan Wakely from comment #13) > (In reply to Roman Fietze from comment #12) > > Sorry if it is inappropriate to ask for any changes, but how can it be, that > > there is no fix for this bug

[Bug tree-optimization/77989] [7 Regression] -O3 causes verify_gimple fail

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77989 --- Comment #6 from amker at gcc dot gnu.org --- Ah, I think this duplicates to PR77988 and was fixed by richi. I will add a test case for this though.

Re: [PATCH][AArch64] Align FP callee-saves

On Mon, Oct 17, 2016 at 12:40:18PM +, Wilco Dijkstra wrote: > > ping > > If the number of integer callee-saves is odd, the FP callee-saves use 8-byte > aligned LDP/STP.  Since 16-byte alignment may be faster on some CPUs, align > the FP callee-saves to 16 bytes and use the alignment gap for

[Bug tree-optimization/78005] [7 Regression] 172.mgrid and 450.soplex miscompare

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78005 --- Comment #4 from amker at gcc dot gnu.org --- Hmm, some code got lost during iterating of patch testing... Will send a patch soon.

[PATCH][v6] GIMPLE store merging pass

Hi Richard, This patch is a merge of [1] and [2] and implements the manual merging of bitfields as outlined in [1] but actually makes it work on BYTES_BIG_ENDIAN too. It caused me a lot of headeache because the bit offset is counted from the most significant bit in the byte, even though

[C++ Patch/RFC] PR 67980 ("left shift count is negative [-Wshift-count-negative] generated for unreachable code")

Hi, in the language of our implementations details, submitter noticed that in terms of warnings we handle in a different way COND_EXPRs in tsubst_copy_and_build - we use fold_non_dependent_expr and integer_zerop to suppress undesired warnings by bumping c_inhibit_evaluation_warnings - and

[Bug tree-optimization/78024] [7 regression] test cases gfortran.dg/goacc/routine-4.f90 and also routine-5.f90 fail starting with r241296

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78024 --- Comment #1 from Bill Seurer --- These also fail on x86.

Re: [Patch, fortran] PR69566 - Failure of SELECT TYPE with unlimited polymorphic function result

Hi Paul, > For reasons I don't understand, sometimes the expression type comes > through as BT_DERIVED, whilst the symbol is BT_CLASS. I could repair > this in resolve.c(fixup_array_ref) if you think that would be cleaner. I think that I figured the rule: - when no _class-ref is present, then

[Bug tree-optimization/78024] New: [7 regression] test cases gfortran.dg/goacc/routine-4.f90 and also routine-5.f90 fail starting with r241296

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78024 Bug ID: 78024 Summary: [7 regression] test cases gfortran.dg/goacc/routine-4.f90 and also routine-5.f90 fail starting with r241296 Product: gcc Version: 7.0

Re: [PATCH] PR77990 refactor unique_ptr to encapsulate tuple

On 10/18/2016 12:54 PM, Jonathan Wakely wrote: > I'll wait a bit longer for any objections, as the refactoring could be > seen as unnecessary churn, but I think it's valuable housekeeping. Having stared at std::unique_ptr a lot recently, I like this, FWIW. Thanks, Pedro Alves

Re: [Patch, fortran] PR69566 - Failure of SELECT TYPE with unlimited polymorphic function result

Hi Andre, Thanks for a quick response: > You can use > >|| (e->symtree && UNLIMITED_POLY (e->symtree->n.sym)); Ah yes, you are quite right. > here. UNLIMITED_POLY does all the checks. I am still wondering whether this is > necessary? The symtree is set for expr_type == { EXPR_VARIABLE,

[Bug target/78023] ice in replace_one_candidate with -O3 and -march=native

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78023 --- Comment #3 from Uroš Bizjak --- (In reply to David Binderman from comment #0) > Created attachment 39831 [details] > C source code after creduce > > The attached C code, when compiled by gcc trunk dated 20161018, > and com

[Bug tree-optimization/77902] Auto-vectorizes epilogue loops of manually vectorized functions

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77902 Allan Jensen changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug middle-end/78016] REG_NOTE order is not kept during insn copy

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78016 --- Comment #2 from Jiong Wang --- (In reply to Eric Botcazou from comment #1) > > I attached a simply fix to keep REG-NOTE order during insn copy. > > > > Any comments? > > This seems reasonable if you need it for the DWARF CFI stuff, but

[Bug target/78023] ice in replace_one_candidate with -O3 and -march=native

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78023 Markus Trippelsdorf changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED CC|

[Bug target/78023] ice in replace_one_candidate with -O3 and -march=native

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78023 --- Comment #1 from David Binderman --- Created attachment 39832 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=39832=edit gzipped C source code, before creduce

Re: Early jump threading

On Mon, Sep 19, 2016 at 11:22:27AM +0200, Jan Hubicka wrote: > > On Mon, Sep 19, 2016 at 2:48 AM, Jan Hubicka wrote: > > > Hi, > > > this is the patch compensating testsuite I commited after re-testing > > > on x86_64-linux. > > > > > > Other placements of early_thread_jumps does

[Bug target/78023] New: ice in replace_one_candidate with -O3 and -march=native

hen compiled by gcc trunk dated 20161018, and compiler flags -O3 -march=native, does this: $ ../results/bin/gcc -c -O3 -march=native bug312.c ../../src/H5Tconv.c: In function ‘H5T__conv_int_float’: ../../src/H5Tconv.c:7558:1: internal compiler error: in replace_one_candidate, at gimple-ssa-stren

[Bug c++/67697] [concepts] ICE when using non-constexpr in requires expression

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67697 Martin Liška changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug middle-end/65950] exit in main is causing the path to it to become unlikely.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65950 Andrew Pinski changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug middle-end/65950] exit in main is causing the path to it to become unlikely.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65950 --- Comment #12 from Andrew Pinski --- Author: pinskia Date: Tue Oct 18 15:42:21 2016 New Revision: 241309 URL: https://gcc.gnu.org/viewcvs?rev=241309=gcc=rev Log: 2016-10-18 Andrew Pinski PR tree-opt/65950

Re: [PATCH] Reduce stack usage in sha512 (PR target/77308)

On 18 October 2016 at 16:45, Bernd Edlinger wrote: > On 10/18/16 10:36, Christophe Lyon wrote: >> >> I am seeing a lot of regressions since this patch was committed: >> http://people.linaro.org/~christophe.lyon/cross-validation/gcc/trunk/241273/report-build-info.html >>

[Bug target/78020] [AArch64] vuzp{1,2}q_f64 implementation identical to vzip{1,2}q_f64 in arm_neon.h and probably incorrect

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78020 --- Comment #6 from Christophe Monat --- James, (In reply to James Greenhalgh from comment #5) > This bug looks invalid to me. I think you're both failing to grasp the > intuition behind these intrinsics. Ignoring the descriptions in the >

[Bug c++/69637] ICE on an invalid bit-field with template name for width

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69637 Martin Liška changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|2016-02-02

[Bug libgcc/78017] weak reference usage in gthr-posix.h (__gthread*) is broken

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78017 --- Comment #2 from nsz at gcc dot gnu.org --- i see the glibc threads linked from https://sourceware.org/bugzilla/show_bug.cgi?id=5784 but there are other libcs with static linking support, so even if weakrefs worked on glibc (now they don't)

[Bug c++/78022] Strange C++ compilation error

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78022 --- Comment #1 from fiesh at zefix dot tv --- The same happens with 6.2.1.

[Bug c++/70555] ICE in expand_expr_real_1 accessing a multi-dimensional VLA via lambda-capture

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70555 Martin Liška changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug c++/70565] [5/6/7 Regression] ICE at gimplify.c:8832 (cilkplus array extension)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70565 Martin Liška changed: What|Removed |Added Status|UNCONFIRMED |NEW Known to work|

Re: [Patch, fortran] PR69566 - Failure of SELECT TYPE with unlimited polymorphic function result

Hi Paul, > Index: gcc/fortran/trans-stmt.c > === > *** gcc/fortran/trans-stmt.c (revision 241273) > --- gcc/fortran/trans-stmt.c (working copy) > *** trans_associate_var (gfc_symbol *sym, gf > *** 1517,1523 >

[Bug target/78020] [AArch64] vuzp{1,2}q_f64 implementation identical to vzip{1,2}q_f64 in arm_neon.h and probably incorrect

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78020 James Greenhalgh changed: What|Removed |Added CC||jgreenhalgh at gcc dot gnu.org ---

[Bug libgomp/67335] [6/7 Regression] ICE in compiling omp simd function with unused argument

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67335 Martin Liška changed: What|Removed |Added Keywords||ice-on-valid-code, openmp

[Bug c++/78022] New: Strange C++ compilation error

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78022 Bug ID: 78022 Summary: Strange C++ compilation error Product: gcc Version: 5.4.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: c++

[Bug target/77345] [7 Regression] Segmentation fault w/ -misel -O1 (and above)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77345 Martin Liška changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug target/78020] [AArch64] vuzp{1,2}q_f64 implementation identical to vzip{1,2}q_f64 in arm_neon.h and probably incorrect

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78020 --- Comment #4 from Yvan Roux --- > Yes, you're right Yvan. > James just went through it with me on a board and they are indeed equivalent. > Sorry for the confusion. No worries, this kind of thing is tricky and deserve board drawings, It's a

Re: [PATCH] Fix computation of register limit for -fsched-pressure

On 10/18/2016 05:31 AM, Maxim Kuvyrkov wrote: >> > I see your point and agree that current code isn't optimal. However, I >> > don't think your patch is accurate either. Consider >> > https://gcc.gnu.org/onlinedocs/gccint/Register-Basics.html and let's >> > assume that FIXED_REGISTERS in

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