Committed to ARM/arm-9-branch
On Wed, Sep 11, 2019 at 4:50 PM Wilco Dijkstra wrote:
>
> While code hoisting generally improves codesize, it can affect performance
> negatively. Benchmarking shows it doesn't help SPEC and negatively affects
> embedded benchmarks, so only enable code hoisting
Branch created for Arm GCC releases.
- Joey
:29 PM, Joey Ye wrote:
> > This is a fix to an obvious issue in gcov.exp, where proc
> > verify-intermediate returns without closing the open file.
> >
> > This can be a possible fix to PR85871. gcov-8.C diffs to other gcov
> > testcases that it invokes verify-interm
regression will disappear completely one month after this patch
committed to trunk.
Tested with make check with no new regressions.
OK to trunk?
testsuite/ChangeLog:
2018-09-05 Joey Ye
* lib/gcov.exp (verify-intermediate): Add missing close.
gcov-20180905.patch
Description: gcov
typo: s/reorg.c/recog.c/g
On Thu, Aug 30, 2018 at 11:20 AM Joey Ye wrote:
>
> Hi Bin & Richard,
>
> It is not as simple as keeping the assertion, which still fails even
> with the change in reorg.c. The testing result is as following:
>
> I. With Bin's patch version
6d67 expand_gimple_stmt
/build/trunk/src/gcc/gcc/cfgexpand.c:3734
0x768ce7 expand_gimple_basic_block
More places need to be patched.
Thanks,
Joey
On Thu, Aug 30, 2018 at 2:02 AM Bin.Cheng wrote:
>
> On Thu, Aug 30, 2018 at 2:47 AM Richard Sandiford
> wrote:
> >
> > Joey Ye
Ping^2 for Bin
The ICE is still there annoyingly.
Thanks,
Joey
On Wed, May 16, 2018 at 9:21 AM Kyrill Tkachov
wrote:
>
> Hi Bin,
>
>
> On 22/03/18 11:07, Bin.Cheng wrote:
> > On Sat, Mar 17, 2018 at 8:54 AM, Richard Sandiford
> > wrote:
> > > Kyrill Tkachov writes:
> > >> Hi Bin,
> > >>
> >
adhakrishnan; Nathan Sidwell; Joey Ye; GCC Patches
> Cc: Richard Earnshaw
> Subject: Re: [ARM] mno-pic-data-is-text-relative & msingle-pic-base
>
> Ramana,
>
> I saw some correspondence between you and Nathan on his patch
> [https://gcc.gnu.org/ml/gcc-patches/2016-05/msg0
nt: 12 July 2016 17:07
> To: Ramana Radhakrishnan
> Cc: GCC Patches; Joey Ye; nd
> Subject: Re: [ARM] no-data-is-text-relative & msingle-pic-base
>
> On 07/12/16 12:01, Ramana Radhakrishnan wrote:
>
> > I am also slightly inclined to go further and error out if someone us
> -Original Message-
> From: Nathan Sidwell [mailto:nathanmsidw...@gmail.com] On Behalf Of
> Nathan Sidwell
> Sent: 09 May 2016 18:22
> To: Joey Ye; Richard Earnshaw; GCC Patches
> Subject: Re: [ARM] mno-pic-data-is-text-relative & msingle-pic-base
>
> Joey,
stands
on.
Thanks,
Joey
> -Original Message-
> From: Nathan Sidwell [mailto:nathanmsidw...@gmail.com] On Behalf Of
> Nathan Sidwell
> Sent: 09 May 2016 15:07
> To: Richard Earnshaw; GCC Patches
> Cc: Joey Ye
> Subject: [ARM] mno-pic-data-is-text-relati
Find a missing test case for
https://gcc.gnu.org/ml/gcc-patches/2015-01/msg00789.html left at the corner.
Merged with the latest trunk. New test case does not fail on
thumb1/thumb2/arm targets.
ChangeLog:
2015-07-24: Joey Ye joey...@arm.com
* gcc.target/arm/thumb2-pop-single.c: New
In this case ldm is loading at alignment address. It is just loaded
more than sizeof a. So it can be the bus that does not permit
accessing memory beyond address range of a. Such a case I don't
believe compiler is doing wrong.
On Mon, May 18, 2015 at 4:50 PM, Richard Earnshaw
Ping
On Wed, Nov 19, 2014 at 10:43 AM, Joey Ye joey...@arm.com wrote:
Current thumb2 -Os generates suboptimal code for following tail call case:
int f4(int b, int a, int c, int d);
int g(int a, int b, int c, int d)
{ return f4(b, a, c, d); }
arm-none-eabi-gcc -Os -mthumb -mcpu=cortex-m3
This work around brings thumb1 bootstrap back. Though I cannot
approve, I would like it in stage 3. A complete fix in thumb1 pattern
will be welcomed.
Thanks,
Joey
On Thu, Nov 20, 2014 at 7:54 PM, Tom de Vries tom_devr...@mentor.com wrote:
Richard,
This patch fixes PR63718, which currently
OK applying to arm/embedded-4_9-branch, though you still need
maintainer approval into trunk.
- Joey
On Wed, Nov 26, 2014 at 11:43 AM, Hale Wang hale.w...@arm.com wrote:
Hi,
This patch ports the aeabi_idiv routine from Linaro Cortex-Strings
Current thumb2 -Os generates suboptimal code for following tail call case:
int f4(int b, int a, int c, int d);
int g(int a, int b, int c, int d)
{ return f4(b, a, c, d); }
arm-none-eabi-gcc -Os -mthumb -mcpu=cortex-m3 test.c
push
{r4, lr}
mov r4, r1
mov r1, r0
mov r0, r4
pop {r4, lr}
b f4
This doesn't seem like a bug to me, unless they run with unexpected
results. My guess of the reason of different generated code can be the
mapping of registers and variables. s0, s1, s2 are not symmetric as
they are mapping to different parameter registers. GCC may choose
different sequence, in
Is there a case or PR to demonstrate the issue? If yes, better to
include it as a test case.
Thanks,
Joey
On Thu, Nov 13, 2014 at 2:14 PM, Yangfei (Felix) felix.y...@huawei.com wrote:
Hi,
We find that the VALLDI mode iterator used in *aarch64_simd_ld1rmode
pattern is not appropriate.
Can a new case be rewritten then?
- Joey
On Fri, Nov 14, 2014 at 9:32 AM, Yangfei (Felix) felix.y...@huawei.com wrote:
No, we noticed this issue when improving the vld1(q?)_dup intrinsics. Thanks.
Is there a case or PR to demonstrate the issue? If yes, better to include it
as a test
On Wed, Nov 12, 2014 at 1:47 AM, Joern Rennecke
joern.renne...@embecosm.com wrote:
On 11 November 2014 16:22, Joey Ye joey.ye...@gmail.com wrote:
* Expensive effort. Either supporting none, or supporting all. There
are large number of MCUs from ARM eco-system partners. Supporting all
of them
Markus,
-mmcu probably will not work for ARM architectured MCUs. Reason are
* Confusion. -mcpu is encouraged and already widely used for ARM
architectures. Introducing -mmcu will be very confusing.
* Expensive effort. Either supporting none, or supporting all. There
are large number of MCUs from
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63747 is likely caused by
this patch. compare_gimple_switch does not check CASE_LOW and
CASE_HIGH, resulting merging functions not identical.
Interestingly in the first a few versions of this patch CASE_LOW/HIGH
were checked. But last versions only
Tom,
This patch broke arm thumb1 bootstrap. Please check details at
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63718
Best Regards
Joey
On Fri, Oct 17, 2014 at 5:57 AM, Jeff Law l...@redhat.com wrote:
On 10/16/14 03:14, Tom de Vries wrote:
Eric,
this patch is the second half of the fix
Sounds a good idea to me, here is the list I'm using:
#include params.h
#include flags.h
#include tree.h
#include tree-pass.h
#include basic-block.h
#include function.h
#include hash-table.h
#include tree-ssa-alias.h
#include tree-cfg.h
#include tree-ssa-operands.h
#include tree-inline.h
#include
Trunk fails to build plugin again due to missing plugin header files. This
patch fixes it.
OK to trunk?
ChangeLog:
PR plugin/59335
* Makefile.in (PLUGIN_HEADERS): Add wide-int.h, signop.h, hash-map.h,
hash-set.h.
diff --git a/gcc/Makefile.in b/gcc/Makefile.in
index 63124f8..8e7aada
On Sat, Aug 30, 2014 at 12:26 PM, Thomas Preud'homme
thomas.preudho...@arm.com wrote:
From: Grissiom [mailto:chaos.pro...@gmail.com]
Sent: Friday, August 29, 2014 11:51 PM
Yes, it does. The namespace reserved for the implementation is _[_A-Z].
The namespace _[a-z] is still available for
On Fri, Aug 15, 2014 at 6:33 PM, Richard Biener
richard.guent...@gmail.com wrote:
On Fri, Aug 15, 2014 at 10:45 AM, Joey Ye joey.ye...@gmail.com wrote:
Running into an unexpected result with GCC with following case, but
not sure if it is a valid C++ case.
#define nullptr 0
enum nonetype
Joern, there is https://sourceware.org/ml/newlib/2014/msg00166.html,
which is already in newlib mainline. I think it solves the same issue
in a slight different approach.
Does it work for you?
Thanks,
Joey
On Thu, Aug 14, 2014 at 4:52 PM, Joern Rennecke
joern.renne...@embecosm.com wrote:
For
OK to 4.8 then?
On Thu, Aug 14, 2014 at 6:36 PM, Richard Biener
richard.guent...@gmail.com wrote:
On Thu, Aug 14, 2014 at 7:34 AM, Joey Ye joey.ye...@gmail.com wrote:
PR60484 is marked as 4.7/4.8 regression and it is reported against 4.8
recently by an user.
OK backporting to 4.7/4.8
Running into an unexpected result with GCC with following case, but
not sure if it is a valid C++ case.
#define nullptr 0
enum nonetype { none };
templatetypename T
class class_zoo {
public:
const T *data;
int length;
class_zoo (nonetype) : data (nullptr), length (0) {}
PR60484 is marked as 4.7/4.8 regression and it is reported against 4.8
recently by an user.
OK backporting to 4.7/4.8?
- Joey
On Sat, Mar 15, 2014 at 1:43 AM, Joseph S. Myers
jos...@codesourcery.com wrote:
On Fri, 14 Mar 2014, Marek Polacek wrote:
This patch makes sure that we set the
Mallikarjun,
Thanks for trying this. I agree with you that current C implementation
is far from optimal.
It is in our road-map with a different approach, which will not simply
port current functions from armv7-m to armv6-m. This task is low
priority due to less common usage of fp in Cortex-M0*,
If f2d need fix, then please fix d2f too as current implementation for
both behave similarly.
- Joey
On Mon, May 19, 2014 at 5:23 AM, Aurelien Jarno aurel...@aurel32.net wrote:
On ARM soft-float, the float to double conversion doesn't convert a sNaN
to qNaN as the IEEE Std 754 standard
Ping
-Original Message-
From: Joey Ye [mailto:joey...@arm.com]
Sent: Tuesday, April 01, 2014 6:18 PM
To: 'Ian Lance Taylor'
Cc: gcc-patches
Subject: RE: [patch] Shorten Windows path
Ian, thanks for your comments. Please find answers and new version below:
-Original
-Original Message-
From: Mike Stump [mailto:mikest...@comcast.net]
Sent: Monday, April 21, 2014 11:39 PM
To: Joey Ye
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [patch, testsuite] Fix fragile case nsdmi-union5
On Apr 17, 2014, at 10:28 PM, Joey Ye joey...@arm.com wrote:
Resulting
Resulting from discussion here:
http://gcc.gnu.org/ml/gcc/2014-04/msg00125.html
ChangeLog:
* g++.dg/cpp0x/nsdmi-union5.C: Change to runtime test.
Index: gcc/testsuite/g++.dg/cpp0x/nsdmi-union5.C
===
---
Ran into a fragile test case:
FAIL: g+.dg/cpp0x/nsdmi-union5.C -std=c+11 scan-assembler 7
$ cat nsdmi-union5.C
// PR c++/58701
// { dg-require-effective-target c++11 }
// { dg-final { scan-assembler 7 } }
static union
{
union
{
int i = 7;
};
};
Two issues make it very fragile. It only
-Original Message-
From: Joey Ye [mailto:joey...@arm.com]
Sent: Tuesday, April 15, 2014 6:37 PM
To: 'Richard Biener'
Cc: GCC Patches
Subject: RE: [patch] Disable if_conversion2 for Og
Ok for trunk and branches after a while. Why does if-conversion not have
the same problem
-Original Message-
From: Richard Earnshaw
Sent: Wednesday, April 16, 2014 5:44 PM
To: Joey Ye
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [patch] Disable if_conversion2 for Og
Arguably, this is a bug in gdb. The debugger should understand when a
breakpointed conditional
-Original Message-
From: Richard Earnshaw
Sent: Wednesday, April 16, 2014 6:04 PM
To: Joey Ye
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [patch] Disable if_conversion2 for Og
On 16/04/14 11:02, Joey Ye wrote:
-Original Message-
From: Richard Earnshaw
Sent
-Original Message-
From: Richard Earnshaw
Sent: Wednesday, April 16, 2014 6:21 PM
To: Joey Ye
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [patch] Disable if_conversion2 for Og
On 16/04/14 11:17, Joey Ye wrote:
-Original Message-
From: Richard Earnshaw
Sent: Wednesday
-Original Message-
From: Richard Biener [mailto:richard.guent...@gmail.com]
Sent: Tuesday, April 15, 2014 4:05 PM
To: Joey Ye
Cc: GCC Patches
Subject: Re: [patch] Disable if_conversion2 for Og
On Tue, Apr 15, 2014 at 3:59 AM, Joey Ye joey...@arm.com wrote:
If-converstion
If-converstion is harmful to optimized debugging as it generates conditional
execution instructions with line number information, which resulted in a
dillusion to developers that both then-else branches are executed.
For example:
test.c:
1: unsigned oldest_sequence;
2:
3: unsigned foo(unsigned
Ian, thanks for your comments. Please find answers and new version below:
-Original Message-
From: Ian Lance Taylor [mailto:i...@google.com]
Sent: 25 March 2014 21:09
To: Joey Ye
Cc: gcc-patches
Subject: Re: [patch] Shorten Windows path
On Tue, Mar 25, 2014 at 1:58 AM, Joey Ye
Ping
-Original Message-
From: Joey Ye [mailto:joey...@arm.com]
Sent: 19 February 2014 15:45
To: gcc-patches@gcc.gnu.org; Ian Lance Taylor (i...@google.com)
Subject: [patch] Shorten Windows path
Max length of path on Windows is 255, which is easy to exceed in a
complicated project
4.8 also has this bug. OK to backport?
On Tue, Mar 11, 2014 at 6:59 PM, Jakub Jelinek ja...@redhat.com wrote:
On Tue, Mar 11, 2014 at 06:48:37PM +0800, Thomas Preud'homme wrote:
I also added a typedef unsigned uint32_t for when sizeof(unsigned) == 4. I
hope it's right.
In theory you could
Ping. OK for trunk and 4.8?
-Original Message-
From: Joey Ye [mailto:joey...@arm.com]
Sent: 21 February 2014 19:32
To: gcc-patches@gcc.gnu.org
Subject: [patch] [arm] Fix PR60169 - thumb1 far jump
Patch http://gcc.gnu.org/ml/gcc-patches/2012-12/msg01229.html introduced
this ICE
This patch is a mirror copy from approved patch in glibc:
http://sourceware.org/ml/libc-alpha/2014-02/msg00741.html
OK to trunk, 4.8 and 4.7?
ChangeLog.libgcc:
* config/arm/sfp-machine.h (_FP_NANFRAC_H,
_FP_NANFRAC_S, _FP_NANFRAC_D, _FP_NANFRAC_Q):
Set to zero.
diff --git
Ping ^ 5
-Original Message-
From: Joey Ye [mailto:joey...@arm.com]
Sent: 19 February 2014 17:22
To: 'ja...@redhat.com'; gcc-patches@gcc.gnu.org
Subject: RE: [PATCH][4.8] Backport strict-volatile-bitfields fixes to 4.8
Ping ^ 4
-Original Message-
From: Joey Ye
Committed to ARM/embedded-4_8-branch
Still pending to gcc-4_8-branch.
-Original Message-
From: Joey Ye [mailto:joey...@arm.com]
Sent: 27 February 2014 13:53
To: 'ja...@redhat.com'; 'gcc-patches@gcc.gnu.org'
Subject: RE: [PATCH][4.8] Backport strict-volatile-bitfields fixes to 4.8
Patch http://gcc.gnu.org/ml/gcc-patches/2012-12/msg01229.html introduced
this ICE:
1. thumb1 estimate if far_jump is used based on function insn size
2. During reload, after stack layout finalized, it does reload_as_needed. It
however increases insn size that changes estimation result of
OK to trunk and 4.8?
-Original Message-
From: Joey Ye [mailto:joey...@arm.com]
Sent: 2014年2月21日 19:32
To: gcc-patches@gcc.gnu.org
Subject: [patch] [arm] Fix PR60169 - thumb1 far jump
Patch http://gcc.gnu.org/ml/gcc-patches/2012-12/msg01229.html introduced
this ICE:
1. thumb1 estimate
Vlad,
When fixing PR60169, I found that reload fail to assert
verify_initial_elim_offsets ()
if (insns_need_reload != 0 || something_needs_elimination
|| something_needs_operands_changed)
{
HOST_WIDE_INT old_frame_size = get_frame_size ();
reload_as_needed (global);
Ping ^ 4
-Original Message-
From: Joey Ye [mailto:joey...@arm.com]
Sent: Friday, February 14, 2014 9:58
To: gcc-patches@gcc.gnu.org
Subject: RE: [PATCH][4.8] Backport strict-volatile-bitfields fixes to 4.8
Ping ^3
These fixes are very important to 4.8 ARM embedded users
Max length of path on Windows is 255, which is easy to exceed in a
complicated project. Ultimate solution may be complex but canonizing the
path and skipping the ..s in path is helpful.
Relative discussion in gcc-patches:
http://gcc.gnu.org/ml/gcc-patches/2013-11/msg00582.html
OK to trunk stage
Ping ^3
These fixes are very important to 4.8 ARM embedded users, as they rely on
strict volatile bitfields a lot. Please let them in 4.8.
-Original Message-
From: Joey Ye [mailto:joey...@arm.com]
Sent: Saturday, February 08, 2014 10:42
To: gcc-patches@gcc.gnu.org
Subject: RE
Ping ^ 2
OK to 4.8?
-Original Message-
From: Joey Ye [mailto:joey...@arm.com]
Sent: Monday, January 20, 2014 10:47
To: gcc-patches@gcc.gnu.org
Subject: RE: [PATCH][4.8] Backport strict-volatile-bitfields fixes to 4.8
Ping
-Original Message-
From: Joey Ye
Ping
-Original Message-
From: Joey Ye [mailto:joey...@arm.com]
Sent: Thursday, January 16, 2014 16:28
To: gcc-patches@gcc.gnu.org
Subject: [PATCH][4.8] Backport strict-volatile-bitfields fixes to 4.8
4.8 has a number of strict-volatile-bitfields issues that can be fixed
4.8 has a number of strict-volatile-bitfields issues that can be fixed by
following patches.
trunk@205899, 205898, 205897, 205896, 203003
Tested on x86_64 and arm without regression.
OK to 4.8?
2013-09-28 Sandra Loosemore san...@codesourcery.com
gcc/
* expr.h
ChangeLog is messed up with other one.
On Thu, Jan 16, 2014 at 3:33 PM, Terry Guo terry@arm.com wrote:
Hi,
Current 4.8 branch will assign alu_reg attribute to the type of arm preload
insn, which is clearly wrong. The attached patch intends to back port trunk
patch to reclassify the type
Bernd,
If that's the case, can you please firstly fix invoke.texi where the
behavior of strict-volatile-bitfields is described? At least my
interpretation of current doc doesn't explain the behavior of the case
we are discussing. Also it should be a generic definition rather than
target specific
Sandra, Bernd,
Can you take a look at
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59734
It seems a siimple case still doesn't work as expected. Did I miss anything?
Thanks,
Joey
Update plugin document after switching to C++, also make it more friendly to
cross-build.
ChangeLog:
2014-01-08 Joey Ye joey...@arm.com
doc/plugin.texi (Building GCC plugins): Update to C++.
OK to trunk?
diff --git a/gcc/doc/plugins.texi b/gcc/doc/plugins.texi
index fc2d754..e668de6
Fix trunk plugin build by adding missing headers and remove headers no
longer exist.
Test passed:
- arm-none-eabi build --enable-plugins
- build test plugin
- x86_64 bootstrap --enable-plugins
OK to trunk?
ChangeLog.gcc
2013-11-19 Joey Ye joey...@arm.com
PR plugin/59335
Terry, this is a bug fix to pic register. I feel it should also be in
gcc-4_8-branch.
- Joey
On Wed, Nov 27, 2013 at 11:45 AM, Terry Guo terry@arm.com wrote:
Hi,
This patch back ported trunk fix at r205391 to arm/embedded-4_8-branch.
BR,
Terry
gcc/ChangeLog.arm
2013-11-27 Terry Guo
Ping, as wasting 8 bytes of RAM isn't ignorable on embedded system.
OK to trunk stage 1?
-Original Message-
From: Tom Tromey [mailto:tro...@redhat.com]
Sent: Thursday, October 10, 2013 21:32
To: Jakub Jelinek
Cc: Joey Ye; p...@bothner.com; a...@redhat.com; H.J. Lu; gcc-patches; 'Ian
Sorry about this. I should have run x86 make check.
- Joey
-Original Message-
From: Richard Biener [mailto:richard.guent...@gmail.com]
Sent: Thursday, November 14, 2013 22:16
To: H.J. Lu
Cc: Joey Ye; Janis Johnson; GCC Patches; Ramana Radhakrishnan
Subject: Re: [patch] [arm] ARM
-Original Message-
From: Richard Earnshaw
Sent: Thursday, November 14, 2013 0:57
To: Joey Ye
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [patch] [arm] New option for PIC offset unfixed
So you are suggesting change like this:
+ Target Report Var(arm_pic_data_is_text_relative) Init
-Original Message-
From: Richard Earnshaw
Sent: Thursday, November 14, 2013 18:00
To: Joey Ye
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [patch] [arm] New option for PIC offset unfixed
On 14/11/13 08:23, Joey Ye wrote:
-Original Message-
From: Richard Earnshaw
Sent
In mainline and arm/embedded-4_8-branch now.
-Original Message-
From: Janis Johnson [mailto:janis_john...@mentor.com]
Sent: Thursday, November 14, 2013 1:45
To: Joey Ye; jani...@codesourcery.com
Cc: gcc-patches@gcc.gnu.org; Ramana Radhakrishnan
Subject: Re: [patch] [arm] ARM Cortex
This patch address all comments.
Thanks,
Joey
-Original Message-
From: Richard Earnshaw
Sent: Wednesday, November 13, 2013 19:07
To: Joey Ye
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [patch] [arm] New option for PIC offset unfixed
On 13/11/13 10:20, Joey Ye wrote:
+@item -mpic
-Original Message-
From: Richard Earnshaw
Sent: Tuesday, November 12, 2013 18:49
To: Joey Ye
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [patch] [arm] New option for PIC offset unfixed
The name of the option and the documentation highlights that the
option's concept is confusing
Janis, can you please take a look at test case changes.
Thanks,
Joey
-Original Message-
From: Ramana Radhakrishnan
Sent: Friday, November 08, 2013 17:11
To: Joey Ye
Cc: gcc-patches@gcc.gnu.org; jani...@codesourcery.com
Subject: Re: [patch] [arm] ARM Cortex-M3/M4 tuning
its behavior unchanged.
Tested with arm-none-eabi make and VxWorks RTP small case
OK to trunk?
ChangeLog:
2013-11-12 Joey Ye joey...@arm.com
* config/arm/arm.c (arm_option_override): Error if
-mpic-offset-unfixed without -fpic, and set for
VxWorks RTP
- warning_at (DECL_SOURCE_LOCATION (p),
- OPT_Wunused_but_set_variable,
- variable %qD set but not used, p);
+ {
+if (!TREE_THIS_VOLATILE (p))
+ warning_at (DECL_SOURCE_LOCATION (p),
+OPT_Wunused_but_set_variable,
+variable %qD set but not used, p);
+ }
I'd prefer
Ping
-Original Message-
From: Joey Ye [mailto:joey...@arm.com]
Sent: Friday, November 01, 2013 1:00
To: gcc-patches@gcc.gnu.org
Subject: [patch] [arm] ARM Cortex-M3/M4 tuning
Based on Julian's http://gcc.gnu.org/ml/gcc-patches/2012-07/msg01006.html
and
* Merged with latest
Ping
ChangeLog
2013-10-27 Vladimir Simonov vladimir.simo...@acronis.com
(include)
filename.h (FILENAME_NORMALIZE): New macro.
(filename_normalize): New declare.
(libiberty)
filename_cmp.c (memmove_left): New function.
(filename_normalize): Likewise.
+ TARGET_ARM || TARGET_THUMB2
TARGET_32BIT
+static const char *const ite = it\t%d4;
+static const int cmp_idx[9] = {0, 0, 1, 0, 1};
s/9/5/
On Wed, Oct 30, 2013 at 5:32 PM, Zhenqiang Chen zhenqiang.c...@arm.com wrote:
-Original Message-
From: Richard Henderson
: Likewise.
ChangeLog:
2013-11-01 Julian Brown jul...@codesourcery.com
Joey Ye joey...@arm.com
* config/arm/arm.c (arm_cortex_m_branch_cost): New.
(arm_v7m_tune): New.
(arm_*_tune): Add comments for Sched adj cost.
* config/arm/arm-cores.def (cortex-m4, cortex-m3):
Use
Vladimir,
I found no more issue on patch itself. But ChangeLogs are missing.
Please refer to format in /include/ChangeLog, and generate yours in
your next email for
/include
/libcpp
/libiberty
Maintainers of libiberty are in TO list.
- Joey
Which Cortex-R you are targeting that supports both D16 and D32?
Thanks,
Joey
On Thu, Oct 17, 2013 at 3:13 PM, Sebastian Huber
sebastian.hu...@embedded-brains.de wrote:
Hello,
it seems that it is not possible to deduce from GCC built-in defines whether
we compile for the VFPv3-D16 or
There is no macro to indicate VFP variances. Probably you can check
CPU variance instead. As I know Cortex-R only support D16.
Joey
On Thu, Oct 17, 2013 at 3:47 PM, Sebastian Huber
sebastian.hu...@embedded-brains.de wrote:
On 2013-10-17 09:28, Joey Ye wrote:
Which Cortex-R you are targeting
On Thu, Oct 17, 2013 at 4:18 PM, Vladimir Simonov
vladimir.simo...@acronis.com wrote:
Thank you for pointing this problem.
So, on file systems with symlinks support playing with filenames as strings
is impossible.
This means that filename_normalize name is too pretentious - it will do
Thanks for contribution. See review comments at following.
On Wed, Oct 16, 2013 at 6:45 PM, Vladimir Simonov
vladimir.simo...@acronis.com wrote:
Hi,
Resending filename-normalize patch to correct list gcc-patches@gcc.gnu.org.
All context, please, see below.
+extern void filename_normalize
On Wed, Oct 16, 2013 at 6:45 PM, Vladimir Simonov
vladimir.simo...@acronis.com wrote:
There are many pro and contras, i.e. it adds additional, probably unnecessary
work on Linux
time but makes filenames shorter, it affects libiberty which is shared
between gcc/binutils/gdb,
but it may be
-Original Message-
From: Jakub Jelinek [mailto:ja...@redhat.com]
Sent: Thursday, October 10, 2013 16:48
To: Joey Ye
Cc: p...@bothner.com; a...@redhat.com; Tom Tromey; H.J. Lu; gcc-patches;
'Ian Lance Taylor'
Subject: Re: [PATCH, libgcc] Disable JCR section when java is not enabled
Dear Java maintainers, are you OK with this patch?
- Joey
-Original Message-
From: Ian Lance Taylor [mailto:i...@google.com]
Sent: Thursday, September 12, 2013 3:28
To: Joey Ye
Cc: gcc-patches; H.J. Lu; p...@bothner.com; a...@redhat.com; Tom Tromey
Subject: Re: [PATCH, libgcc
Updated to http://gcc.gnu.org/ml/gcc-patches/2012-12/msg01097.html
Build passes on arm-none-eabi and bootstrap passes on x86.
OK to trunk?
ChangeLog
* libgcc/Makefile.in: Include JAVA_IS_ENABLED in CFLAGS.
* libgcc/configure.ac (java_is_enabled): New variable.
*
OK for embedded 4.8 branch
- Joey
-Original Message-
From: Terry Guo
Sent: Tuesday, August 06, 2013 14:17
To: Joey Ye
Cc: gcc-patches@gcc.gnu.org
Subject: [arm-embedded] Request to backport thumb1 far jump patch to
embedded 4.8 branch
Hello Joey,
The thumb1 far jump patch
OK to embedded 4.8 branch.
-Original Message-
From: Terry Guo
Sent: Tuesday, August 06, 2013 11:59
To: Joey Ye
Cc: gcc-patches@gcc.gnu.org
Subject: [arm-embedded] Request to back port Cortex-R7 option support
patch
Hi Joey,
Attached patch is a backport to support cortex-r7
OK
- Joey
-Original Message-
From: Terry Guo
Sent: Wednesday, July 24, 2013 16:15
To: Joey Ye
Cc: gcc-patches@gcc.gnu.org
Subject: [arm-embedded] Patch to define multilibs for arm embedded-4_8-
branch
Hi Joey,
This patch is to define multilibs for recently created
embedded
Committed as 199680
-Original Message-
From: Ramana Radhakrishnan
Sent: Friday, May 10, 2013 18:13
To: Matthew Gretton-Dann
Cc: gcc-patches@gcc.gnu.org; Richard Earnshaw; d...@canonical.com; Patch
Tracking; Richard Biener; Joey Ye
Subject: Re: [RFA/ARM/4.7] Fix PR54974: Thumb literal pools don't handle
-Original Message-
From: Ramana Radhakrishnan
Sent: Thursday, April 11, 2013 4:40 PM
To: Joey Ye
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [PATCH][ARM][thumb1] Reduce lr save for leaf function with
non-far jump
On 12/20/12 09:53, Joey Ye wrote:
Current GCC thumb1 has
Ping ^ 2
-Original Message-
From: Joey Ye
Sent: Saturday, January 05, 2013 3:41 PM
To: Ramana Radhakrishnan
Cc: Joey Ye; gcc-patches@gcc.gnu.org
Subject: RE: [PATCH][ARM][thumb1] Reduce lr save for leaf function with
non-far jump
Ping
-Original Message-
From: Joey
Committed as r196535.
-Original Message-
From: Joseph Myers [mailto:jos...@codesourcery.com]
Sent: Monday, March 04, 2013 00:49
To: Joey Ye
Cc: gcc-patches@gcc.gnu.org
Subject: RE: [PATCH] Fix PR50293 - LTO plugin with space in path
On Mon, 18 Feb 2013, Joey Ye wrote:
+static char
-Original Message-
From: Georg-Johann Lay [mailto:g...@gcc.gnu.org]
Sent: Monday, March 04, 2013 02:42
To: Joey Ye
Cc: 'Joseph Myers'; gcc-patches@gcc.gnu.org
Subject: Re: [PATCH] Fix PR50293 - LTO plugin with space in path
Joey Ye schrieb:
Ping
Subject: RE: [PATCH] Fix
Ping
-Original Message-
From: Joey Ye [mailto:joey...@arm.com]
Sent: Monday, February 18, 2013 11:32
To: 'Joseph Myers'
Cc: gcc-patches@gcc.gnu.org
Subject: RE: [PATCH] Fix PR50293 - LTO plugin with space in path
Joseph, Thanks for your valuable comments. See my reply and new
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