On 22 November 2013 15:11, James Greenhalgh james.greenha...@arm.com wrote:
2013-11-22 James Greenhalgh james.greenha...@arm.com
* config/aarch64/arm_neon.h (vtbx1_psu8): Emulate behaviour
using other intrinsics.
(vtbx3_psu8): Likewise.
OK /Marcus
On 21 November 2013 13:43, Tejas Belagod tbela...@arm.com wrote:
Hi,
The attached patch fixes the movmode standard pattern name for ABI
conformance for vector modes.
Tested for aarch64-none-elf, aarch64_be-none-elf. OK for trunk?
Thanks,
Tejas Belagod
ARM.
Changelog:
2013-11-21
On 21 November 2013 13:43, Tejas Belagod tbela...@arm.com wrote:
Hi,
This patch fixes up the lane access patterns to be symmetric to the order in
which vectors are stored in registers.
Tested for aarch64-none-elf and aarch64_be-none-elf. OK for trunk?
Thanks,
Tejas Belagod
ARM.
On 21 November 2013 13:43, Tejas Belagod tbela...@arm.com wrote:
Hi,
The attached patch reorganizes reduc_* operations in aarch64-simd.md and
fixes up lane accesses in arm_neon.h to conform to ABI changes.
Tested for aarch64-none-elf and aarch64_be-none-elf. OK for trunk?
Thanks,
Tejas
On 21 November 2013 13:43, Tejas Belagod tbela...@arm.com wrote:
Hi,
The attached patch swaps around high and low bits of the source operands of
narrow patterns for big-endian so that they end up in the correct order in
the destination.
Tested for aarch64-none-elf and aarch64_be-none-elf.
2013/11/21 Alex Velenko alex.vele...@arm.com:
2013-11-21 Alex Velenko alex.vele...@arm.com
* config/aarch64/arm_neon.h (vmov_n_f32): Implemented in C.
(vmov_n_f64): Likewise.
(vmov_n_p8): Likewise.
(vmov_n_p16): Likewise.
On 18 November 2013 09:10, James Greenhalgh james.greenha...@arm.com wrote:
2013-11-18 James Greenhalgh james.greenha...@arm.com
* gcc/config/aarch64/aarch64-builtins.c
(aarch64_simd_itype): Remove.
(aarch64_simd_builtin_datum): Remove itype, add
qualifiers
On 19/11/13 16:50, Kyrill Tkachov wrote:
On 19/11/13 16:39, Marcus Shawcroft wrote:
Committed.
/Marcus
2013-11-19 Marcus Shawcroft marcus.shawcr...@arm.com
* config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Fix over
length lines.
Minor nit... but ENOPATCH
On 19/11/13 17:29, Alex Velenko wrote:
gcc/testsuite/
2013-11-19 Alex Velenko alex.vele...@arm.com
* gcc.target/aarch64/vneg_s.c (test_vneg_s8): fixed to not use
vector indexing.
(test_vneg_s16): Likewise.
(test_vneg_s32): Likewise.
On 14 November 2013 17:25, James Greenhalgh james.greenha...@arm.com wrote:
Now, every insn has a type, we don't need v8type anymore.
This patch removes v8type.
Tested on aarch64-none-elf with no regression.
OK?
OK
/Marcus
On 13 November 2013 00:04, Andrew Pinski
andrew.pin...@caviumnetworks.com wrote:
Hi all,
This patch implements the trap pattern for the AARCH64 back-end. I
used the brk #0 instruction as that is the breakpoint instruction
that GDB uses. I looked at what other targets did when the
instruction
On 15 November 2013 16:52, Tejas Belagod tbela...@arm.com wrote:
Hi,
The attached patch fixes all the reduc_* expansions to be BE-safe by moving
the scalar result to the LSB where RTL expects it. While moving it also adds
patterns that will give gcc the freedom to choose between
On 18 November 2013 18:02, Cesar Philippidis ce...@codesourcery.com wrote:
gcc.c-torture/execute/20101011-1.c test on aarch64. The reason why this
test fails is because aarch64 does not trap on integer division by zero.
Is this OK for trunk? If so, please commit it because I do not have an
On 19 November 2013 15:29, Cesar Philippidis ce...@codesourcery.com wrote:
Can someone please commit it for me?
Thanks,
Cesar
Done, with CangeLog
2013-11-19 Cesar Philippidis ce...@codesourcery.com
* gcc.c-torture/execute/20101011-1.c (__aarch64__):
Remove
Committed as obvious.
/Marcus
2013-11-19 Marcus Shawcroft marcus.shawcr...@arm.com
* config/aarch64/aarch64.h (PROFILE_HOOK): Fix whitespace.
diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
index 8b55a7b..228115f 100644
--- a/gcc/config/aarch64/aarch64.h
Committed.
2013-11-19 Marcus Shawcroft marcus.shawcr...@arm.com
* config/aarch64/aarch64.md
(aarch64_movdi_modelow, *add_shift_si_uxtw):
Adjust whitespace.diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 47f3eb3..9df156e 100644
--- a/gcc
Committed.
/Marcus
2013-11-19 Marcus Shawcroft marcus.shawcr...@arm.com
* config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Fix over
length lines.
On 14 November 2013 17:20, James Greenhalgh james.greenha...@arm.com wrote:
Hi,
Now that every instruction has a type attribute associated with it,
we don't need the simd_type or simd_mode attributes anymore. So,
remove them.
Regression tested for aarch64-none-elf with no regressions.
On 13 November 2013 11:16, Kyrill Tkachov kyrylo.tkac...@arm.com wrote:
2013-11-13 Kyrylo Tkachov kyrylo.tkac...@arm.com
* config/aarch64/aarch64.c: Include aarch-cost-tables.h.
(generic_rtx_cost_table): Remove.
(aarch64_rtx_costs): Use fields from cpu_cost_table.
*
On 13/11/13 15:32, James Greenhalgh wrote:
Hi,
This patch series performs a number of cleanups to the
-mtune/-mcpu/-march infrastructure for AArch64.
Our goals are:
* Remove the example pipeline models.
* Tune for Cortex-A53 by default.
* Provide sensible tuning for Cortex-A57.
On 7 November 2013 15:20, Cesar Philippidis ce...@codesourcery.com wrote:
On 11/6/13, 5:06 PM, Joseph S. Myers wrote:
You should be testing aarch64*-*-* so as to match aarch64_be targets.
Thank you for catching that. Please commit this new patch if is OK. I
don't have SVN access.
Applied as
On 24 October 2013 17:47, Steve Ellcey sell...@mips.com wrote:
I am not sure how we would fix the build issue to allow us to not
hardcode the newlib configure details into the libgfortran configure
script. The linker script that needs to be used to get a good link is
different depending on
On 5 November 2013 13:59, Tejas Belagod tbela...@arm.com wrote:
Changelog:
2013-11-05 Tejas Belagod tejas.bela...@arm.com
gcc/
* config/aarch64/aarch64-simd.md (vec_setmode): Add w - w option
to
the constraint.
OK /Marcus
On 29 October 2013 12:04, James Greenhalgh james.greenha...@arm.com wrote:
2013-10-29 James Greenhalgh james.greenha...@arm.com
* config/aarch64/arm_neon.h
(__ST2_LANE_FUNC): Better model data size.
(__ST3_LANE_FUNC): Likewise.
(__ST4_LANE_FUNC): Likewise.
On 5 November 2013 13:49, Tejas Belagod tbela...@arm.com wrote:
2013-11-05 Tejas Belagod tejas.bela...@arm.com
gcc/
* config/aarch64/aarch64-simd.md (vec_extract): New.
OK
/Marcus
On 21 October 2013 09:41, Kyrill Tkachov kyrylo.tkac...@arm.com wrote:
[gcc/testsuite]
2013-10-21 Kyrylo Tkachov kyrylo.tkac...@arm.com
* gcc.target/aarch64/c-output-mod-2.c: Fix for -fPIC.
* gcc.target/aarch64/c-output-mod-3.c: Likewise.
OK
/Marcus
On 15 October 2013 22:35, Mike Stump mikest...@comcast.net wrote:
Would be nice for a build/config person to weigh in or to upgrade and make
bullet proof the system against such failures. My take, by default, the
compile line should do something useful, and that should be enough for
On 17 October 2013 10:43, Michael Hudson-Doyle
michael.hud...@linaro.org wrote:
Resending as the previous attempt went missing...
2013-10-04 Michael Hudson-Doyle michael.hud...@linaro.org
* libatomic/configure.tgt (aarch64*): Remove code preventing
build.
for a few days before
committing to give folks knowledgable on reload and the associated
target hooks the opportunity to comment.
Thanks
/Marcus
2013-10-17 Ian Bolton ian.bol...@arm.com
Marcus Shawcroft marcus.shawcr...@arm.com
* config/aarch64/aarch64.c
On 17 October 2013 12:13, Kyrill Tkachov kyrylo.tkac...@arm.com wrote:
[gcc/]
2013-10-17 Kyrylo Tkachov kyrylo.tkac...@arm.com
* config/aarch64/aarch64.c (aarch64_print_operand): Handle 'c'.
[gcc/testsuite]
2013-10-17 Kyrylo Tkachov kyrylo.tkac...@arm.com
*
On 17 October 2013 17:27, James Greenhalgh james.greenha...@arm.com wrote:
Hi,
I spotted that the types of arguments to these intrinsics are wrong,
which results in all sorts of fun issues!
Fixed thusly, regression tested with aarch64.exp on aarch64-none-elf
with no issues.
OK?
Thanks,
this on the list 24h before committing.
/Marcus
2013-10-16 Marcus Shawcroft marcus.shawcr...@arm.com
* config/aarch64/aarch64.c (aarch64_preferred_reload_class): Adjust
handling of STACK_REG.diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index da3962f
that includes SP.
Regressed aarch64-none-elf, committed.
/Marcus
2013-10-16 Marcus Shawcroft marcus.shawcr...@arm.com
* config/aarch64/aarch64.c (aarch64_regno_regclass): Classify
FRAME_POINTER_REGNUM and ARG_POINTER_REGNUM as POINTER_REGS.diff --git a/gcc/config/aarch64
On 16 October 2013 15:58, James Greenhalgh james.greenha...@arm.com wrote:
Hi,
To move a scalar char/short/int around in the vector registers there
is no such instruction as:
dup v0, v0.h[0]
But there is:
dup h0, v0.h[0]
(Alternately there is dup v0.4h, v0.h[0], but I don't think that
On 1 October 2013 12:40, Marcus Shawcroft marcus.shawcr...@arm.com wrote:
On 30/09/13 13:40, Marcus Shawcroft wrote:
Well, I thought this patch would work for me, but it does not. It looks
like gcc_no_link is set to 'no' on my target because, technically, I can
link even if I don't use
On 11 October 2013 17:45, James Greenhalgh james.greenha...@arm.com wrote:
Hi,
The vtbx intrinsics are implemented in assembly without noting
that their tmp1 operand is early-clobber. This can, when the
wind blows the wrong way, result in us making a total mess of
the state of registers.
Hi,
The libstdc++-v3 testcase atomic/cons/49445.cc fails for a variety of
arm configurations that do not provide atomic builtins because the test
is not gated by dg-require-atomic-builtins
OK ?
/M
2013-10-10 Marcus Shawcroft marcus.shawcr...@arm.com
* testsuite/29_atomics/atomic
On 8 October 2013 17:10, Alex Velenko alex.vele...@arm.com wrote:
gcc/testsuite/
2013-10-08 Alex Velenko alex.vele...@arm.com
* gcc.target/aarch64/vneg_f.c: New testcase.
* gcc.target/aarch64/vneg_s.c: New testcase.
gcc/
2013-10-08 Alex Velenko alex.vele...@arm.com
On 8 October 2013 17:25, Alex Velenko alex.vele...@arm.com wrote:
gcc/testsuite/
2013-09-10 Alex Velenko alex.vele...@arm.com
* gcc.target/aarch64/vdiv_f.c: New testcase.
gcc/
2013-09-10 Alex Velenko alex.vele...@arm.com
* config/aarch64/arm_neon.h
On 8 October 2013 17:35, Alex Velenko alex.vele...@arm.com wrote:
2013-10-08 Alex Velenko alex.vele...@arm.com
* gcc.target/aarch64/vadd_f64.c: New testcase.
* gcc.target/aarch64/vsub_f64.c: New testcase.
gcc/
2013-10-08 Alex Velenko alex.vele...@arm.com
*
On 8 October 2013 17:45, Alex Velenko alex.vele...@arm.com wrote:
2013-10-08 Alex Velenko alex.vele...@arm.com
* gcc.target/aarch64/vclz.c: New testcase.
gcc/
2013-10-08 Alex Velenko alex.vele...@arm.com
* config/aarch64/arm_neon.h (vclz_s8): Asm replaced with
The test case add here:
http://gcc.gnu.org/ml/gcc-patches/2013-10/msg00474.html
Introduced an unprototyped call to abort() resulting in failures due to
unexepected warnings in aarch64-none-elf cross testing.
Committed to trunk as obvious.
Cheers
/Marcus
2013-10-09 Marcus Shawcroft
On 1 October 2013 12:40, Marcus Shawcroft marcus.shawcr...@arm.com wrote:
Patch attached.
/Marcus
2013-10-01 Marcus Shawcroft marcus.shawcr...@arm.com
* configure.ac (AC_CHECK_FUNCS_ONCE): Add for exit() then make
existing AC_CHECK_FUNCS_ONCE dependent on outcome.
Ping.
On 3 October 2013 23:43, Michael Hudson-Doyle michael.hud...@linaro.org wrote:
Hi,
As libatomic builds for and the tests pass on AArch64 (built on x86_64
but tested on a foundation model, logs and summary:
http://people.linaro.org/~mwhudson/libatomic.sum.txt
Hi, This patch was actually written by Ian, I'm submitting it on his
behalf.
/Marcus
In draft revisions of the A64 ISA it was not possible to use SP on the
right hand side of a register + register add. This meant that we needed
two scratch registers when a large constant was being added
, *sub_mul_imm_si_uxtw):
Remove k constraint.
2013-10-03 Marcus Shawcroft marcus.shawcr...@arm.com
PR target/58460
* gcc.target/aarch64/pr58460.c: New file.diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 830bbee..f3e004b 100644
--- a/gcc/config/aarch64
On 03/10/13 11:54, Marcus Shawcroft wrote:
This fixes PR58460, the add and sub shifted register instruction forms
in AArch64 do not permit the stack register. This patch removes k
constraint from the relevant patterns and adds reduced form of the test
case.
Regression test aarch64-none-elf
On 30 September 2013 14:23, Renlin Li renlin...@arm.com wrote:
OK for trunk?
Kind regards,
Renlin Li
gcc/ChangeLog:
2013-09-30 Renlin Li renlin...@arm.com
* config/arm/arm.c (arm_output_mi_thunk): Use plus_constant.
OK
/Marcus
On 30 September 2013 14:20, Renlin Li renlin...@arm.com wrote:
gcc/ChangeLog:
2013-09-30 Renlin Li renlin...@arm.com
* config/aarch64/aarch64.c (aarch64_expand_prologue): Use plus_constant.
(aarch64_expand_epilogue): Likewise.
OK
/Marcus
On 30/09/13 13:40, Marcus Shawcroft wrote:
Well, I thought this patch would work for me, but it does not. It looks
like gcc_no_link is set to 'no' on my target because, technically, I can
link even if I don't use a linker script. I just can't find any
functions.
In which case gating
2013-09-30 Vidya Praveen vidyaprav...@arm.com
* aarch64-simd.md
(aarch64_ANY_EXTEND:suADDSUB:optabl2mode_internal): Rename to
...
(aarch64_ANY_EXTEND:suADDSUB:optablmode_hi_internal): ... this;
Insert '\t' to output template.
On 28 September 2013 11:57, Venkataramanan Kumar
venkataramanan.ku...@linaro.org wrote:
2013-10-28 Venkataramanan Kumar venkataramanan.ku...@linaro.org
* config/aarch64/aarch64.h (MCOUNT_NAME): Define.
(NO_PROFILE_COUNTERS): Likewise.
(PROFILE_HOOK): Likewise.
On 30 September 2013 09:52, James Greenhalgh james.greenha...@arm.com wrote:
Hi,
aarch64-common.c. These functions expect a particular form
You meant aarch-common.c here and in the title ;-)
This is fine by me, but as a config/arm/ change needs OK from Ramana or Richard.
/Marcus
On 27/09/13 17:08, Steve Ellcey wrote:
On Thu, 2013-09-26 at 14:47 +0100, Marcus Shawcroft wrote:
I'm in two minds about whether further sticky tape of this form is the
right approach or whether the original patch should be reverted until a
proper fix that does not regress the tree can
not regress the tree can be found.
Thoughts?
2013-09-26 Marcus Shawcroft marcus.shawcr...@arm.com
* configure.ac (AC_CHECK_FUNCS_ONCE): Make if statement
dependent on gcc_no_link.
Cheers
/Marcusdiff --git a/libgfortran/configure.ac b/libgfortran/configure.ac
index 4609eba..411ab38
On 4 June 2013 20:49, Steve Ellcey sell...@mips.com wrote:
This patch allows me to build libgfortran for a cross-compiling toolchain
using newlib. Currently the checks done by AC_CHECK_FUNCS_ONCE fail with
my toolchain because the compile/link fails due to the configure script not
using the
On 20 September 2013 15:18, Renlin Li renli...@arm.com wrote:
2013-09-20 Renlin Li renlin...@arm.com
* config/aarch64/aarch64.c (aarch64_expand_prologue): Use plus_constant.
(aarch64_expand_epilogue): Likewise.
(aarch64_legitimize_reload_address): Likewise.
OK
/Marcus
On 10 September 2013 18:12, Yufeng Zhang yufeng.zh...@arm.com wrote:
gcc/
* config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args):
Call aarch64_simd_expand_args to update op[argc].
OK
/Marcus
On 13/09/13 19:39, James Greenhalgh wrote:
Hi,
This patch adds intrinsics for vcopyq_laneq_pfsu8,16,32,64.
These are implemented in an optimal way using the vget_lane and vset_lane
intrinsics and a combine pattern.
I've added a testcase and run a full regression run for aarch64-none-elf.
On 13/09/13 19:28, James Greenhalgh wrote:
Hi,
This patch converts the vmulq_laneq_fsu16,32,64 intrinsics
in arm_neon.h to a C implementation.
OK
/Marcus
On 13/09/13 19:31, James Greenhalgh wrote:
Hi,
This patch reimpliments the vmlas_lane and the fmas
intrinsics in C, and adds new combiner patterns to support
this.
OK
/Marcus
On 06/09/13 16:06, James Greenhalgh wrote:
gcc/
2013-09-06 James Greenhalgh james.greenha...@arm.com
* config/aarch64/arm_neon.h
(vcvtx_high_f32_f64): Fix parameters.
OK
/Marcus
On 10 September 2013 09:23, James Greenhalgh james.greenha...@arm.com wrote:
2013-09-10 James Greenhalgh james.greenha...@arm.com
* config/aarch64/aarch64.md (generic_sched): New.
* config/aarch64/aarch64-generic.md (load): Make conditional
on generic_sched
On 6 September 2013 09:18, James Greenhalgh james.greenha...@arm.com wrote:
Hi,
Most of the vector-by-element instructions in AArch64 have the restriction
that, if the vector they are taking an element from has type h
then it must be in a register from the lower half of the vector register
On 5 September 2013 17:21, Tejas Belagod tbela...@arm.com wrote:
Hi,
This patch fixes vdupbhsd_laneq_* intrinsics in arm_neon.h to have the
correct lane parameter as opposed to the present '0'.
Tested on aarch64-none-elf. OK for trunk?
Thanks,
Tejas Belagod
ARM.
Changelog:
On 6 September 2013 11:45, James Greenhalgh james.greenha...@arm.com wrote:
The signed variants of the qtbl and qtbx intrinsics currently
take an int8x8,16 for their control vector parameter.
This should be a uint8x8,16 parameter.
Fixed as attached and checked against aarch64.exp on
On 4 September 2013 17:42, Ian Bolton ian.bol...@arm.com wrote:
(This patch supercedes this one:
http://gcc.gnu.org/ml/gcc-patches/2013-07/msg01462.html)
2013-09-04 Ian Bolton ian.bol...@arm.com
gcc/
* config/aarch64/aarch64.c (aarch64_preferred_reload_class):
Return
On 3 September 2013 12:30, James Greenhalgh james.greenha...@arm.com wrote:
2013-09-03 James Greenhalgh james.greenha...@arm.com
* config/aarch64/aarch64.md
(type): Remove frecpe, frecps, frecpx.
(aarch64_frecpFRECP:frecp_suffixmode): Move to aarch64-simd.md,
On 4 September 2013 15:47, Yufeng Zhang yufeng.zh...@arm.com wrote:
gcc/
* config/aarch64/aarch64-option-extensions.def: Add
AARCH64_OPT_EXTENSION of 'crc'.
* config/aarch64/aarch64.h (AARCH64_FL_CRC): New define.
(AARCH64_ISA_CRC): Ditto.
*
On 23 July 2013 17:40, Janis Johnson janis_john...@mentor.com wrote:
On 07/22/2013 02:59 AM, Vidya Praveen wrote:
Hello,
There are 42 test files (25 under gcc.dg) that specifies
{ dg-add-options bind_pic_locally }
in the regression testsuite. The procedure add_options_for_bind_pic_locally
On 20 August 2013 12:21, Tejas Belagod tbela...@arm.com wrote:
Hi,
This patch replaces all inline asm implementations of vget_low_* in
arm_neon.h with optimized implementations using other neon intrinsics.
Tested with aarch64-none-elf.
OK?
This is OK. /Marcus
On 20 August 2013 16:04, Vidya Praveen vidyaprav...@arm.com wrote:
2013-08-20 Vidya Praveen vidyaprav...@arm.com
* config/aarch64/aarch64.md (unspec): Add UNSPEC_SISD_SSHL,
UNSPEC_SISD_USHL, UNSPEC_USHL_2S, UNSPEC_SSHL_2S, UNSPEC_SISD_NEG.
(optabmode3_insn): Remove.
Hi Venkat,
On 3 August 2013 19:01, Venkataramanan Kumar
venkataramanan.ku...@linaro.org wrote:
This patch adds macros to support gprof in Aarch64. The difference
from the previous patch is that the compiler, while generating
mcount routine for an instrumented function, also passes the return
On 9 August 2013 10:48, James Greenhalgh james.greenha...@arm.com wrote:
---
gcc/
2013-08-09 James Greenhalgh james.greenha...@arm.com
* config/aarch64/aarch64-simd-builtins.def
(dup_lane_scalar): Remove.
* config/aarch64/aarch64-simd.md
On 26 July 2013 12:06, Yufeng Zhang yufeng.zh...@arm.com wrote:
Hi,
This patch changes to skip gcc.dg/lower-subreg-1.c for aarch64*-*-*. The
word mode in aarch64 is 64-bit so the lower-subreg pass won't happen in this
test case. The test is currently skipped on aarch64 with lp64 due to the
On 05/08/13 21:57, James Greenhalgh wrote:
This patch fixes up the vget_lane RTL patterns to better
exploit the behaviour of their target instructions, and
to allow variants keeping the result in the SIMD register file.
---
gcc/
2013-08-05 James Greenhalgh james.greenha...@arm.com
On 03/08/13 19:01, Venkataramanan Kumar wrote:
2013-08-02 Venkataramanan Kumar venkataramanan.ku...@linaro.org
* config/aarch64/aarch64.h (MCOUNT_NAME): Define.
(NO_PROFILE_COUNTERS): Likewise.
(PROFILE_HOOK): Likewise.
(FUNCTION_PROFILER):
On 31 July 2013 15:55, Sofiane Naci sofiane.n...@arm.com wrote:
Hi,
This patch is the first of a series of patches that aim to unify instruction
classification between the ARM and AARCH64 backends.
This patch updates the definition of the type attribute, used in the ARM
backend, in the
On 31 July 2013 15:56, Sofiane Naci sofiane.n...@arm.com wrote:
Hi,
This patch is part of the ongoing work to unify instruction classification
between the ARM and AARCH64 backends.
This patch wires up the cortex-a53 pipeline description defined in the ARM
backend to be used in the AARCH46
On 28/07/13 23:03, Maxim Kuvyrkov wrote:
While verifying license compliance for GCC and its libraries I noticed that
several libgcc files that end up in the final library are licensed under
GPL-3.0+ instead of GPL-3.0-with-GCC-exception.
This is, obviously, was not the intention of developers
On 23 July 2013 13:35, Ian Bolton ian.bol...@arm.com wrote:
2013-07-23 Ian Bolton ian.bol...@arm.com
gcc/
* config/aarch64/aarch64-simd.md (negmode2): Offer alternative
that uses vector r
Cheers,
Ian
OK
/Marcus
On 19 July 2013 11:45, Yufeng Zhang yufeng.zh...@arm.com wrote:
Hi,
Following the work in AArch64 GAS to unify the ABI command line interface,
this patch updates the compiler driver to pass -mabi=* directly to the
assembler.
The related GAS patch is here:
On 27 June 2013 17:00, Yufeng Zhang yufeng.zh...@arm.com wrote:
This patch fixes the bug that pointer-typed argument passed on stack is not
padded properly in ILP32.
OK for the trunk?
OK
/Marcus
On 4 July 2013 08:07, Yufeng Zhang yufeng.zh...@arm.com wrote:
Hi,
This patch adds support for the register wsp; in ILP32, this is necessary
in order to support the global register variable associated the stack
pointer with the syntax asm (wsp); it is used in libgloss to get the stack
Hi,
Adding support for tiny model GOT access. Regressed, committed.
/Marcus
2013-07-15 Marcus Shawcroft marcus.shawcr...@arm.com
* config/aarch64/aarch64-protos.h (aarch64_symbol_type):
Define SYMBOL_TINY_GOT, update comment.
* config/aarch64/aarch64.c
On 12 Jul 2013, at 19:49, Ian Bolton ian.bol...@arm.com wrote:
2013-07-12 Ian Bolton ian.bol...@arm.com
gcc/
* config/aarch64/arm_neon.h (vabs_s64): New function.
testsuite/
* gcc.target/aarch64/scalar_intrinsics.c (test_vabs_s64): Added new
On 12/07/13 11:25, Tejas Belagod wrote:
Hi,
This patch adds support for AdvSIMD MOVI/MVNI Vd.T, #imm8, MSL, #amount.
OK?
Thanks,
Tejas Belagod
ARM.
Changelog:
2013-07-12 Tejas Belagod tejas.bela...@arm.com
gcc/
* config/aarch64/aarch64-protos.h
On 10 July 2013 16:06, Andreas Schwab sch...@suse.de wrote:
This is expected by some software (SWI Prolog checks for it).
Andreas.
OK, Thank you.
... this time copying in gcc-patches from an account that won't get bounced...
/Marcus
, the actual effect is to look for the three tokens,
in order, anywhere in the dump file. The test fails for at least arm-*
and aarch64-* where we happen to have the appropriate three tokens
spread through the dump file.
/Marcus
2013-07-04 Marcus Shawcroft marcus.shawcr...@arm.com
* gcc.dg
On 02/07/13 15:14, Yufeng Zhang wrote:
gcc/
* config/aarch64/aarch64.h (enum arm_abi_type): Remove.
(ARM_ABI_AAPCS64): Ditto.
(arm_abi): Ditto.
(ARM_DEFAULT_ABI): Ditto.
OK
/Marcus
On 02/07/13 10:01, James Greenhalgh wrote:
2013-07-02 James Greenhalgh james.greenha...@arm.com
* config/aarch64/aarch64-builtins.c
(aarch64_simd_expand_builtin): Handle AARCH64_SIMD_STORE1.
* config/aarch64/aarch64-simd-builtins.def (ld1): New.
(st1):
On 27 June 2013 17:09, Ian Bolton ian.bol...@arm.com wrote:
2013-06-27 Ian Bolton ian.bol...@arm.com
gcc/
* config/aarch64/aarch64.md (*extr_insv_regmode): New pattern.
testsuite/
* gcc.target/aarch64/bfxil_1.c: New test.
* gcc.target/aarch64/bfxil_2.c: Likewise.
On 24 June 2013 16:57, Ian Bolton ian.bol...@arm.com wrote:
2013-06-24 Ian Bolton ian.bol...@arm.com
* gcc.target/config/aarch64/insv_1.c: Update to show it doesn't work
on big endian.
* gcc.target/config/aarch64/insv_2.c: New test for big endian.
*
On 25 June 2013 17:48, Tejas Belagod tbela...@arm.com wrote:
2013-06-25 Tejas Belagod tejas.bela...@arm.com
gcc/
* config/aarch64/aarch64-protos.h (cpu_vector_cost): New.
(tune_params): New member 'const vec_costs'.
* config/aarch64/aarch64.c (generic_vector_cost):
On 25 June 2013 18:04, Ian Bolton ian.bol...@arm.com wrote:
2013-06-25 Ian Bolton ian.bol...@arm.com
gcc/
* config/aarch64/aarch64-simd.md (absdi2): Support abs for
DI mode.
testsuite/
* gcc.target/aarch64/abs_1.c: New test.
OK
/Marcus
This test case is too large to fit in the aarch64 tiny memory model...
OK?
/Marcus
2013-06-28 Marcus Shawcroft marcus.shawcr...@arm.com
* testsuite/libgomp.fortran/strassen.f90:
Add dg-skip-if aarch64_tiny.diff --git a/libgomp/testsuite/libgomp.fortran/strassen.f90 b/libgomp
This patch replaces the use of aarch64_symbolic_constant_p with the
(very similar) aarch64_classify_symbolic_expression.
Tested on aarch64-none-elf. Committed.
/Marcus
2013-06-28 Marcus Shawcroft marcus.shawcr...@arm.com
* config/aarch64/aarch64-protos.h
Updating a comment w.r.t address models.
/Marcus
2013-06-28 Marcus Shawcroft marcus.shawcr...@arm.com
* config/aarch64/aarch64-protos.h (aarch64_symbol_type):
Update comment w.r.t SYMBOL_TINY_ABSOLUTE.diff --git a/gcc/config/aarch64/aarch64-protos.h b/gcc/config/aarch64
Fixing the layout in aarch64_cannot_force_const_mem()...
/Marcus
2013-06-28 Marcus Shawcroft marcus.shawcr...@arm.com
* config/aarch64/aarch64.c (aarch64_cannot_force_const_mem):
Adjust layout.
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index a394283
On 25/06/13 17:04, Yufeng Zhang wrote:
This patch carries out minor refactoring on aarch64_add_offset; it
replaces 'DImode' and 'Pmode' with 'mode'.
OK for the trunk?
OK
/Marcus
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