[Bug target/104689] aarch64: libgcc: DW_CFA_val_expression is not supported for RA_SIGN_SATE register

2022-11-20 Thread ramana at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104689 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug other/107620] Build errors when using sphinx

2022-11-13 Thread ramana at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107620 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug tree-optimization/107326] [13 Regression] ICE: verify_gimple failed (error: type mismatch in binary expression) since r13-3219-g25413fdb2ac249

2022-11-13 Thread ramana at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107326 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug target/92999] [armhf] struct with adjacent __fp16's copies wrongly

2022-11-07 Thread ramana at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92999 Ramana Radhakrishnan changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |ramana at gcc dot gnu.org

[Bug target/105929] [AArch64] armv8.4-a allows atomic stp. 64-bit constants can use 2 32-bit halves with _Atomic or volatile

2022-11-05 Thread ramana at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105929 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug debug/53135] Duplicates cause size explosion (vta/dwarf)

2022-11-05 Thread ramana at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53135 --- Comment #20 from Ramana Radhakrishnan --- (In reply to Jeffrey A. Law from comment #19) > I think it's just workaround that got installed in 2012, not a real fix. > Of course, 10 years later one could ask if the workaround has become the >

[Bug target/107533] New: Inefficient code sequence for fp16 testcase on aarch64

2022-11-05 Thread ramana at gcc dot gnu.org via Gcc-bugs
Component: target Assignee: unassigned at gcc dot gnu.org Reporter: ramana at gcc dot gnu.org Target Milestone: --- Derived from PR92999 struct phalf { __fp16 first; __fp16 second; }; struct phalf phalf_copy(struct phalf* src) __attribute__((noinline)); struct phalf

[Bug target/92999] [armhf] struct with adjacent __fp16's copies wrongly

2022-11-05 Thread ramana at gcc dot gnu.org via Gcc-bugs
||ramana at gcc dot gnu.org Ever confirmed|0 |1 Known to fail||13.0 Last reconfirmed||2022-11-05 --- Comment #2 from Ramana Radhakrishnan --- confirmed on trunk. I think

[Bug debug/100523] [11/12/13 Regression] armv8.1-m.main -fcompare-debug failure with -O -fmodulo-sched -mtune=cortex-a53

2022-11-04 Thread ramana at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100523 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug target/94604] support for the ETSI basic operations

2022-11-04 Thread ramana at gcc dot gnu.org via Gcc-bugs
|WAITING Last reconfirmed||2022-11-04 CC||ramana at gcc dot gnu.org --- Comment #3 from Ramana Radhakrishnan --- I'd suggest moving this to Waiting given the time without a response and the correct links

[Bug debug/53135] Duplicates cause size explosion (vta/dwarf)

2022-11-04 Thread ramana at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53135 --- Comment #18 from Ramana Radhakrishnan --- Since the fix got installed in 2012 this really should have been fixed from 4.8.0 onwards. Should we really keep this still open or can we close this out ? Ramana

[Bug target/97726] simd intrinsics tests fail on armeb

2021-04-09 Thread ramana at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97726 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug target/96372] [11 regression] arm/ivopts.c fails since r11-2012

2021-04-09 Thread ramana at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96372 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug tree-optimization/88709] Improve store-merging

2019-05-10 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88709 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug target/89400] [7/8/9/10 Regression] ICE: output_operand: invalid %-code with -march=armv6kz -mthumb -munaligned-access

2019-05-02 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89400 Ramana Radhakrishnan changed: What|Removed |Added CC||marxin at gcc dot gnu.org ---

[Bug target/90308] ICE in output_operand: invalid %-code

2019-05-02 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90308 Ramana Radhakrishnan changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/86538] GCC should define a macro to specify if LSE is enabled or not

2019-05-01 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86538 Ramana Radhakrishnan changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug target/86538] GCC should define a macro to specify if LSE is enabled or not

2019-05-01 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86538 --- Comment #7 from Ramana Radhakrishnan --- Author: ramana Date: Wed May 1 15:27:40 2019 New Revision: 270770 URL: https://gcc.gnu.org/viewcvs?rev=270770=gcc=rev Log: [Patch AArch64] Add __ARM_FEATURE_ATOMICS This keeps coming up

[Bug target/86538] GCC should define a macro to specify if LSE is enabled or not

2019-04-30 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86538 --- Comment #6 from Ramana Radhakrishnan --- Author: ramana Date: Tue Apr 30 14:57:50 2019 New Revision: 270702 URL: https://gcc.gnu.org/viewcvs?rev=270702=gcc=rev Log: [Patch AArch64] Add __ARM_FEATURE_ATOMICS This keeps coming up

[Bug target/86538] GCC should define a macro to specify if LSE is enabled or not

2019-04-30 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86538 --- Comment #5 from Ramana Radhakrishnan --- Author: ramana Date: Tue Apr 30 12:02:30 2019 New Revision: 270689 URL: https://gcc.gnu.org/viewcvs?rev=270689=gcc=rev Log: [Patch AArch64] Add __ARM_FEATURE_ATOMICS This keeps coming up

[Bug target/86538] GCC should define a macro to specify if LSE is enabled or not

2019-04-30 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86538 --- Comment #4 from Ramana Radhakrishnan --- Author: ramana Date: Tue Apr 30 11:22:11 2019 New Revision: 270686 URL: https://gcc.gnu.org/viewcvs?rev=270686=gcc=rev Log: [Patch AArch64] Add __ARM_FEATURE_ATOMICS This keeps coming up repeatedly

[Bug target/86538] GCC should define a macro to specify if LSE is enabled or not

2019-04-30 Thread ramana at gcc dot gnu.org
||2019-04-30 CC||ramana at gcc dot gnu.org Resolution|WONTFIX |--- Assignee|unassigned at gcc dot gnu.org |ramana at gcc dot gnu.org Target Milestone|--- |7.5

[Bug middle-end/90075] [7/8 Regression] [AArch64] ICE during RTL pass when member of union passed to copysignf

2019-04-23 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90075 Ramana Radhakrishnan changed: What|Removed |Added CC||rearnsha at gcc dot gnu.org ---

[Bug middle-end/90075] [7/8 Regression] [AArch64] ICE during RTL pass when member of union passed to copysignf

2019-04-23 Thread ramana at gcc dot gnu.org
||ramana at gcc dot gnu.org Assignee|unassigned at gcc dot gnu.org |ramana at gcc dot gnu.org --- Comment #2 from Ramana Radhakrishnan --- I'll take a look.

[Bug target/89093] [9 Regression] C++ exception handling clobbers d8 VFP register

2019-04-12 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89093 --- Comment #45 from Ramana Radhakrishnan --- (In reply to Jakub Jelinek from comment #42) > Thanks for the explanation. > In that case, I think it would be better to just add > __attribute__((target("general-regs-only"))) > to the > #ifdef

[Bug target/89093] [9 Regression] C++ exception handling clobbers d8 VFP register

2019-03-22 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89093 Ramana Radhakrishnan changed: What|Removed |Added Attachment #45552|0 |1 is obsolete|

[Bug target/89093] [9 Regression] C++ exception handling clobbers d8 VFP register

2019-02-22 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89093 --- Comment #30 from Ramana Radhakrishnan --- (In reply to Jakub Jelinek from comment #29) > Ramana, any progress on this? I'm still trying to get the various spec files and the t-multilib bits sorted and half-term has intervened here in the

[Bug target/89093] [9 Regression] C++ exception handling clobbers d8 VFP register

2019-02-08 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89093 --- Comment #27 from Ramana Radhakrishnan --- (In reply to Bernd Edlinger from comment #25) > you might consider adding something like that to your patch: > > Index: elf.h > === >

[Bug target/89093] [9 Regression] C++ exception handling clobbers d8 VFP register

2019-01-29 Thread ramana at gcc dot gnu.org
|unassigned at gcc dot gnu.org |ramana at gcc dot gnu.org --- Comment #21 from Ramana Radhakrishnan --- (In reply to Jakub Jelinek from comment #19) > (In reply to Florian Weimer from comment #18) > > (In reply to Ramana Radhakrishnan from comment #15) > > > Testing this and

[Bug target/89093] [9 Regression] C++ exception handling clobbers d8 VFP register

2019-01-29 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89093 --- Comment #16 from Ramana Radhakrishnan --- (In reply to Jakub Jelinek from comment #14) > We require GNU make, so one can use something like: > unwind-arm.o unwind-c.o libunwind.o pr-support.o: CFLAGS += -mfpu=none > or similar in

[Bug target/89093] [9 Regression] C++ exception handling clobbers d8 VFP register

2019-01-29 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89093 Ramana Radhakrishnan changed: What|Removed |Added Attachment #45547|0 |1 is obsolete|

[Bug target/89093] [9 Regression] C++ exception handling clobbers d8 VFP register

2019-01-29 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89093 Ramana Radhakrishnan changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug target/89093] [9 Regression] C++ exception handling clobbers d8 VFP register

2019-01-29 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89093 --- Comment #10 from Ramana Radhakrishnan --- Created attachment 45547 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=45547=edit untested prototype patch. Not sure if this is complete yet but it gives a framework to dig further.

[Bug target/89093] [9 Regression] C++ exception handling clobbers d8 VFP register

2019-01-28 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89093 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug target/84923] [8 regression] gcc.dg/attr-weakref-1.c failed on aarch64

2019-01-28 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84923 Ramana Radhakrishnan changed: What|Removed |Added Status|RESOLVED|NEW Resolution|FIXED

[Bug target/88734] [8 Regression] AArch64's ACLE intrinsics give an ICE instead of compile error when option mismatch.

2019-01-25 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88734 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug target/88510] GCC generates inefficient U64x2/v2di scalar multiply for NEON32

2019-01-14 Thread ramana at gcc dot gnu.org
|UNCONFIRMED |NEW Last reconfirmed||2019-01-14 CC||ramana at gcc dot gnu.org Target Milestone|--- |10.0 Ever confirmed|0 |1 --- Comment #3 from Ramana

[Bug rtl-optimization/87871] [9 Regression] testcases fail after r265398 on arm

2018-12-14 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87871 Ramana Radhakrishnan changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug rtl-optimization/87871] [9 Regression] testcases fail after r265398 on arm

2018-12-14 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87871 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug target/88013] can't vectorize rgb to grayscale conversion code

2018-12-14 Thread ramana at gcc dot gnu.org
||2018-12-14 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #8 from Ramana Radhakrishnan --- > vshr.u16q9, q9, #8 > vshr.u16q8, q8, #8 >

[Bug tree-optimization/88259] vectorization failure for a typical loop for getting max value and index

2018-11-29 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88259 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug debug/65771] ICE (in loc_list_from_tree, at dwarf2out.c:14964) on arm-linux-gnueabihf

2018-11-19 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65771 Ramana Radhakrishnan changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/53440] [arm] generic thunk code fails for method which uses '...'

2018-11-19 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53440 Ramana Radhakrishnan changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug tree-optimization/43721] Failure to optimise (a/b) and (a%b) into single __aeabi_idivmod call

2018-11-19 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=43721 Ramana Radhakrishnan changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/87867] [7/8 regression] ICE on virtual destructor (-mlong-calls -ffunction-sections) on arm-none-eabi

2018-11-09 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87867 --- Comment #2 from Ramana Radhakrishnan --- Author: ramana Date: Fri Nov 9 12:50:51 2018 New Revision: 265965 URL: https://gcc.gnu.org/viewcvs?rev=265965=gcc=rev Log: [PATCH, arm] Backport -- Fix ICE during thunk generation with -mlong-calls

[Bug target/87330] ICE in scan_rtx_reg, at regrename.c:1097

2018-10-30 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87330 Ramana Radhakrishnan changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug middle-end/86815] [8/9 regression] ICE on valid code on armhf

2018-10-11 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86815 Ramana Radhakrishnan changed: What|Removed |Added Status|UNCONFIRMED |WAITING Last reconfirmed|

[Bug target/87565] suboptimal memory-indirect tailcalls on arm

2018-10-10 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87565 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug target/82227] ARM thumb inefficient tailcall return sequence (multiple pops)

2018-10-10 Thread ramana at gcc dot gnu.org
|UNCONFIRMED |NEW Last reconfirmed||2018-10-10 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 Severity|normal |enhancement --- Comment #1 from Ramana

[Bug bootstrap/84199] Error building gcc 7.3.0 on Odroid XU4 (ARM, Ubuntu): cannot load liblto_plugin.so

2018-10-10 Thread ramana at gcc dot gnu.org
||ramana at gcc dot gnu.org Resolution|--- |INVALID --- Comment #1 from Ramana Radhakrishnan --- I don't think anyone is going to go fetch an odroid for this - it sounds like a problem in your environment as many folks are building / able

[Bug sanitizer/86755] [ASAN] Libasan failed to be build for arm with -mthumb and -fno-omit-frame-pointer

2018-10-10 Thread ramana at gcc dot gnu.org
||2018-10-10 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #2 from Ramana Radhakrishnan --- Confirmed.

[Bug middle-end/86815] [8/9 regression] ICE on valid code on armhf

2018-10-10 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86815 --- Comment #9 from Ramana Radhakrishnan --- (In reply to Martin Liška from comment #8) > Unfortunately I can't reproduce that with cross compiler. Me neither today. Gianfranco , could you check if you are running out of memory on the machine

[Bug middle-end/86815] [8/9 regression] ICE on valid code on armhf

2018-10-09 Thread ramana at gcc dot gnu.org
CC||ramana at gcc dot gnu.org --- Comment #7 from Ramana Radhakrishnan --- (In reply to Gianfranco from comment #6) > Created attachment 44485 [details] > another failing output > > I'm attaching another file suffering from the same issue (mostly every cp

[Bug target/86968] Unaligned big-endian (scalar_storage_order) access on armv7-a yields 4 ldrb instructions rather than ldr+rev

2018-10-09 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86968 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug c/85870] [6/7/8/9 Regression][LTO1] ICE in linemap_line_start, at libcpp/line-map.c:794

2018-10-09 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85870 --- Comment #8 from Ramana Radhakrishnan --- (In reply to Martin Liška from comment #5) > (In reply to Ramana Radhakrishnan from comment #4) > > (In reply to Martin Liška from comment #3) > > > Can't reproduce with GCC 7.3.0 on x86_64: > > > >

[Bug c/85870] [6/7/8/9 Regression][LTO1] ICE in linemap_line_start, at libcpp/line-map.c:794

2018-10-09 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85870 Ramana Radhakrishnan changed: What|Removed |Added Status|WAITING |NEW --- Comment #4 from Ramana

[Bug target/87563] [9 regression ] ICE with -march=armv8-a+sve

2018-10-09 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87563 Ramana Radhakrishnan changed: What|Removed |Added Target||aarch64-none-elf Target

[Bug target/87563] [9 regression ] ICE with -march=armv8-a+sve

2018-10-09 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87563 Ramana Radhakrishnan changed: What|Removed |Added Keywords||ice-on-valid-code

[Bug target/87563] New: [9 regression ] ICE with -march=armv8-a+sve

2018-10-09 Thread ramana at gcc dot gnu.org
Assignee: unassigned at gcc dot gnu.org Reporter: ramana at gcc dot gnu.org Target Milestone: --- Somewhere between r261702 and r262881 the following testcase ICEs with -Ofast -O3 -march=armv8-a+sve. int a, b, c, *e; int d[2]; void f() { while (c) { d[0] = 4; d[1

[Bug target/86673] [8/9 regression] inline asm sometimes ignores 'register asm("reg")' declarations

2018-07-25 Thread ramana at gcc dot gnu.org
, ||arm-none-eabi Status|UNCONFIRMED |NEW Last reconfirmed||2018-07-25 CC||ramana at gcc dot gnu.org Known to work||7.2.0

[Bug middle-end/86640] [8/9 regression] ICE in combine

2018-07-23 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86640 Ramana Radhakrishnan changed: What|Removed |Added Keywords||ice-on-valid-code

[Bug middle-end/86640] New: [8/9 regression] ICE in combine

2018-07-23 Thread ramana at gcc dot gnu.org
Assignee: unassigned at gcc dot gnu.org Reporter: ramana at gcc dot gnu.org Target Milestone: --- char fn1() { long long b[5]; for (int a = 0; a < 5; a++) b[a] = ~0ULL; return b[3]; } $> arm-none-linux-gnueabihf-gcc -c -O3 -mfpu=neon -mfloat-abi=hard -march

[Bug target/86555] unaligned address for ldrd/strd on armv5e

2018-07-18 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86555 --- Comment #4 from Ramana Radhakrishnan --- (In reply to Khem Raj from comment #2) > we can avoid the problem by altering the structure, thats not an issue, but > do you think compiler is right here by assuming to generate LDRD on a 4byte >

[Bug tree-optimization/80641] missed optimization with with std::vector resize in loop

2018-07-16 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80641 Ramana Radhakrishnan changed: What|Removed |Added Known to fail||7.3.1 --- Comment #14 from

[Bug tree-optimization/80641] missed optimization with with std::vector resize in loop

2018-07-16 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80641 Ramana Radhakrishnan changed: What|Removed |Added Known to work||6.4.1, 8.1.0 Known to fail|

[Bug tree-optimization/80641] missed optimization with with std::vector resize in loop

2018-07-16 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80641 --- Comment #12 from Ramana Radhakrishnan --- (In reply to Martin Sebor from comment #11) > *** Bug 86516 has been marked as a duplicate of this bug. *** (In reply to Paul Gotch from comment #10) > I'm afraid the changes made to libstdc++ have

[Bug tree-optimization/85804] [8/9 Regression][AArch64] Mis-compilation of loop with strided array access and xor reduction

2018-07-13 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85804 --- Comment #3 from Ramana Radhakrishnan --- (In reply to Ramana Radhakrishnan from comment #2) > Patch being discussed here. > https://gcc.gnu.org/ml/gcc-patches/2018-05/msg01026.html Bin are you still working on this ?

[Bug target/85854] Performance regression from gcc 4.9.2

2018-07-11 Thread ramana at gcc dot gnu.org
||2018-07-11 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #1 from Ramana Radhakrishnan --- I'm unable to build the pre-processed file with 4.9 - is it possible for you to attach

[Bug target/86209] Peephole does not happen because the type of zero/sign extended operands is not the same.

2018-07-11 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86209 --- Comment #13 from Ramana Radhakrishnan --- Sameera, If you are working on this , can you please assign this to yourself ? Ramana

[Bug target/86209] Peephole does not happen because the type of zero/sign extended operands is not the same.

2018-07-11 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86209 Ramana Radhakrishnan changed: What|Removed |Added Keywords||missed-optimization

[Bug target/85910] config/aarch64/aarch64.c:15653:12: warning: duplicated ‘if’ condition

2018-07-11 Thread ramana at gcc dot gnu.org
||2018-07-11 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #1 from Ramana Radhakrishnan --- Confirmed.

[Bug libgcc/85967] [ARM] No unwinding support for division functions

2018-07-11 Thread ramana at gcc dot gnu.org
||2018-07-11 CC||ramana at gcc dot gnu.org Assignee|unassigned at gcc dot gnu.org |ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #3 from Ramana Radhakrishnan --- This patch

[Bug middle-end/83623] [8 Regression] ICE: in convert_move, at expr.c:248 with -march=knl and 16bit vector bswap/rotate

2018-06-20 Thread ramana at gcc dot gnu.org
||ramana at gcc dot gnu.org Resolution|FIXED |--- --- Comment #8 from Ramana Radhakrishnan --- Seems to need a fix for gcc 6 branch based on PR86166

[Bug target/86209] Peephole does not happen because the type of zero/sign extended operands is not the same.

2018-06-19 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86209 --- Comment #3 from Ramana Radhakrishnan --- (In reply to sameerad from comment #2) > Ramana, it is another peephole that I am trying to explore for falkor. It > combines loads/stores of shorter types (QI/HI/SI) into single load/store of >

[Bug target/86209] Peephole does not happen because the type of zero/sign extended operands is not the same.

2018-06-19 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86209 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug tree-optimization/64946] [AArch64] gcc.target/aarch64/vect-abs-compile.c - "abs" vectorization fails for char/short types

2018-06-18 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64946 Ramana Radhakrishnan changed: What|Removed |Added Target Milestone|--- |9.0

[Bug tree-optimization/64946] [AArch64] gcc.target/aarch64/vect-abs-compile.c - "abs" vectorization fails for char/short types

2018-06-18 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64946 --- Comment #25 from Ramana Radhakrishnan --- (In reply to kugan from comment #24) > Author: kugan > Date: Sat Jun 16 21:34:29 2018 > New Revision: 261681 > > URL: https://gcc.gnu.org/viewcvs?rev=261681=gcc=rev > Log: > gcc/ChangeLog: > >

[Bug tree-optimization/85804] [8/9 Regression][AArch64] Mis-compilation of loop with strided array access and xor reduction

2018-06-18 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85804 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug debug/84342] Location views breaks cross builds of arm including gnueabihf

2018-06-12 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84342 --- Comment #13 from Ramana Radhakrishnan --- (In reply to Jeffrey A. Law from comment #12) > I'm not familiar enough with the ccfsm bits to know if there's something we > ought to be doing generically to improve CC handling further. I think >

[Bug debug/84342] Location views breaks cross builds of arm including gnueabihf

2018-06-07 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84342 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug target/85733] [8 regression] ARM -mbe8 behaviour doesn't match documentation

2018-05-11 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85733 Ramana Radhakrishnan changed: What|Removed |Added Status|NEW |ASSIGNED

[Bug target/85733] [8 regression] ARM -mbe8 behaviour doesn't match documentation

2018-05-11 Thread ramana at gcc dot gnu.org
||2018-05-11 CC||ramana at gcc dot gnu.org Target Milestone|--- |8.2 Summary|ARM -mbe8 behaviour doesn't |[8 regression] ARM -mbe8 |match documentation |behaviour doesn't

[Bug target/85593] [5,6,7,8 Regression] GCC on ARM allocates R3 for local variable when calling naked function with O2 optimizations enabled

2018-05-04 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85593 Ramana Radhakrishnan changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug target/85593] GCC on ARM allocates R3 for local variable when calling naked function with O2 optimizations enabled

2018-05-02 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85593 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug target/84923] [8/9 regression] gcc.dg/attr-weakref-1.c failed on aarch64

2018-04-25 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84923 --- Comment #4 from Ramana Radhakrishnan --- (In reply to Richard Biener from comment #3) > For x86_64 if I append > > const int *dat[] = { , }; > > the testcase links fine irrespective of where I place the > > .weakref

[Bug target/68256] Defining TARGET_USE_CONSTANT_BLOCKS_P causes go bootstrap failure on aarch64.

2018-04-25 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68256 --- Comment #12 from Ramana Radhakrishnan --- (In reply to Steve Ellcey from comment #11) > FYI: This caused a regression on aarch64. > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84923 I have marked 84923 as an 8 regression as it wasn't

[Bug ada/85380] gnatbind fails with small executable & restricted runtime

2018-04-17 Thread ramana at gcc dot gnu.org
, ||ramana at gcc dot gnu.org --- Comment #1 from Ramana Radhakrishnan --- Adding Eric to the CC list as someone who could comment on this ?

[Bug target/85203] cmse_nonsecure_caller intrinsic returns incorrect results

2018-04-17 Thread ramana at gcc dot gnu.org
||ramana at gcc dot gnu.org Resolution|--- |FIXED Target Milestone|--- |7.4 --- Comment #4 from Ramana Radhakrishnan --- Fixed I'm assuming ?

[Bug target/85261] __builtin_arm_set_fpscr ICEs with constant input

2018-04-06 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85261 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug middle-end/84877] Local stack copy of BLKmode parameter on the stack is not aligned when the requested alignment exceeds MAX_SUPPORTED_STACK_ALIGNMENT

2018-03-28 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84877 Ramana Radhakrishnan changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug target/81863] [7 regression] -mword-relocations is unreliable

2018-03-27 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81863 --- Comment #21 from Ramana Radhakrishnan --- Author: ramana Date: Tue Mar 27 14:06:20 2018 New Revision: 258886 URL: https://gcc.gnu.org/viewcvs?rev=258886=gcc=rev Log: [Patch ARM] Fix PR target/81863 This has been in my patch stack for quite

[Bug middle-end/84877] Local stack copy of BLKmode parameter on the stack is not aligned when the requested alignment exceeds MAX_SUPPORTED_STACK_ALIGNMENT

2018-03-15 Thread ramana at gcc dot gnu.org
||ramana at gcc dot gnu.org --- Comment #1 from Ramana Radhakrishnan --- Isn't this something you said you could see from 6.x ?

[Bug target/68256] Defining TARGET_USE_CONSTANT_BLOCKS_P causes go bootstrap failure on aarch64.

2018-03-15 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68256 Ramana Radhakrishnan changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/59833] ARM soft-float extendsfdf2 fails to quiet signaling NaN

2018-03-13 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=59833 Ramana Radhakrishnan changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug target/84521] [8 Regression] aarch64: Frame-pointer corruption with __builtin_setjmp/__builtin_longjmp and -fomit-frame-pointer

2018-02-26 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84521 --- Comment #15 from Ramana Radhakrishnan --- Author: ramana Date: Mon Feb 26 09:25:21 2018 New Revision: 257984 URL: https://gcc.gnu.org/viewcvs?rev=257984=gcc=rev Log: [Patch AArch64] Turn on frame pointer / partial fix for PR84521 This

[Bug target/84528] [8 Regression] gcc.c-torture/execute/960419-2.c -O3 fails with -fno-omit-frame-pointer

2018-02-23 Thread ramana at gcc dot gnu.org
|UNCONFIRMED |NEW Last reconfirmed||2018-02-23 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #1 from Ramana Radhakrishnan --- We are about to turn fno-omit-frame-pointer

[Bug target/84521] [8 Regression] aarch64: Frame-pointer corruption with __builtin_setjmp/__builtin_longjmp and -fomit-frame-pointer

2018-02-22 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84521 --- Comment #10 from Ramana Radhakrishnan --- (In reply to Jakub Jelinek from comment #4) > Is the requirement just for functions that contain setjmp? If so, the > backend could just force frame pointers in cfun->calls_setjmp functions. I

[Bug tree-optimization/83543] strlen of a local array member not optimized on some targets

2018-02-20 Thread ramana at gcc dot gnu.org
||2018-02-20 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #4 from Ramana Radhakrishnan --- (In reply to Martin Sebor from comment #0) > Bug 83462 reports (among others) a fail

[Bug ipa/83178] [8 regression] g++.dg/ipa/devirt-22.C fail

2017-12-12 Thread ramana at gcc dot gnu.org
Status|UNCONFIRMED |NEW Last reconfirmed||2017-12-12 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #3 from Ramana Radhakrishnan --- Confirmed then.

[Bug target/82248] probe_stack can generate unpredictable STR on arm

2017-12-05 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82248 --- Comment #6 from Ramana Radhakrishnan --- Author: ramana Date: Tue Dec 5 16:32:55 2017 New Revision: 255428 URL: https://gcc.gnu.org/viewcvs?rev=255428=gcc=rev Log: [Patch ARM] Fix probe_stack constraint. The probe_stack pattern uses r0 as

  1   2   3   4   5   6   7   8   9   10   >