https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112817
--- Comment #15 from Vineet Gupta ---
(In reply to Vineet Gupta from comment #14)
> 2. implement gcc toggle -mrvv-vector-bits=zvl which essentially copies the
> xxx from -march string
Done:
commit 0a01d1232ff0a8b094270fbf45c9fd0ea46df19f
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112817
Vineet Gupta changed:
What|Removed |Added
Status|UNCONFIRMED |ASSIGNED
Ever confirmed|0
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112817
--- Comment #13 from Vineet Gupta ---
Yeah Greg from Rivos started working on it. He'll update here as he makes
progress.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112817
--- Comment #12 from JuzheZhong ---
Hi, Vineet.
Are you going to support VLS compile option and attributes?
If not, I can ask other RISC-V folks to do that.
Thanks.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112817
--- Comment #11 from Andrew Pinski ---
(In reply to Vineet Gupta from comment #9)
> I was looking for a new entry in gcc/c-family/c-attribs.cc or would be
> somewhere else.
It would more likely be in config/riscv/riscv.cc defined in
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112817
--- Comment #10 from JuzheZhong ---
Yes. I haven't support VLS attributes. I guess kito may have some ideas.
