https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70119
Wilco changed:
What|Removed |Added
Target Milestone|--- |8.0
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70119
Wilco changed:
What|Removed |Added
Status|NEW |RESOLVED
CC|
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70119
--- Comment #6 from collison at gcc dot gnu.org ---
Author: collison
Date: Thu Jun 29 09:21:57 2017
New Revision: 249774
URL: https://gcc.gnu.org/viewcvs?rev=249774=gcc=rev
Log:
2017-06-29 Kyrylo Tkachov
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70119
--- Comment #5 from ktkachov at gcc dot gnu.org ---
Created attachment 37941
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=37941=edit
Example patch
In the interests of getting a concrete proposal out and hammering out a course
of action,
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70119
--- Comment #4 from Richard Biener ---
(In reply to ktkachov from comment #3)
> Right, I see we have the same issue on aarch64 as on x86.
> So what would be the accepted solution here?
> I've been playing with a patch to simplify-rtx to move the
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70119
--- Comment #3 from ktkachov at gcc dot gnu.org ---
Right, I see we have the same issue on aarch64 as on x86.
So what would be the accepted solution here?
I've been playing with a patch to simplify-rtx to move the subreg inside the
AND and
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70119
--- Comment #2 from Uroš Bizjak ---
(In reply to Richard Biener from comment #1)
> Confirmed. SHIFT_COUNT_TRUNCATED should simply go away.
The same limitation is with x86. Shifts trucate the shift count, but bit-test
(BT) instructions take
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70119
Richard Biener changed:
What|Removed |Added
Status|UNCONFIRMED |NEW
Last reconfirmed|