https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89746
Segher Boessenkool changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89746
--- Comment #7 from Segher Boessenkool ---
Author: segher
Date: Tue Mar 19 16:58:42 2019
New Revision: 269802
URL: https://gcc.gnu.org/viewcvs?rev=269802&root=gcc&view=rev
Log:
rs6000: Unaligned stfiwx on older CPUs (PR89746)
The "classic" Powe
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89746
Segher Boessenkool changed:
What|Removed |Added
Assignee|unassigned at gcc dot gnu.org |segher at gcc dot
gnu.org
-
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89746
--- Comment #5 from Segher Boessenkool ---
Yes, it is just a code quality issue.
I have the attached patch, and it works; it needs to be updated so that the
alignment check is only done for CPUs where it is needed.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89746
Richard Biener changed:
What|Removed |Added
Keywords||missed-optimization
--- Comment #4 from
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89746
Richard Biener changed:
What|Removed |Added
Keywords||wrong-code
Status|UNCONFIRM
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89746
--- Comment #2 from Segher Boessenkool ---
(This is on a PowerPC 750).
The compiler makes an unaligned store for this, because it knows no better
than it is just a SImode store:
d_5 = (int) f_4(D);
_10 = (unsigned int) d_5;
MEM[(short int
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89746
--- Comment #1 from Andrew Pinski ---
I don't think this is directly an issue. If you don't want unaligned accesses
from happening and your "kernel" does not support unaligned fix ups, then you
need to use -mstrict-align .
