Hi,
This patch adds new intrinsics for new ADCX, ADOX, RDSEED and
PREFETCHW instructions, introduced here:
http://software.intel.com/en-us/avx/
Bootstrapped on x86-64, testing is in progress.
Is it ok for trunk?
Changelog entry:
2012-07-17 Michael Zolotukhin michael.v.zolotuk...@intel.com
Hi Dodji Seketeli:
This is what I was trying to tell you in my previous message, when I was
saying:
_cpp_pop_context is really the function that marks the end of a
given macro expansion, especially when the predicate
in_macro_expansion_p (introduced recently in trunk for gcc
Hmm, the point is of couse to not allow transitions that could form a
cycle, which is why the reverse transition is not allowed.
Let me have a closer look here.
You can reproduce on your favorite platform by locally copying the system.ads
from gcc/ada/rts in your build tree and turning
On Jul 17, 2012, at 2:53 PM, Kai Tietz wrote:
2012/7/17 Richard Henderson r...@redhat.com:
On 07/17/2012 12:35 AM, Tristan Gingold wrote:
So, the first element of ExceptionInformation will be exc.
Should I add a comment ?
Ah right. Definitely.
Otherwise I don't see anything else in
Yunfeng ZHANG zyf.zer...@gmail.com writes:
Hi Dodji Seketeli:
This is what I was trying to tell you in my previous message, when I was
saying:
_cpp_pop_context is really the function that marks the end of a
given macro expansion, especially when the predicate
On Wed, 18 Jul 2012, Dodji Seketeli wrote:
Hey Dimitrios,
I can't say much about your patch, so I am CC-ing the maintainers.
I don't think it's any good or clearer to understand.
Richard.
Thanks.
Dimitrios Apostolou ji...@gmx.net a ?crit:
Hello,
I've had this patch some time
This is a SH regression on the 4.7 and trunk while building Webkit
(pre-processed file size is about 2.2Mb :-)
A far branch to a return rtx produces an ICE in
find_dead_or_set_registers at line resource.c:497:
next = JUMP_LABEL (this_jump_insn);
if (ANY_RETURN_P (next)) - next is null
next =
Hello!
This patch adds new intrinsics for new ADCX, ADOX, RDSEED and
PREFETCHW instructions, introduced here:
http://software.intel.com/en-us/avx/
+/* Copyright (C) 2012 Free Software Foundation, Inc.
+ Contributed by Michael Zolotukhin.
Please remove Contributed by lines from headers.
+
On Wed, Jul 18, 2012 at 7:18 PM, Steven Bosscher stevenb@gmail.com wrote:
On Wed, Jul 18, 2012 at 10:08 AM, Steven Bosscher stevenb@gmail.com
wrote:
On Wed, Jul 18, 2012 at 2:24 AM, H.J. Lu hjl.to...@gmail.com wrote:
This caused:
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=54008
On Thu, Jul 19, 2012 at 11:03:25AM +0200, Uros Bizjak wrote:
+ /* Set CF to specified value. */
+ emit_insn (gen_addqi3_cc(
+ gen_reg_rtx(QImode),
+ op1,
+ constm1_rtx));
+
This should be in the *.md expander.
Note also that the
On Thu, Jul 19, 2012 at 10:38 AM, Christian Bruel
christian.br...@st.com wrote:
This is a SH regression on the 4.7 and trunk while building Webkit
(pre-processed file size is about 2.2Mb :-)
http://gcc.gnu.org/wiki/A_guide_to_testcase_reduction
Ciao!
Steven
On Thu, Jul 19, 2012 at 11:10 AM, Jakub Jelinek ja...@redhat.com wrote:
On Thu, Jul 19, 2012 at 11:03:25AM +0200, Uros Bizjak wrote:
+ /* Set CF to specified value. */
+ emit_insn (gen_addqi3_cc(
+ gen_reg_rtx(QImode),
+ op1,
+
- else
-return prefetchw\t%a0;
-}
+ prefetch\t%a0
You have a mnemonic clash here. prefetchw is not good name for a new
instruction, it clashes with existing 3dnow name. Intel will need to
fix the spec, you probably won't be able to change prefetchw encoding
in binutils.
Hi Uros,
On 07/19/2012 08:30 AM, Tristan Gingold wrote:
No regression on i386 GNU/Linux.
Committed.
Nice. Is this NEWS / docs --or wherever release notes are written-- worthy?
Something like this, borrowed from your own words:
On Win64, the compiler now emits SEH unwind info. GCC exceptions now
On 07/19/2012 03:35 AM, Jason Merrill wrote:
On 07/12/2012 07:06 PM, Jason Merrill wrote:
I notice that your patch changes the behavior of C++98/03 mode as well,
which seems wrong to me; I think this is a big enough change that we
should limit it to C++11 mode.
...except that I can't figure
On Thu, Jul 19, 2012 at 11:23:09AM +0200, Uros Bizjak wrote:
You have a mnemonic clash here. prefetchw is not good name for a new
instruction, it clashes with existing 3dnow name. Intel will need to
fix the spec, you probably won't be able to change prefetchw encoding
in binutils.
From
On Thu, Jul 19, 2012 at 9:30 AM, Eric Botcazou ebotca...@adacore.com wrote:
Hmm, the point is of couse to not allow transitions that could form a
cycle, which is why the reverse transition is not allowed.
Let me have a closer look here.
You can reproduce on your favorite platform by locally
That helps reproducing it. The issue is that this really is a transition
in the wrong direction. We iterate
Visiting statement:
D.2928_263 = (sizetype) i.29_262;
which is likely UNDEFINED
Lattice value changed to UNDEFINED. Adding SSA edges to worklist.
...
Visiting statement:
On Thu, Jul 19, 2012 at 12:00 PM, Eric Botcazou ebotca...@adacore.com wrote:
That helps reproducing it. The issue is that this really is a transition
in the wrong direction. We iterate
Visiting statement:
D.2928_263 = (sizetype) i.29_262;
which is likely UNDEFINED
Lattice value changed to
On Jul 19, 2012, at 11:37 AM, Pedro Alves wrote:
On 07/19/2012 08:30 AM, Tristan Gingold wrote:
No regression on i386 GNU/Linux.
Committed.
Nice. Is this NEWS / docs --or wherever release notes are written-- worthy?
Something like this, borrowed from your own words:
On Win64, the
On 07/19/2012 11:15 AM, Tristan Gingold wrote:
To clarify, GCC emits SEH unwind info since 4.7, so I propose slightly
modified words:
Looks good to me. Thanks!
--
Pedro Alves
On Thu, Jul 19, 2012 at 11:51 AM, Jakub Jelinek ja...@redhat.com wrote:
You have a mnemonic clash here. prefetchw is not good name for a new
instruction, it clashes with existing 3dnow name. Intel will need to
fix the spec, you probably won't be able to change prefetchw encoding
in
I'm running bootstrap testing on x86_64 right now and will commit the
patch (it's quite sound to me - ADDR_EXPR is no different from PLUS_EXPR
or POINTER_PLUS_EXPR with respect to UNDEFINED handling).
Thanks. It would be nice to commit the testcase I posted in the first message.
--
Eric
Christian Bruel christian.br...@st.com wrote:
This is a SH regression on the 4.7 and trunk while building Webkit
(pre-processed file size is about 2.2Mb :-)
A far branch to a return rtx produces an ICE in
find_dead_or_set_registers at line resource.c:497:
next = JUMP_LABEL
Hi,
On 07/18/2012 02:40 PM, Jakub Jelinek wrote:
The problem on the GCC side is that both the C and C++ FEs fold away the
sizeof too early (well, C++ FE only when not in a template, otherwise
SIZEOF_EXPR is created and guess one could tsubst its argument again).
I've only done C FE right now,
On 07/19/2012 11:14 AM, Steven Bosscher wrote:
On Thu, Jul 19, 2012 at 10:38 AM, Christian Bruel
christian.br...@st.com wrote:
This is a SH regression on the 4.7 and trunk while building Webkit
(pre-processed file size is about 2.2Mb :-)
http://gcc.gnu.org/wiki/A_guide_to_testcase_reduction
On 07/19/2012 12:35 PM, Kaz Kojima wrote:
Christian Bruel christian.br...@st.com wrote:
This is a SH regression on the 4.7 and trunk while building Webkit
(pre-processed file size is about 2.2Mb :-)
A far branch to a return rtx produces an ICE in
find_dead_or_set_registers at line
The Ada testcase below exposes that we do not properly handle
a[CONSTANT][UNDEFINED] when initially computing its lattice
value and will ICE if the UNDEFINED value becomes CONSTANT later.
Bootstrapped and tested on x86_64-unknown-linux-gnu, applied to trunk
(Eric, if you want to do the testing
On Thu, Jul 19, 2012 at 11:51 AM, Jakub Jelinek ja...@redhat.com wrote:
I think it is fine to change existing mm3dnow.h header, but not in the way
it has been changed in the patch. The thing is that unlike the newly added
intrinsics headers, mm3dnow.h is still publicly includable header, and
Hi,
The patch that Andrew Stubbs sent upstream here:
http://gcc.gnu.org/ml/gcc-patches/2011-04/msg02130.html
seems to have become stalled after Ramana's question here:
http://gcc.gnu.org/ml/gcc-patches/2011-05/msg00291.html
This was discussed with ARM personnel (i.e. Lee Smith) at the time
Hi,
I've just committed this patch on the AArch64 branch to improve bound checks
diagnostics.
Thanks
Sofiane
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-ow...@gcc.gnu.org]
On
Behalf Of Sofiane Naci
Sent: 14 June 2012 10:38
To: gcc-patches@gcc.gnu.org
Hi,
I've just committed this patch on the AArch64 branch to remove __float128
support.
Thanks
Sofiane
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-ow...@gcc.gnu.org]
On
Behalf Of Sofiane Naci
Sent: 11 June 2012 15:52
To: gcc-patches@gcc.gnu.org
Hi,
I cc Nathanael Nerode since according to MAINTENERS he one of the people
in charge of Makefile.in.
I filed a bug against make install which does not honor
--program-prefix/--program-suffix for the driver 'gcc' while building
for target AVR (maybe others too). In a particular case
Hi,
I've just committed this patch on the AArch64 branch to improve diagnostics
and error messages.
Thanks
Sofiane
-Original Message-
From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-ow...@gcc.gnu.org]
On
Behalf Of Sofiane Naci
Sent: 13 June 2012 14:30
To:
On 18/07/12 23:47, Steven Bosscher wrote:
On Wed, Jul 18, 2012 at 11:30 PM, Tom de Vries tom_devr...@mentor.com wrote:
+tree-if-switch-conversion.o : tree-if-switch-conversion.c $(CONFIG_H) \
+$(SYSTEM_H) $(TREE_H) $(TM_P_H) $(TREE_FLOW_H) $(DIAGNOSTIC_H) \
+$(TREE_INLINE_H)
Hi,
The patch that Andrew Stubbs sent upstream here:
http://gcc.gnu.org/ml/gcc-patches/2011-04/msg02130.html
seems to have become stalled after Ramana's question here:
http://gcc.gnu.org/ml/gcc-patches/2011-05/msg00291.html
This was discussed with ARM personnel (i.e. Lee Smith) at
On 2012.07.17 at 15:10 +0200, Richard Guenther wrote:
Comments welcome, of course.
This patch apparently miscompiles the Linux kernel, which just
hangs during early boot:
...
SLUB: Genslabs=15, HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
Hierarchical RCU implementation.
NR_IRQS:4352
On Thu, Jul 19, 2012 at 12:47:21PM +0200, Paolo Carlini wrote:
On 07/18/2012 02:40 PM, Jakub Jelinek wrote:
The problem on the GCC side is that both the C and C++ FEs fold away the
sizeof too early (well, C++ FE only when not in a template, otherwise
SIZEOF_EXPR is created and guess one could
On 17/07/12 14:57, Steven Bosscher wrote:
On Tue, Jul 17, 2012 at 1:21 PM, Tom de Vries tom_devr...@mentor.com wrote:
Richard,
attached patch implements an if-to-switch conversion tree pass
pass_if_to_switch.
Nice. I've been working on something similar, using the paper
Efficient and
On Thu, 19 Jul 2012 13:54:57 +0100
Paul Brook p...@codesourcery.com wrote:
But, that means EABI-conformant callers are also perfectly entitled
to sign-extend half-float values before calling our helper functions
(although GCC itself won't do that). Using unsigned int and taking
care to
A change of mine to split class debug info into declaration and
definition less often caused problems with the .debug_types support,
which was assuming that it would always be done for a type not at file
scope.
Tested x86_64-pc-linux-gnu, applying to trunk.
commit
Hi!
If all #pragma omp section blocks of #pragma omp sections never exit,
and a program invoking that is executed on more threads than sections,
we SIGILL due to __builtin_trap, as opposed to waiting forever for the
looping sections. Fixed thusly (primarily because we can remove code,
the
Fix --produce_manifest flag in validate_failures.py.
When I added the functionality to use other summary files for
reporting, I broke the generation of manifests. When sum files are
passed on, we need to use the list. Otherwise, we need to find summary
files in the build directory.
This patch
On Thu, Jul 19, 2012 at 12:34:25PM +0930, Alan Modra wrote:
and fixes pr54009.
David, in looking over this today, I realised that this bug isn't
completely fixed. I stopped gcc emitting an offset of 32768, but that
isn't enough. lo_sum addresses can't be offset, except when you know
the
On Thu, Jul 19, 2012 at 3:43 PM, Tom de Vries tom_devr...@mentor.com wrote:
I think you should compare your method to the one described in the
paper, and at least reference the paper if it's somehow similar --
Interesting, thanks. Will do.
BTW, I have the value profiling bits for this in my
On Wed, Jul 18, 2012 at 8:31 PM, Uros Bizjak ubiz...@gmail.com wrote:
As with all other mode switching macros, we need to pass entity index
also to MODE_AFTER macro. In a multi-entity mode switching case, we
usually don't have same modes for all entities, and we should be able
to return the
Hi,
The microMIPS port benefits from an additional peephole2 pass. Sched2 exposes
some opportunities to recognize the movep instruction.
Does this look okay to commit?
Thanks,
Catherine
2012-07-19 Catherine Moore c...@codesourcery.com
Chao-ying Fu f...@mips.com
*
On Fri, Jul 8, 2011 at 10:37 AM, Jason Merrill ja...@redhat.com wrote:
On 07/08/2011 10:35 AM, Jakub Jelinek wrote:
That will match only on ELF and perhaps a few other targets, but I'm
certain
many targets put read-only data elsewhere. I'd just guard this
with a few most common target
Hi,
On 07/19/2012 03:16 PM, Jakub Jelinek wrote:
Also the c-family/ part of it, or just the c/ part? The latter I admit
is not very nice (another ugliness is that we want the parameters
before doing standard argument promotions on them).
The latter, the latter.
Unrelated, but I can't
On Wed, 18 Jul 2012, John David Anglin wrote:
It would make my life easier if the change included the multiarch bits for
hppa. I imagine other Debian ports are in a similar situation.
I explained at length in reviews of previous patch versions how each
architecture needs its own review to
This is a regression present on the mainline and 4.7 branch. When a
discriminated record type with a variant part has a partial representation
clause, the compiler may drop some fields when it is laying out subtypes of
this record type.
Tested on x86_64-suse-linux, applied on the mainline and
Hello,
the simple patch below passes the testsuite after a c,c++ bootstrap
without new regressions. Note however that
#include math.h
int f(double a, double b){
return (!isunordered(a,b))(ab);
}
is then optimized by ifcombine to return (ab);, which seems wrong in
the absence of
On 15/07/2012 21:13, Tobias Burnus wrote:
Hello,
attached is an updated version of the patch. Changes:
Updated version of comments:
diff --git a/gcc/fortran/decl.c b/gcc/fortran/decl.c
index c3644b6..959a57b 100644
--- a/gcc/fortran/decl.c
+++ b/gcc/fortran/decl.c
@@ -594,7 +594,7 @@
On Thu, Jul 19, 2012 at 4:50 PM, Moore, Catherine
catherine_mo...@mentor.com wrote:
Hi,
The microMIPS port benefits from an additional peephole2 pass. Sched2
exposes some opportunities to recognize the movep instruction.
Does this look okay to commit?
Not really. The purpose of peephole2
Hi!
On the following testcase we emit various (correct) -Wnonnull warnings
more than once, sometimes many times. The problem on the reported memcpy
testcase is that glibc uses __attribute__((nonnull (1, 2))) and gcc
uses __attribute__((nonnull)) on the memset builtin and we end up with both of
I did a manual build and testing for x86_64-pc-mingw32 and I will run a
full bootstrap and regression run on GNU/Linux.
Tristan.
libstdc++-v3/
* libsupc++/eh_personality.cc (__gxx_personality_seh0): New function.
Adjust for SEH.
* config/abi/pre/gnu.ver: Add
On Jul 19, 2012, at 5:37 AM, Sylvain Leroux wrote:
I cc Nathanael Nerode since according to MAINTENERS he one of the people in
charge of Makefile.in.
I filed a bug against make install which does not honor
--program-prefix/--program-suffix for the driver 'gcc' while building for
target
On Wed, 2012-07-18 at 18:30 +0100, Richard Sandiford wrote:
The abort sounds like the bug here. It's deliberate that things like
-msynci, -mbranch-likely, etc., are OK with -mips16. On the one hand,
you could compile with -mips16 but have an __attribute__((nomips16))
function that could
On 19/07/2012 17:55, Mikael Morin wrote:
I'm regression testing them, and if they work and are fine to you, let's
go with these patches.
They work with the following testsuite adjustment.
Mikael
diff --git a/gcc/testsuite/gfortran.dg/assumed_type_3.f90
Steve Ellcey sell...@mips.com writes:
2012-07-19 Steve Ellcey sell...@mips.com
* config/mips/mips.c (mips_set_mips16_mode): Clear SYNCI_MASK in
MIPS16 mode.
OK, thanks.
Richard
While adding multiple new optabs over the past week or three, it
occurred to me that (1) there are lots of places to update all in
sync and (2) the representation size of optabs is huge.
The first issue is somewhat trivially accomplished by moving all
optabs knowledge into an optabs.def file.
Prep for a later patch where this becomes an enum value.
---
gcc/builtins.c |2 +-
gcc/dojump.c | 13 +
gcc/optabs.c |6 +++---
gcc/optabs.h |2 ++
gcc/tree-vect-generic.c | 30 +++---
The dwarf2out.c and lto-streamer-in.c files didn't need
libfuncs.h in the first place. The libfuncs.h file will
grow a use of an optab enumeration and thus will require
including optabs.h.
---
gcc/Makefile.in | 16
gcc/dwarf2out.c |1 -
gcc/libfuncs.h|
Removes all the direct uses of op-code so that we can change
the representation of optab. The code_to_optab change is
simply for uniformity (and better type checking).
---
gcc/dojump.c |2 +-
gcc/ifcvt.c |4 +-
gcc/optabs.c | 64
On 07/17/2012 12:51 PM, David Edelsohn wrote:
The change to power4-store-update looks incorrect or at least incomplete.
These reservations and others were changed by Vlad in March/April 2004
to fix a consistency check that he introduced at the time. Note that
the dispatch units for the final
I discovered the vectorizable_operation while trying to figure out why
ia64 wasn't generating the mul_highpart pattern as I expected: we always
force CODE_FOR_nothing to 0. Oops.
The change to expr.c was just to satisfy the grep I did to make sure
there were not other occurrences of a similar
IA64 vectors modes are of course all UNITS_PER_WORD. I see no reason
to prevent the transformation of a V4HImode divmod, or even of V2SImode.
Jakub, was there another reason you added this condition?
r~
* tree-vect-patterns.c (vect_recog_divmod_pattern): Do not require
With the even/odd v4hi multiply pattern names, we'll automatically
generate the same code for dot_prodv4hi. The dot_prodv8qi pattern
was actively incorrect wrt output mode.
r~
* config/ia64/vect.md (smulv4hi3_highpart): New.
(umulv4hi3_highpart): New.
On 07/17/2012 02:50 AM, Jakub Jelinek wrote:
2012-07-17 Jakub Jelinek ja...@redhat.com
PR rtl-optimization/53942
* function.c (assign_parm_setup_reg): Avoid zero/sign extension
directly from likely spilled non-fixed hard registers, move them
to pseudo first.
Steven == Steven Bosscher stevenb@gmail.com writes:
Steven Makefile.in is a mess. One of these days, someone (hi, Tromey) will
Steven hopefully get annoyed enough with this again to finish some tool to
Steven auto-generate the dependences list. Until that time, let's try to
Steven avoid
Hello,
The attached patch sorts and groups some of the SH shift patterns a
little. Also, some of the patterns set the insn length attributes which
doesn't seem useful since the insns in question are split into multiple
individual insns anyway.
Tested on rev 189601 with
make -k check
On 07/11/2012 11:52 PM, Chung-Lin Tang wrote:
* target.def (expand_builtin_thread_pointer): New target hook.
(expand_builtin_set_thread_pointer): New target hook.
Is there a particular reason why you're using target hooks rather than
named patterns in the md file? This *is*
When not optimizing, fold_builtin_1 assumes that __builtin_constant_p
isn't going to give any better answer than we can see at first folding.
But this isn't true in a constexpr function, for which the parameters
can later be replaced by constants. So I've taken Jakub's suggestion of
setting
Mikael Morin wrote:
The four of them are not directly related to the assumed rank stuff, and
thus deserve a separate commit.
As you said:
* Unrelated bug fixes, found when writing the test cases and thus
included:
I assume they don't need testcases of their own, so that they are
approved as
On Thu, Jul 19, 2012 at 11:24:10AM -0700, Richard Henderson wrote:
--- /dev/null
+++ b/gcc/optabs.def
@@ -0,0 +1,289 @@
+/* Entries here are categorized C, D, N, V. See genopinit.c for details
+ on the meaning of the categories and for the pattern dollar codes. */
I'm impressed, but
Bootstrapped and tested on x86_64-unknown-linux-gnu, applied to trunk
(Eric, if you want to do the testing on the branch and do the backport
that would be nice).
Done. Thanks for your help.
--
Eric Botcazou
On Thu, Jul 19, 2012 at 11:52:57AM -0700, Richard Henderson wrote:
IA64 vectors modes are of course all UNITS_PER_WORD. I see no reason
to prevent the transformation of a V4HImode divmod, or even of V2SImode.
Jakub, was there another reason you added this condition?
I guess I wanted to play
On Thu, Jul 19, 2012 at 11:52:56AM -0700, Richard Henderson wrote:
I discovered the vectorizable_operation while trying to figure out why
ia64 wasn't generating the mul_highpart pattern as I expected: we always
force CODE_FOR_nothing to 0. Oops.
icode = 0; was chosen as something that
On 07/10/2012 03:14 PM, Sriraman Tallam wrote:
I am using the questions you asked previously
to explain how I solved each of them. When working on this patch, these
are the exact questions I had and tried to address it.
* Does this attribute affect a function signature?
The function signature
GCC_DRIVER_HOST_INITIALIZATION happens before diagnostic_initialize,
this can cause crashes if it call diagnostics such as warning, or
fatal_error are used in the macro. One example would be in
darwin-driver.c where darwin_find_version_from_kernel can call
warning(). Another example is in
This is a regression present on the mainline and 4.7 branch and visible on
SPARC/Solaris, although it is latent everywhere. When a derived type is more
aligned than its base type, things can go wrong when an object of the class-
wide type is initialized with a value whose type is the derived
From: Nick Clifton ni...@redhat.com
Date: Wed, 18 Jul 2012 08:51:16 +0200
2012-07-18 Nick Clifton ni...@redhat.com
* doc/invoke.texi (ARM Options): Document -munaligned-access.
Index: gcc/doc/invoke.texi
===
---
Am 19.07.2012 17:55, schrieb Mikael Morin:
Maybe add: gcc_assert (from-rank != -1 || to-corank == 0);
Access to lower and upper bounds is OK, but again maybe we could just
assert here.
I will add the asserts – and undo the patch.
s/deferred rank/assumed rank/ ?
Of course. Well spotted!
There is now a tail call in Time_Of with lot of 64-bit quantities around,
including arguments, and this exposes an oversight in adddi3_insn_sp32.
Bootstrapped/regtested on SPARC/Solaris, applied on mainline and 4.7 branch.
2012-07-19 Eric Botcazou ebotca...@adacore.com
*
From: Eric Botcazou ebotca...@adacore.com
Date: Thu, 19 Jul 2012 23:52:53 +0200
There is now a tail call in Time_Of with lot of 64-bit quantities around,
including arguments, and this exposes an oversight in adddi3_insn_sp32.
Bootstrapped/regtested on SPARC/Solaris, applied on mainline and
On Thu, Jul 19, 2012 at 4:13 PM, Ryan Mansfield rmansfi...@qnx.com wrote:
GCC_DRIVER_HOST_INITIALIZATION happens before diagnostic_initialize, this
can cause crashes if it call diagnostics such as warning, or fatal_error are
used in the macro. One example would be in darwin-driver.c where
Backport r183875 from trunk and gcc-4.7 to fix PR51811 ([C++0x] Incorrect
increment/decrement of atomic pointers).
Tested:
1) --testers=crosstool.
2) unit test in Google ref b/6702865
OK for google-4_6 branch?
Thanks,
Jing
2012-07-19 Jing Yu jin...@google.com
Backport r183875 to
This seems to be different from r183875. Are the parts chaing
is_look_free() in r183875 necessary? If not why?
http://codereview.appspot.com/6428056/
Hi,
This is for google branches only.
Change the module_info tag to an odd number to avoid the warning during dump.
-Rong
2012-07-19 Rong Xu x...@google.com
* gcc/gcov-io.h (GCOV_TAG_MODULE_INFO): tag needs to be
an odd number in each active level.
Index: gcc/gcov-io.h
Notes for future cleanups:
+ /* If the targer has no lshift in word_mode, the operation will most
+ probably not be cheap. ??? Does GCC even work for such targets? */
Yes, it does. We're perfectly happy to let this expand to a libcall. Indeed,
many teeny tiny targets don't have a
It is not a straightforward backport.
atomic has changed a lot in gcc-4.7. is_lock_free() body is entirely
different between gcc-4.6 and r183875. In gcc-4.6, is_lock_free()
simply returns false or true. Notice that gcc-4.6 defines two
namesapce __atomic0, __atomic2 in separate files (atomic_0.h,
On Thu, 19 Jul 2012, Tom Tromey wrote:
Steven == Steven Bosscher stevenb@gmail.com writes:
Steven Makefile.in is a mess. One of these days, someone (hi, Tromey) will
Steven hopefully get annoyed enough with this again to finish some tool to
Steven auto-generate the dependences list.
LGTM.
http://codereview.appspot.com/6428056/
http://codereview.appspot.com/6305113/diff/3001/gcc/dwarf2out.c
File gcc/dwarf2out.c (right):
http://codereview.appspot.com/6305113/diff/3001/gcc/dwarf2out.c#newcode8517
gcc/dwarf2out.c:8517:
Should use SKELETON_COMP_DIE_ABBREV here instead of 1.
On Fri, Jul 20, 2012 at 12:05:28AM +0930, Alan Modra wrote:
On Thu, Jul 19, 2012 at 12:34:25PM +0930, Alan Modra wrote:
and fixes pr54009.
David, in looking over this today, I realised that this bug isn't
completely fixed. I stopped gcc emitting an offset of 32768, but that
isn't enough.
Moore, Catherine catherine_mo...@mentor.com writes:
Forgot to copy the list ...
Same with my reply...
Here is the updated microMIPS patch. It's been a very long time (two
years!) since I posted the original. Please let me know what we're
going to need to do to get this committed.
This is
Oleg Endo oleg.e...@t-online.de wrote:
The attached patch sorts and groups some of the SH shift patterns a
little. Also, some of the patterns set the insn length attributes which
doesn't seem useful since the insns in question are split into multiple
individual insns anyway.
Tested on rev
On 16/07/2012, at 6:56 PM, Maxim Kuvyrkov wrote:
On 16/07/2012, at 6:37 PM, Chung-Lin Tang wrote:
On 2012/7/16 12:28 AM, Richard Sandiford wrote:
Chung-Lin Tang clt...@codesourcery.com writes:
This patch adds scheduling support for the NetLogic XLP, including a new
pipeline description,
98 matches
Mail list logo
