Re: [PATCH version 4, rs6000] Add builtins to convert from float/double to int/long using current rounding mode

Hi Carl, Some comments, mostly trivial: On Thu, Sep 21, 2017 at 04:09:11PM -0700, Carl Love wrote: > --- a/gcc/config/rs6000/rs6000-builtin.def > +++ b/gcc/config/rs6000/rs6000-builtin.def > @@ -608,6 +608,16 @@ > CODE_FOR_ ## ICODE) /* ICODE */ > > > +/*

Re: [PATCH, rs6000] folding of vector stores in GIMPLE

On Fri, Sep 22, 2017 at 02:58:54PM -0500, Bill Schmidt wrote: > OK. Will, for now, let's again use the (void *) solution for the time being, > and > add commentary recording this improvement for future work. Same would > go for the vec_vsx_ld/st variations once you get to those. > > Otherwise

Re: [PATCH, rs6000] testcase coverage for vector store builtins

On Thu, Sep 21, 2017 at 01:11:11PM -0500, Will Schmidt wrote: > Add testcase coverage for the vec_st (vector store) > intrinsic builtins. > > Tested across power platforms (p6 and newer). OK for trunk? Yep, looks fine. Thanks! Segher > 2017-09-21 Will Schmidt

Re: [Patch] Edit contrib/ files to download gfortran prerequisites

On Thu, 21 Sep 2017 09:40:49Richard Biener wrote: > On Wed, Sep 20, 2017 at 10:35 PM, Damian Rouson > wrote: > >> Attached is a patch that adds the downloading of gfortran prerequisites > OpenCoarrays and MPICH in the contrib/download_prerequisites script. The >

Re: [PATCH, rs6000 version 3] Add support for vec_xst_len_r() and vec_xl_len_r() builtins

Hi Carl, On Mon, Sep 18, 2017 at 11:31:07AM -0700, Carl Love wrote: > * gcc.target/powerpc/builtins-5-p9-runnable.c: Add new runable test file > for the new built-ins and the existing built-ins. Typo ("runable"). > (define_expand "altivec_lvsr" > - [(use (match_operand:V16QI 0

Re: [PATCH, AArch64] Disable reg offset in quad-word store for Falkor.

On Fri, Sep 22, 2017 at 11:39 AM, Jim Wilson wrote: > On Fri, Sep 22, 2017 at 10:58 AM, Andrew Pinski wrote: >> Two overall comments: >> * What about splitting register_offset into two different elements, >> one for non 128bit modes and one for 128bit

Re: [PATCH] Fix PR82144

On Sep 21, 2017, Richard Biener wrote: > On Tue, 12 Sep 2017, Richard Biener wrote: >> >> The following avoids adding DW_AT_alignment twice by not doing it >> for incomplete types. >> >> Bootstrapped on x86_64-unknown-linux-gnu, testing in progress. >> >> Alex, is that ok

Re: [C++] Fix PR bootstrap/81926

> This looks good. But let's call it debug_type_hash instead. OK with > that change. Thanks. It occured to me that we don't need to look up the type twice when we need to insert it so I have installed the attached patchlet as obvious after boostrapping/regtesting on x86-64/Linux.

Re: [PATCH, AArch64] Disable reg offset in quad-word store for Falkor.

Hi Jim, This looks like a general issue with reg+reg addressing modes being generated in cases where it is not correct. I haven't looked at lmbench for a while, but it generated absolutely horrible code like: add x1, x0, #120 ldr v0, [x2, x1] add x1, x0, #128 ldr v1, [x2, x1] If this is still

Re: [PATCH, rs6000] folding of vector stores in GIMPLE

On Sep 22, 2017, at 5:27 AM, Richard Biener wrote: > > On Thu, Sep 21, 2017 at 10:56 PM, Will Schmidt > wrote: >> Hi, >> >> Folding of vector stores in GIMPLE. >> >> - Add code to handle gimple folding for the vec_st (vector store)

Re: [PATCH][aarch64] Fix error calls in aarch64 code so they can be tranlated

On 09/22/2017 11:54 AM, Steve Ellcey wrote: In my view, the ideal message would use the same form as in the source code. But I suspect that's not easy to determine at all sites where the message is being formatted, so the next best thing is to avoid using the keyword and fall back on the

Re: [Patch, Fortran] PR 82143: add a -fdefault-real-16 flag

2017-09-22 11:44 GMT+02:00 Janus Weil : > 2017-09-22 9:11 GMT+02:00 Janne Blomqvist : >> And since the standard requires that double precision variables are >> twice as big as reals, in the absence of an explicit -fdefault-double= >> flag, would it

libgo patch committed: Add XCOFF support

This patch by Tony Reix adds XCOFF support to libgo and to the go and cgo commands. Bootstrapped and ran Go tests on x86_64-pc-linux-gnu. Committed to mainline. Ian Index: gcc/go/gofrontend/MERGE === --- gcc/go/gofrontend/MERGE

Re: [PATCH, AArch64] Disable reg offset in quad-word store for Falkor.

On Fri, Sep 22, 2017 at 10:58 AM, Andrew Pinski wrote: > Two overall comments: > * What about splitting register_offset into two different elements, > one for non 128bit modes and one for 128bit (and more; OI, etc.) modes > so you get better address generation right away for

Re: [PATCH] Optimize x == -1 && y == -1 (PR middle-end/35691)

On September 22, 2017 6:59:48 PM GMT+02:00, Jakub Jelinek wrote: >Hi! > >While fixing libgcc2.c (__mulvDI3), I've noticed that while we >optimize x == 0 && y == 0 into (x | y) == 0, we don't optimize >analogical x == -1 && y == -1 into (x & y) == -1. > >The following patch does

Re: [PATCH][aarch64] Enable ifunc resolver attribute by default

On Thu, 2017-09-21 at 12:37 +, Joseph Myers wrote: > On Tue, 5 Sep 2017, Steve Ellcey wrote: > > > > > 2017-09-05  Steve Ellcey   > > > > * config.gcc: Add new case statement to set > > default_gnu_indirect_function.  Remove it from x86_64-*-linux*, > >   

Re: [PATCH, AArch64] Disable reg offset in quad-word store for Falkor.

On Fri, Sep 22, 2017 at 8:59 AM, Jim Wilson wrote: > On Fri, Sep 22, 2017 at 8:49 AM, Jim Wilson wrote: >> On Falkor, because of an idiosyncracy of how the pipelines are designed, a >> quad-word store using a reg+reg addressing mode is almost twice

Re: [C++ PATCH] Fix compile time hog in replace_placeholders (PR sanitizer/81929)

OK. On Thu, Sep 14, 2017 at 4:12 PM, Jakub Jelinek wrote: > Hi! > > When the expression replace_placeholders is called on contains > many SAVE_EXPRs that appear more than once in the tree, we hang walking them > over and over again, while it is sufficient to just walk it

Re: [PATCH][aarch64] Fix error calls in aarch64 code so they can be tranlated

> In my view, the ideal message would use the same form as in > the source code.  But I suspect that's not easy to determine at > all sites where the message is being formatted, so the next best > thing is to avoid using the keyword and fall back on the general > term. > > Martin > > PS If

[RFA][PATCH] Stack clash protection 06/08 - V4

Enough changed since V3 that I think another review round on the ppc bits is warranted. wrap_frame_mem is gone. Allocation, attribute setting and notes/scheduler barriers are now in rs6000_emit_allocate_stack_1. handle_residual is gone, it's folded into rs6000_emit_allocate_stack_1.

[committed] PR82289: Computing peeling costs for irrelevant drs

This PR shows that we weren't filtering out irrelevant stmts in vect_get_peeling_costs_all_drs (unlike related loops in which we iterate over all datarefs). Tested on aarch64-linux-gnu, x86_64-linux-gnu and powerpc64le-linux-gnu. Installed as obvious. Richard 2017-09-22 Richard Sandiford

Re: range_int_cst_p handling in extract_range_from_binary_expr_1

Richard Biener writes: > On Wed, Sep 20, 2017 at 2:06 PM, Richard Sandiford > wrote: >> extract_range_from_binary_expr_1 had: >> >> if (range_int_cst_p () >> && range_int_cst_p () >> && TYPE_OVERFLOW_WRAPS

[PATCH] Optimize x == -1 && y == -1 (PR middle-end/35691)

Hi! While fixing libgcc2.c (__mulvDI3), I've noticed that while we optimize x == 0 && y == 0 into (x | y) == 0, we don't optimize analogical x == -1 && y == -1 into (x & y) == -1. The following patch does that, bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? 2017-09-22

Re: Don't query the frontend for unsupported types

Richard Biener writes: > On Thu, Sep 21, 2017 at 2:56 PM, Richard Sandiford > wrote: >> Richard Biener writes: >>> On September 20, 2017 2:36:03 PM GMT+02:00, Richard Sandiford >>>

Change permute index type to unsigned short

This patch changes the element type of (auto_)vec_perm_indices from unsigned char to unsigned short. This is needed for fixed-length 2048-bit SVE. (SVE is variable-length by default, but it's possible to ask for specific vector lengths if you want to.) Tested on aarch64-linux-gnu,

Update interface to TARGET_VECTORIZE_VEC_PERM_CONST_OK

This patch makes TARGET_VECTORIZE_VEC_PERM_CONST_OK take the permute vector in the form of a vec_perm_indices instead of an unsigned char *. It follows on from the recent patch that did the same in target-independent code. It was easy to make ARM and AArch64 use vec_perm_indices internally as

Re: [PING][PATCH] Output DIEs for outlined OpenMP functions in correct lexical scope

On Thu, Sep 21, 2017 at 01:08:01PM -0700, Kevin Buettner wrote: > Ping. Ok, thanks. > On Mon, 7 Aug 2017 17:51:38 -0700 > Kevin Buettner wrote: > > > On Wed, 10 May 2017 17:24:27 +0200 > > Jakub Jelinek wrote: > > > > > What I don't like is that the

Re: [patch][arm] (respin) Improve error checking in parsecpu.awk

On 9/22/17 4:58 PM, Vidya Praveen wrote: Hello, This patch by Richard Earnshaw was reverted along with the commit that preceded it as the preceding commit was causing cross-native builds to fail and I presumed this patch was related too. Now I am respinning as the issue that caused the

Re: [PATCH, AArch64] Disable reg offset in quad-word store for Falkor.

On Fri, Sep 22, 2017 at 8:49 AM, Jim Wilson wrote: > On Falkor, because of an idiosyncracy of how the pipelines are designed, a > quad-word store using a reg+reg addressing mode is almost twice as slow as an > add followed by a quad-word store with a single reg addressing

[patch][arm] (respin) Improve error checking in parsecpu.awk

Hello, This patch by Richard Earnshaw was reverted along with the commit that preceded it as the preceding commit was causing cross-native builds to fail and I presumed this patch was related too. Now I am respinning as the issue that caused the cross-native failure have been fixed. This patch

Re: [patch][arm] (respin) auto-generate arm-isa.h from CPU descriptions

On 22/09/17 16:54, Vidya Praveen wrote: Hello, This patch by Richard Earnshaw was reverted earlier as it was breaking cross-native builds. Respinning now with a minor change that fixes the build issue - adding arm-isa.h to GTM_H. Also remove a redundant dependency (TM_H includes GTM_H). Tested

[patch][arm] (respin) auto-generate arm-isa.h from CPU descriptions

Hello, This patch by Richard Earnshaw was reverted earlier as it was breaking cross-native builds. Respinning now with a minor change that fixes the build issue - adding arm-isa.h to GTM_H. Also remove a redundant dependency (TM_H includes GTM_H). Tested by building cross/cross-native

[PATCH, AArch64] Disable reg offset in quad-word store for Falkor.

On Falkor, because of an idiosyncracy of how the pipelines are designed, a quad-word store using a reg+reg addressing mode is almost twice as slow as an add followed by a quad-word store with a single reg addressing mode. So we get better performance if we disallow addressing modes using register

[committed] v2: C++: underline parameters in mismatching function calls

On Thu, 2017-09-21 at 09:20 -0700, Nathan Sidwell wrote: > On 09/20/2017 12:52 PM, David Malcolm wrote: > > When we have a type mismatch in a C++ function call, e.g. > > whereas underlining the mismatching things would make the messages > > easier to comprehend: > > > >test.c: In function

C++ patch ping

Hi! I'd like to ping the http://gcc.gnu.org/ml/gcc-patches/2017-09/msg00937.html - fix compile time hog in replace_placeholders patch. Thanks Jakub

Re: [PATCH][GRAPHITE] More TLC

On Fri, Sep 22, 2017 at 8:03 AM, Richard Biener wrote: > > This simplifies canonicalize_loop_closed_ssa and does other minimal > TLC. It also adds a testcase I reduced from a stupid mistake I made > when reworking canonicalize_loop_closed_ssa. > > Bootstrapped and tested on

Re: [Patch, Fortran] PR 82143: add a -fdefault-real-16 flag

On Fri, Sep 22, 2017 at 10:11:55AM +0300, Janne Blomqvist wrote: > On Fri, Sep 22, 2017 at 8:02 AM, Janus Weil wrote: > > Thanks, Steve. I'm attaching the updated ChangeLog and the two test > > cases for the two new flags. Since this appears to be a somewhat > > controversial

libbacktrace patch committed: Replace lstat and readlink if not available

This patch to libbacktrace provides dummy versions of lstat and readlink if they are not available on the system. Bootstrapped and ran libbacktrace tests on x86_64-pc-linux-gnu both normally and with a hand-edited config.h. Committed to mainline. Ian 2017-09-22 Ian Lance Taylor

Re: [PATCH][GRAPHITE] Simplify move_sese_in_condition

On Fri, Sep 22, 2017 at 4:37 AM, Richard Biener wrote: > > This re-implements it avoding the need to recompute dominators and in > a much simpler way. > > Bootstrapped on x86_64-unknown-linux-gnu, testing in progress, SPEC CPU > 2006 is happy. > > Richard. > > 2017-09-22

[PATCH] Fix __mulv[dt]i3 and expand_mul_overflow (PR target/82274)

Hi! An overflow isn't detected on multiplication of signed integer with all ones in the upper half of bits and all zeros in the lower half by itself, either with -ftrapv, or __builtin_mul_overflow{,_p}, or signed-integer-overflow sanitization. For libgcc, we have various cases we handle earlier

[PATCH][GRAPHITE] More TLC

This simplifies canonicalize_loop_closed_ssa and does other minimal TLC. It also adds a testcase I reduced from a stupid mistake I made when reworking canonicalize_loop_closed_ssa. Bootstrapped and tested on x86_64-unknown-linux-gnu, applied to trunk. SPEC CPU 2006 is happy with it, current

Re: [PATCH PR82163/V2]New interface checking LCSSA for single loop

On Fri, Sep 22, 2017 at 1:37 PM, Bin Cheng wrote: > Hi, > This is the V2 patch fixing PR82163. It rewrites verify_loop_closed_ssa by > checking > uses of all definitions inside of loop. This gives advantage that we can > check loop > closed ssa form for a specific loop,

[PATCH] Fix PR82291

The following fixes a goof in if-conversion which did nothing to false predicated blocks. But we have to at least remove all stores. Bootstrapped and tested on x86_64-unknown-linux-gnu, applied to trunk. Richard. 2017-09-22 Richard Biener PR

Re: [PATCH try 2] [i386,testsuite,libgcc] Fix build breakage on Mac and test FAILS on Solaris caused by PR82196 patch

On Fri, Sep 22, 2017 at 1:27 PM, Uros Bizjak wrote: > On Fri, Sep 22, 2017 at 12:28 PM, Daniel Santos > wrote: >> On 09/22/2017 03:28 AM, Rainer Orth wrote: >>> Hi Daniel, >>> On 09/22/2017 02:18 AM, Rainer Orth wrote: > Hi Daniel, >

[PATCH PR82163/V2]New interface checking LCSSA for single loop

Hi, This is the V2 patch fixing PR82163. It rewrites verify_loop_closed_ssa by checking uses of all definitions inside of loop. This gives advantage that we can check loop closed ssa form for a specific loop, rather than for whole function. The interface is used in fixing this issue.

Re: [PATCH try 2] [i386,testsuite,libgcc] Fix build breakage on Mac and test FAILS on Solaris caused by PR82196 patch

On Fri, Sep 22, 2017 at 12:28 PM, Daniel Santos wrote: > On 09/22/2017 03:28 AM, Rainer Orth wrote: >> Hi Daniel, >> >>> On 09/22/2017 02:18 AM, Rainer Orth wrote: Hi Daniel, > On 09/21/2017 05:18 PM, Daniel Santos wrote: >> So libgcc doesn't use a

Re: [PATCH] haifa-sched: fix autopref_rank_for_schedule qsort comparator

On Tue, 19 Sep 2017, Alexander Monakov wrote: > * haifa-sched.c (autopref_rank_for_schedule): Order 'irrelevant' insns > first, always call autopref_rank_data otherwise. May I apply this patch now to unblock qsort checking? Further changes or adjustments can then go in independently

Re: [PATCH try 2] [i386,testsuite,libgcc] Fix build breakage on Mac and test FAILS on Solaris caused by PR82196 patch

On Fri, Sep 22, 2017 at 05:28:00AM -0500, Daniel Santos wrote: > +/* If the assembler doesn't support AVX then directly emit machine code > + for the instructions above directly. */ Just a nit: too many "directly" words. Jakub

Re: Add a vect_get_dr_size helper function

On Fri, Sep 22, 2017 at 10:15 AM, Richard Sandiford wrote: > Richard Biener writes: >> On Thu, Sep 14, 2017 at 4:05 PM, Richard Sandiford >> wrote: >>> Richard Biener writes:

Re: [PATCH, rs6000] folding of vector stores in GIMPLE

On Thu, Sep 21, 2017 at 10:56 PM, Will Schmidt wrote: > Hi, > > Folding of vector stores in GIMPLE. > > - Add code to handle gimple folding for the vec_st (vector store) builtins. > - Remove the now obsoleted folding code for vec_st from rs6000-c-c. > > There are two

Re: [PATCH GCC]A simple implementation of loop interchange

On Mon, Sep 4, 2017 at 2:54 PM, Richard Biener wrote: > On Wed, Aug 30, 2017 at 6:32 PM, Bin.Cheng wrote: >> On Wed, Aug 30, 2017 at 3:19 PM, Richard Biener >> wrote: >>> On Wed, Aug 30, 2017 at 3:18 PM, Bin Cheng

[PATCH try 2] [i386,testsuite,libgcc] Fix build breakage on Mac and test FAILS on Solaris caused by PR82196 patch

On 09/22/2017 03:28 AM, Rainer Orth wrote: > Hi Daniel, > >> On 09/22/2017 02:18 AM, Rainer Orth wrote: >>> Hi Daniel, >>> On 09/21/2017 05:18 PM, Daniel Santos wrote: > So libgcc doesn't use a config.in. :( Scratch that, I forgot that we're using gcc/config.in via auto-host.h. 

Re: [PATCH] PR target/80556

> On 18 Sep 2017, at 22:08, Simon Wright wrote: > > On 18 Sep 2017, at 21:09, Iain Sandoe wrote: >> >>> If I propose this alternative patch, should it be a new post, or should I >>> continue this thread? >> >> thanks for the patch. >> >> The basic

Re: [Patch, Fortran] PR 82143: add a -fdefault-real-16 flag

2017-09-22 9:11 GMT+02:00 Janne Blomqvist : > On Fri, Sep 22, 2017 at 8:02 AM, Janus Weil wrote: >> Thanks, Steve. I'm attaching the updated ChangeLog and the two test >> cases for the two new flags. Since this appears to be a somewhat >>

[PATCH][GRAPHITE] Simplify move_sese_in_condition

This re-implements it avoding the need to recompute dominators and in a much simpler way. Bootstrapped on x86_64-unknown-linux-gnu, testing in progress, SPEC CPU 2006 is happy. Richard. 2017-09-22 Richard Biener * sese.c: Include cfganal.h.

Re: [PATCH] [i386, libgcc] PR 82196 -mcall-ms2sysv-xlogues emits wrong AVX/SSE MOV

Hi Daniel, > On 09/22/2017 02:18 AM, Rainer Orth wrote: >> Hi Daniel, >> >>> On 09/21/2017 05:18 PM, Daniel Santos wrote: So libgcc doesn't use a config.in. :( >>> Scratch that, I forgot that we're using gcc/config.in via auto-host.h.  >>> So I only have to add this to gcc/configure.ac and

PING][PATCH][compare-elim] Merge zero-comparisons with normal ops

Ping. Updated patch posted here: https://gcc.gnu.org/ml/gcc-patches/2017-09/msg00390.html

Re: [PATCH] [i386, libgcc] PR 82196 -mcall-ms2sysv-xlogues emits wrong AVX/SSE MOV

On 09/22/2017 02:18 AM, Rainer Orth wrote: > Hi Daniel, > >> On 09/21/2017 05:18 PM, Daniel Santos wrote: >>> So libgcc doesn't use a config.in. :( >> Scratch that, I forgot that we're using gcc/config.in via auto-host.h.  >> So I only have to add this to gcc/configure.ac and it will be available

[RFC PATCH 4/4] Extra async tests, not for merging

These tests show that changing the system clock has an effect on std::future::wait_until when using std::chrono::system_clock but not when using std::chrono::steady_clock. Unfortunately these tests have a number of downsides: 1. Nothing that is attempting to keep the clock set correctly (ntpd,

[RFC PATCH 2/4] libstdc++ futex: Support waiting on std::chrono::steady_clock directly

The user-visible effect of this change is for std::future::wait_until to use CLOCK_MONOTONIC when passed a timeout of std::chrono::steady_clock::time_point type. This makes it immune to any changes made to the system clock CLOCK_REALTIME. Add an overload of

[RFC PATCH 3/4] libstdc++ atomic_futex: Use std::chrono::steady_clock as reference clock

The user-visible effect of this change is that std::future::wait_for now uses std::chrono::steady_clock to determine the timeout. This makes it immune to changes made to the system clock. It also means that anyone using their own clock types with std::future::wait_until will have the timeout

[RFC PATCH 1/4] libstdc++ futex: Use FUTEX_CLOCK_REALTIME for wait

The futex system call supports waiting for an absolute time if FUTEX_WAIT_BITSET is used rather than FUTEX_WAIT. Doing so provides two benefits: 1. The call to gettimeofday is not required in order to calculate a relative timeout. 2. If someone changes the system clock during the wait then

[RFC PATCH 0/4] Make std::future::wait_* use std::chrono::steady_clock when required

This is a first attempt to make std::future::wait_until and std::future::wait_for make correct use of std::chrono::steady_clock/CLOCK_MONOTONIC. It also makes std::future::wait_until react to changes to CLOCK_REALTIME during the wait, but only when passed a std::chrono::system_clock time point.

Re: Add a vect_get_dr_size helper function

Richard Biener writes: > On Thu, Sep 14, 2017 at 4:05 PM, Richard Sandiford > wrote: >> Richard Biener writes: >>> On Thu, Sep 14, 2017 at 1:23 PM, Richard Sandiford >>> wrote:

Re: [Patch, fortran] Bug fixes, including regressions, for the associate construct

Dear All, I seem to have messed up associate_31.f90 totally. Not only is it not doing the intended test but it is failing at all levels of optimization. I will remove it first thing tomorrow. Strangely, it did not fail when I regtested before committing. Sorry about this. Paul On 21 September

[PATCH] [i386, testsuite, libgcc] Fix build breakage on Mac and test FAILS on Solaris.

I've bootstrapped and reg-tested {,-m64} with this on 86_64-pc-linux-gnu, but I'm waiting for a reference test set to finish to compare them. I've verified that we're getting HAVE_AS_IX86_AVX in auto-host.h and I've also built and tested w/o to double-verify that the AVX code is correct. Now

Re: [PATCH] [i386, libgcc] PR 82196 -mcall-ms2sysv-xlogues emits wrong AVX/SSE MOV

Hi Daniel, > On 09/21/2017 05:18 PM, Daniel Santos wrote: >> So libgcc doesn't use a config.in. :( > > Scratch that, I forgot that we're using gcc/config.in via auto-host.h.  > So I only have to add this to gcc/configure.ac and it will be available > for my libgcc header -- this is what I used to

Re: Backtrace library [3/3]

On Thu, 21 Sep 2017, Matthias Klose wrote: > On 21.09.2017 17:50, Ian Lance Taylor via gcc-patches wrote: > > On Thu, Sep 21, 2017 at 4:52 AM, Thomas Schwinge > > wrote: > >> > >> On Fri, 14 Sep 2012 14:20:08 -0700, Ian Lance Taylor > >> wrote: >

Re: [Patch, Fortran] PR 82143: add a -fdefault-real-16 flag

On Fri, Sep 22, 2017 at 8:02 AM, Janus Weil wrote: > Thanks, Steve. I'm attaching the updated ChangeLog and the two test > cases for the two new flags. Since this appears to be a somewhat > controversial feature, I'll wait two more days to allow for others to > contribute