Re: [09/nn] Add a fixed_size_mode_pod class

On Wed, Nov 01, 2017 at 10:30:29AM -0600, Jeff Law wrote: > On 10/31/2017 08:47 PM, Trevor Saunders wrote: > > On Tue, Oct 31, 2017 at 11:38:48AM -0600, Jeff Law wrote: > > > On 10/31/2017 11:22 AM, Eric Botcazou wrote: > > > > > I don't see a reason not to other than a pretty small amount of work

[PATCH] PR fortran/82796 -- common entity in equivalence in pure routine

The attached patch fixes a regression where gfortran was issuing an error for an entity in a common block within a module when it appears in equivalence, and the entity *is not* use associated in a pure subprogram. OK to commit? 2017-11-01 Steven G. Kargl PR

[PATCH] PR auto keyword variable lost its attributes/80986

The following patch aims to removing the attribute only tf_waring flag is on. diff --git a/gcc/cp/pt.c b/gcc/cp/pt.c index d1c846ecf44..8ff46498fd6 100644 --- a/gcc/cp/pt.c +++ b/gcc/cp/pt.c @@ -7410,7 +7410,10 @@ canonicalize_type_argument (tree arg, tsubst_flags_t complain) if (!arg || arg

Re: [PATCH] RISC-V: Document the medlow and medany code models

On Wed, 01 Nov 2017 15:07:59 PDT (-0700), jos...@codesourcery.com wrote: > On Wed, 1 Nov 2017, Palmer Dabbelt wrote: > >> On Wed, 01 Nov 2017 14:59:43 PDT (-0700), jos...@codesourcery.com wrote: >> > On Tue, 31 Oct 2017, Palmer Dabbelt wrote: >> > >> >> +between absolute addresses -2 GiB and +2

Re: [PATCH, AArch64] Disable reg offset in quad-word store for Falkor.

Hi, On 1 November 2017 at 03:12, Jim Wilson wrote: > On Tue, 2017-10-31 at 14:35 +1100, Kugan Vivekanandarajah wrote: >> Ping ? >> >> I see that Jim has clarified the comments from Andrew. > > Andrew also suggested that we add a testcase to the testsuite. I > didn't do

Re: [PATCH] enhance -Warray-bounds to detect out-of-bounds offsets (PR 82455)

I of course don't want to break anything.  I didn't see any fallout in my testing and I normally test all the front ends, including Ada, but let me check to make sure I tested it this time (I had made some temporary changes to my build script and may have disabled it.)  Let me double check it

Re: [PATCH] RISC-V: Document the medlow and medany code models

On Wed, 1 Nov 2017, Palmer Dabbelt wrote: > On Wed, 01 Nov 2017 14:59:43 PDT (-0700), jos...@codesourcery.com wrote: > > On Tue, 31 Oct 2017, Palmer Dabbelt wrote: > > > >> +between absolute addresses -2 GiB and +2 GiB. Programs can be statically > >> or > > > > That should be @minus{}2 GiB, to

Re: [PATCH] RISC-V: Document the medlow and medany code models

On Wed, 01 Nov 2017 14:59:43 PDT (-0700), jos...@codesourcery.com wrote: > On Tue, 31 Oct 2017, Palmer Dabbelt wrote: > >> +between absolute addresses -2 GiB and +2 GiB. Programs can be statically or > > That should be @minus{}2 GiB, to get a minus sign instead of a hyphen. Oops, I already

Re: [PATCH] RISC-V: Document the medlow and medany code models

On Tue, 31 Oct 2017, Palmer Dabbelt wrote: > +between absolute addresses -2 GiB and +2 GiB. Programs can be statically or That should be @minus{}2 GiB, to get a minus sign instead of a hyphen. -- Joseph S. Myers jos...@codesourcery.com

Re: [PATCH, rs6000] Add Power 9 support for vec_first builtins

Hi Carl, On Tue, Oct 31, 2017 at 08:46:09AM -0700, Carl Love wrote: > gcc/ChangeLog: See Jakub's comments (thanks!) > --- a/gcc/config/rs6000/rs6000.c > +++ b/gcc/config/rs6000/rs6000.c > @@ -14286,6 +14286,34 @@ swap_selector_for_mode (machine_mode mode) >return force_reg (V16QImode,

Re: [PATCH][compare-elim] Fix PR rtl-optimization/82597

> Oops, I thought I've removed it, but apparently I haven't; thanks for > catching it. Here is an updated patch I'll bootstrap/regtest soon. > > 2017-11-01 Jakub Jelinek > > PR rtl-optimization/82778 > PR rtl-optimization/82597 > * compare-elim.c (struct

Re: [C++ Patch] PR 80955 (Macros expanded in definition of user-defined literals)

On 11/1/2017 1:02 PM, Jason Merrill wrote: On Tue, Oct 31, 2017 at 12:17 PM, Mukesh Kapoor wrote: On 10/25/2017 6:44 PM, Mukesh Kapoor wrote: On 10/25/2017 4:20 AM, Nathan Sidwell wrote: On 10/25/2017 12:03 AM, Mukesh Kapoor wrote: Thanks for pointing this out.

Re: [C++ PATCH] overloaded operator fns [8/N]

On Wed, Nov 1, 2017 at 2:29 PM, Nathan Sidwell wrote: > This is the last of the overloaded operator reworking. Now we can cheaply > go from identifier->overload info, there's no need to specially mark > identifiers as new or delete operators themselves. Thus we can reorder the >

Re: [C++ Patch] PR 80955 (Macros expanded in definition of user-defined literals)

On Tue, Oct 31, 2017 at 12:17 PM, Mukesh Kapoor wrote: > On 10/25/2017 6:44 PM, Mukesh Kapoor wrote: >> >> On 10/25/2017 4:20 AM, Nathan Sidwell wrote: >>> >>> On 10/25/2017 12:03 AM, Mukesh Kapoor wrote: >>> Thanks for pointing this out. Checking in the front end

Re: [PATCH], Add rounding built-ins to the _Float and _FloatX built-in functions

On Wed, Nov 01, 2017 at 01:31:57PM -0500, Segher Boessenkool wrote: > Hi Mike, > > On Fri, Oct 27, 2017 at 06:39:21PM -0400, Michael Meissner wrote: > > The power9 (running PowerPC ISA 3.0) has a round to integer instruction > > (XSRQPI) that does various flavors of round an IEEE 128-bit floating

Re: [PATCH 4/9] [SFN] introduce statement frontier notes, still disabled

On Wed, Nov 1, 2017 at 3:13 PM, Alexandre Oliva wrote: > Hi, Jason, > > Apologies for the delay in responding; somehow I missed your reply when > it arrived (probably because I had a cold back then :-), and only saw it > today. > > On Oct 24, 2017, Jason Merrill

Re: [PATCH] fix fdump-lang-raw ICE

On Wed, Nov 01, 2017 at 03:24:56PM -0400, Nathan Sidwell wrote: > Thomas Koenig noticed -fdump-lang-raw gives an immediate ICE. I broke it > with the DECL_ASSEMBLER_NAME changes last month. Fixed thusly, applied as > obvious. Shouldn't there be a testcase with that option? > 2017-11-01 Nathan

[PATCH] fix fdump-lang-raw ICE

Thomas Koenig noticed -fdump-lang-raw gives an immediate ICE. I broke it with the DECL_ASSEMBLER_NAME changes last month. Fixed thusly, applied as obvious. nathan -- Nathan Sidwell 2017-11-01 Nathan Sidwell * tree-dump.c (dequeue_and_dump): Use

Re: [PATCH,RFC] collect2 LTO for AIX

On 10/31/2017 12:11 PM, David Edelsohn wrote: With your recent removal of SDB and -gcoff support, I would appreciate your advice about my patch to incrementally add some preliminary LTO support for AIX to collect2.c: OK. I can take a look. I started a new job this week, so I'm a bit

Re: [PATCH,RFC] collect2 LTO for AIX

On 10/30/2017 12:13 PM, Jeff Law wrote: On 10/13/2017 12:04 PM, David Edelsohn wrote: This patch adds the basic LTO scanning pass to the COFF support in collect2. I don't believe that this change should affect other COFF targets adversely (do they even use collect2?), but I wanted to give

Re: [PATCH 4/9] [SFN] introduce statement frontier notes, still disabled

Hi, Jason, Apologies for the delay in responding; somehow I missed your reply when it arrived (probably because I had a cold back then :-), and only saw it today. On Oct 24, 2017, Jason Merrill wrote: > On Sat, Sep 30, 2017 at 5:08 AM, Alexandre Oliva

Re: [PATCH 9/9] [IEPM] Introduce inline entry point markers

On Oct 31, 2017, Jeff Law wrote: >> @@ -5691,6 +5691,15 @@ expand_gimple_basic_block (basic_block bb, bool >> disable_tail_calls) >> goto delink_debug_stmt; >> else if (gimple_debug_begin_stmt_p (stmt)) >> val = gen_rtx_DEBUG_MARKER (VOIDmode); >> + else if

Re: [PATCH], Add rounding built-ins to the _Float and _FloatX built-in functions

Hi Mike, On Fri, Oct 27, 2017 at 06:39:21PM -0400, Michael Meissner wrote: > The power9 (running PowerPC ISA 3.0) has a round to integer instruction > (XSRQPI) that does various flavors of round an IEEE 128-bit floating point to > integeral values. This patch adds the support to the machine

[C++ PATCH] overloaded operator fns [8/N]

This is the last of the overloaded operator reworking. Now we can cheaply go from identifier->overload info, there's no need to specially mark identifiers as new or delete operators themselves. Thus we can reorder the cp_identifier_kind enumeration and leave space in it for udlit operators.

[Patch, fortran] PR81447 - [7/8] gfortran fails to recognize the exact dynamic type of a polymorphic entity that was allocated in a external procedure

Dear All, This patch is adequately described by the comment in the second chunk applied to resolve.c. Note, however, that the 'unconditionally' is promptly undermined by the subsequent conditions. I will change the adjective appropriately. In writing this, I have just realised that

Re: [PATCH 6/9] [LVU] Allow final_start_function to skip initial insns

On Oct 31, 2017, Jeff Law wrote: > On 09/30/2017 03:08 AM, Alexandre Oliva wrote: >> This API change will enable final_start_function() to "consume" >> initial insns, and choose the first insn to be passed to final(). >> >> Many ports call final_start_function() and final()

Re: Fix pretty printers for versioned namespace

On 30/10/2017 19:15, Jonathan Wakely wrote: @@ -1227,7 +1227,12 @@ class Printer(object):    def add_version(self, base, name, function):    self.add(base + name, function)    if _versioned_namespace: -    self.add(base + _versioned_namespace + name, function) +   

Re: [PATCH] RISC-V: Document the medlow and medany code models

Committed. On Tue, 31 Oct 2017 23:37:04 PDT (-0700), Andrew Waterman wrote: > Thanks for caring enough about our patches to even notice the grammar :) > > On Tue, Oct 31, 2017 at 11:09 PM, Sandra Loosemore > wrote: >> On 10/31/2017 10:27 PM, Andrew Waterman wrote: >>>

Re: [PATCH, rs6000 V3] Add Power 8 support to vec_revb

Hi Carl, On Fri, Oct 27, 2017 at 09:49:04AM -0700, Carl Love wrote: > > > +;; Swap all bytes in each element of vector > > > +(define_expand "revb_" > > > + [(set (match_operand:VEC_A 0 "vsx_register_operand") > > > + (bswap:VEC_A (match_operand:VEC_A 1 "vsx_register_operand")))] > > > +

Re: [PATCH][AArch64] Define MALLOC_ABI_ALIGNMENT

On Tue, Oct 31, 2017 at 05:07:54PM +, Wilco Dijkstra wrote: > The AArch64 backend currently doesn't set MALLOC_ABI_ALIGNMENT, so > add this to enable alignment optimizations on malloc pointers. > > OK for commit? As far as I understand it, because we have 128-bit types, a malloc of anything

[PATCH] PR libstdc++/82777 fix path normalization for dot-dot

This fixes a bug in the implementation of the normalization algo. I messed up a case with adjacent ../.. elements, because it's written to work in a single pass, rather than applying each of the rules in turn, creating loads of temporaries and reallocations. PR libstdc++/82777 *

Re: [PATCH] Use Pcrt1.o%s/gPcrt1.o%s for -static-pie

On Wed, Nov 1, 2017 at 9:32 AM, Rich Felker wrote: > On Sun, Oct 15, 2017 at 06:16:57AM -0700, H.J. Lu wrote: >> crt1.o is used to create dynamic and non-PIE static executables. Static >> PIE needs to link with Pcrt1.o, instead of crt1.o, to relocate static PIE >> at run-time.

[PATCH] combine: Fix bug in giving up placing REG_DEAD notes (PR82683)

When we have a REG_DEAD note for a reg that is set in the new I2, we drop the note on the floor (we cannot find whether to place it on I2 or on I3). But the code I added to do this has a bug and does not always actually drop it. This patch fixes it. But that on its own is too pessimistic, it

Re: [PATCH] Use Pcrt1.o%s/gPcrt1.o%s for -static-pie

On Sun, Oct 15, 2017 at 06:16:57AM -0700, H.J. Lu wrote: > crt1.o is used to create dynamic and non-PIE static executables. Static > PIE needs to link with Pcrt1.o, instead of crt1.o, to relocate static PIE > at run-time. When -pg is used with -static-pie, gPcrt1.o should be used. > > Tested on

Re: [09/nn] Add a fixed_size_mode_pod class

On 10/31/2017 08:47 PM, Trevor Saunders wrote: On Tue, Oct 31, 2017 at 11:38:48AM -0600, Jeff Law wrote: On 10/31/2017 11:22 AM, Eric Botcazou wrote: I don't see a reason not to other than a pretty small amount of work each time we make a release. I'm not sure it would be so small an amount

Re: [C++ PATCH] overloaded operator fns [6/N]

This patch shrinks the lang_fn_decl's operator_code field from 16 to 6 bits, by storing the compressed operator code instead of the tree_code. I rename DECL_OVERLOADED_OPERATOR_CODE to DECL_OVERLOADED_OPERATOR_CODE_RAW, to remind that it's not a tree_code. DECL_OVERLOADED_OPERATOR_CODE_IS

[C++ PATCH] overloaded operator fns [6/N]

This patch adds a new enum for the overloaded operators, we only enumerate the codes we need, and thus can shrink the ovl_op_info array. We do need to create a mapping array to go from tree_code to ovl_op_code. More significantly is the use of the base.u.bits.address_space field, which is

Re: [PATCH][compare-elim] Fix PR rtl-optimization/82597

On Wed, Nov 01, 2017 at 02:49:45PM +0100, Eric Botcazou wrote: > > At least, the only spot that used to mention df_link in compare-elim.c was: > > struct df_link *ref_chain; > > ref_chain = DF_REF_CHAIN (use); > > if (!ref_chain || !ref_chain->ref > > > > || !DF_REF_INSN_INFO

Re: [PATCH][compare-elim] Fix PR rtl-optimization/82597

> At least, the only spot that used to mention df_link in compare-elim.c was: > struct df_link *ref_chain; > ref_chain = DF_REF_CHAIN (use); > if (!ref_chain || !ref_chain->ref > > || !DF_REF_INSN_INFO (ref_chain->ref) || ref_chain->next != NULL) > > return false; > > rtx_insn

Re: [PATCH][compare-elim] Fix PR rtl-optimization/82597

On Wed, Nov 01, 2017 at 02:32:02PM +0100, Eric Botcazou wrote: > > 2017-10-31 Jakub Jelinek > > > > PR rtl-optimization/82778 > > PR rtl-optimization/82597 > > * compare-elim.c (struct comparison): Add in_a_setter field. > >

Re: [PATCH][compare-elim] Fix PR rtl-optimization/82597

> Here is an untested patch (only tried the cmpelim_mult_uses_1.c testcase in > aarch64 cross) that does that. I don't have aarch64 boxes around for easy > trunk testing, can bootstrap/regtest it on x86_64-linux/i686-linux and > maybe powerpc64le-linux though. > > If the memset (last_setter, 0,

PING*2 Fwd: [patch] implement generic debug() for vectors and hash sets

-- Forwarded message -- From: Aldy Hernandez Date: Mon, Oct 16, 2017 at 9:52 AM Subject: [patch] implement generic debug() for vectors and hash sets To: gcc-patches We have a generic mechanism for dumping types from the debugger with:

Generalize -(-X) a little

Hello, just a little tweak to that transformation. There is some overlap between the 2 versions, but it seemed easier to handle the NOP case (including the case without convert and the vector case) separately from the narrowing / sign-extending scalar integer case. At some point it would be

Re: Adjust empty class parameter passing ABI (PR c++/60336)

On Fri, Oct 27, 2017 at 12:46:12PM +0200, Richard Biener wrote: > On Fri, 27 Oct 2017, Jakub Jelinek wrote: > > > On Fri, Oct 27, 2017 at 12:31:46PM +0200, Richard Biener wrote: > > > I fear it doesn't work at all with LTO (you'll always get the old ABI > > > if I read the patch correctly). This

[Fortran, Patch, v1] Three small patches for character arrays

Hi all, during development on OpenCoarrays I found these three issues in gfortran: - caf_send: Did not treat char arrays as arrays when calling caf_send. - gfc_trans_assignment_1: Conversion of character kind creates a loop variant temporary which must not be put before the loop body, but

Re: [Patch, fortran] PR80850 - Sourced allocate() fails to allocate a pointer

Committed to 7-branch as revision 254293. I will close the PR now. Cheers Paul On 30 October 2017 at 22:16, Paul Richard Thomas wrote: > Dear Andre, > > Committed to trunk as revision 254244. > > In order to debug the code, I was forced to use 7-branch for >

[PATCH 8/N][RFC] v2 GCOV: support multiple functions per a line

Hi. As shown from examples with -O2 optimization level, previous approach was not viable. A more complex approach is necessary and can be shortly described as follows: 1) each function has assigned start and end line in a source file 2) group functions are these functions that begin on a line

[PATCH, testsuite, alpha]: Add testcase for glibc sqrt bug

The testcase for an alpha glibc bug [1] that bit us again. 2017-11-01 Uros Bizjak * gcc.target/alpha/sqrt.c: New test. Tested on alphaev68-linux-gnu, committed to mainline SVN. [1] https://sourceware.org/ml/libc-alpha/2017-04/msg00256.html Uros. Index:

Re: [PATCH] RISC-V: Document the medlow and medany code models

Thanks for caring enough about our patches to even notice the grammar :) On Tue, Oct 31, 2017 at 11:09 PM, Sandra Loosemore wrote: > On 10/31/2017 10:27 PM, Andrew Waterman wrote: >> >> I have to disagree. It's standard to not hyphenate an >> adverb-adjective compound,

Re: [PATCH] RISC-V: Document the medlow and medany code models

On 10/31/2017 10:27 PM, Andrew Waterman wrote: I have to disagree. It's standard to not hyphenate an adverb-adjective compound, since they tend not to be ambiguous. But if the standard in the GCC documentation is to hyphenate, I will not stand in the way! Heh, you got me on this one -- it's