On Thu, Sep 9, 2021 at 3:56 AM Xionghu Luo wrote:
>
>
>
> On 2021/8/26 19:33, Richard Biener wrote:
> > On Tue, Aug 10, 2021 at 4:03 AM Xionghu Luo wrote:
> >>
> >> Hi,
> >>
> >> On 2021/8/6 20:15, Richard Biener wrote:
> >>> On Mon, Aug 2, 2021 at 7:05 AM Xiong Hu Luo wrote:
>
>
Hi Tobias!
On 2021-09-21T21:22:44+0200, Tobias Burnus wrote:
> While the previous patch fixed -Wno-missing-include-dirs and sorted
> out some inconsistencies with libcpp warnings, it had two issues:
>
> * Some superfluous warnings were printed, e.g. for
> gfortran nonexisting/file.f90
>
This is OK
Ramana
On 22/09/2021, 09:45, "Przemyslaw Wirkus" wrote:
Patch is adding Cortex-R52+ as 'cortex-r52plus' command line
flag for -mcpu option.
See: https://www.arm.com/products/silicon-ip-cpu/cortex-r/cortex-r52-plus
OK for master?
gcc/ChangeLog:
2021-09-22
Patch is adding multilib entries for `cortex-r52plus` CPU.
See: https://www.arm.com/products/silicon-ip-cpu/cortex-r/cortex-r52-plus
OK for master?
gcc/ChangeLog:
2021-09-16 Przemyslaw Wirkus
* config/arm/t-rtems: Add "-mthumb -mcpu=cortex-r52plus
-mfloat-abi=hard"
Patch is adding Cortex-R52+ as 'cortex-r52plus' command line
flag for -mcpu option.
See: https://www.arm.com/products/silicon-ip-cpu/cortex-r/cortex-r52-plus
OK for master?
gcc/ChangeLog:
2021-09-22 Przemyslaw Wirkus
* config/arm/arm-cpus.in: Add Cortex-R52+ CPU.
*
On 2021/8/11 17:16, Richard Biener wrote:
On Wed, 11 Aug 2021, Xionghu Luo wrote:
On 2021/8/10 22:47, Richard Biener wrote:
On Mon, 9 Aug 2021, Xionghu Luo wrote:
Thanks,
On 2021/8/6 19:46, Richard Biener wrote:
On Tue, 3 Aug 2021, Xionghu Luo wrote:
loop split condition is moved
Patch is adding 'cortex-x2' to -mcpu command line option.
OK for master?
gcc/ChangeLog:
2021-09-02 Przemyslaw Wirkus
* config/aarch64/aarch64-cores.def (AARCH64_CORE): New
Cortex-X2 core.
* config/aarch64/aarch64-tune.md: Regenerate.
* doc/invoke.texi: Update
Patch is adding 'cortex-a710' to -mcpu command line option.
gcc/ChangeLog:
2021-09-02 Przemyslaw Wirkus
* config/aarch64/aarch64-cores.def (AARCH64_CORE): New
Cortex-A710 core.
* config/aarch64/aarch64-tune.md: Regenerate.
* doc/invoke.texi: Update docs.
Patch is adding 'cortex-a510' to -mcpu command line option.
gcc/ChangeLog:
2021-09-02 Przemyslaw Wirkus
* config/aarch64/aarch64-cores.def (AARCH64_CORE): New
Cortex-A510 core.
* config/aarch64/aarch64-tune.md: Regenerate.
* doc/invoke.texi: Update docs.
Patch is adding new command line option 'armv9-a' to -march.
OK for master?
gcc/ChangeLog:
2021-09-22 Przemyslaw Wirkus
* config/aarch64/aarch64-arches.def (AARCH64_ARCH): Added
armv9-a.
* config/aarch64/aarch64.h (AARCH64_FL_V9): New.
(AARCH64_FL_FOR_ARCH9):
On Tue, Sep 21, 2021 at 3:50 PM Andrew MacLeod wrote:
>
> On 9/21/21 9:32 AM, Richard Biener wrote:
> > On Tue, Sep 21, 2021 at 2:57 PM Andrew MacLeod wrote:
> >> On 9/21/21 2:14 AM, Richard Biener wrote:
> >>> On Tue, Sep 21, 2021 at 8:09 AM Richard Biener
> >>> wrote:
> On Tue, Sep 21,
On Tue, Sep 21, 2021 at 7:17 PM Aldy Hernandez via Gcc-patches
wrote:
>
>
>
> On 9/21/21 7:05 PM, Andrew MacLeod wrote:
> > On 9/21/21 12:53 PM, Aldy Hernandez wrote:
> >> SCEV won't work without dominators and we can get called without
> >> dominators from debug_ranger.
> >>
> >> Another option
Avoid emitting a strict low part move if the insv target actually
affects the whole target reg.
Bootstrapped and regression tested on s390x.
gcc/ChangeLog:
PR target/10
* config/s390/s390.c (s390_expand_insv): Emit a normal move if it
is actually a full copy of the
Hi!
I've used function for omp single expansion also for omp scope. That is
mostly ok, but as the testcase shows, there is one important difference.
The omp single expansion always has a fallthru body, because it during
omp lowering expands the body as if wrapped in an if to simulate that
one
Hi!
As the allocate-2.c testcase shows, this change isn't 100% backwards compatible,
one could have allocate and/or align functions that return an OpenMP allocator
handle and previously it would call those functions and now would use those
names as keywords for the modifiers. But it allows
Hi Joseph, Thomas,
> On 21 Sep 2021, at 21:11, Joseph Myers wrote:
>
> On Fri, 3 Sep 2021, Iain Sandoe wrote:
>
>> given that:
>>
>> a) this fixes Darwin x86-64 bootstrap which has been broken for more than 24h
>> b) the patch is now Darwin-local.
>
> Actually, it's not Darwin-local. It
Hi,
Existing code in the sfp-machine header has been using __MACH__
as a guard for Mach-O, where currently symbols aliases are not
supported.
__MACH__ is not a sufficient guard for this, since the define
is also emitted for HURD, at least.
Fixed by amending the guard to use __APPLE__ instead.
Hi,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2021-August/578162.html
Thanks
On 6/9/2021 下午 2:01, HAO CHEN GUI wrote:
Hi,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2021-August/578162.html
Thanks
On 26/8/2021 上午 9:19, HAO CHEN GUI wrote:
Hi
Hi,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2021-September/579434.html
Thanks
On 15/9/2021 下午 3:35, HAO CHEN GUI wrote:
Bill,
Yes, I built the gcc with p10 binutils. Then power10_ok tests can pass.
Thanks again for your kindly explanation.
I finally realized
On Tue, 21 Sep 2021, Andre Vieira (lists) wrote:
> Hi Richi,
>
> Thanks for the review, see below some questions.
>
> On 21/09/2021 13:30, Richard Biener wrote:
> > On Fri, 17 Sep 2021, Andre Vieira (lists) wrote:
> >
> >> Hi all,
> >>
> >> This patch adds the ability to define a target hook to
On Wed, Sep 22, 2021 at 7:09 AM liuhongt wrote:
>
> Hi:
> fma/fms/fnma/fnmsv2sf4 are defined only under (TARGET_FMA || TARGET_FMA4).
> The patch extend the expanders to TARGET_AVX512VL.
>
> Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
> Ok for trunk?
>
> gcc/ChangeLog:
>
>
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