[PATCH] RISC-V: Add required tls to read thread pointer test

From: Pan Li The read-thread-pointer test may require the gcc configured with --enable-tls. If no, there x4 (aka tp) register will not be presented in the assembly code. This patch requires the tls for the dg checking. It will perform the test checking if --enable-tls and mark the test as

[PATCH v3] RISCV: Add vector psabi checking.

From: Yanzhang Wang This patch adds support to check function's argument or return is vector type and throw warning if yes. gcc/ChangeLog: * config/riscv/riscv.cc: (riscv_scalable_vector_type_p): Determine whether the type is scalable vector. (riscv_arg_has_vector):

[PATCH v2] RISCV: Add vector psabi checking.

From: Yanzhang Wang This patch adds support to check function's argument or return is vector type and throw warning if yes. gcc/ChangeLog: * config/riscv/riscv.cc: (riscv_scalable_vector_type_p): Determine whether the type is scalable vector. (riscv_arg_has_vector):

[PATCH] libsanitizer: cherry-pick commit 05551c658269 from upstream

cherry-pick: 05551c658269 [sanitizer] Correct alignment of x32 __sanitizer_siginfo * sanitizer_common/sanitizer_platform_limits_posix.h (__sanitizer_siginfo_pad): Use u64 to align x32 __sanitizer_siginfo to 8 bytes. ---

[pushed] c++: restore instantiate_decl assert

Tested x86_64-pc-linux-gnu, applying to trunk. -- 8< -- For PR61445 I removed this assert, but PR108242 demonstrated why it's still useful; to avoid regressing the former testcase I check pattern_defined in the assert. This reverts r212524. PR c++/61445 gcc/cp/ChangeLog: *

Re: libsanitizer: sync from master

On Wed, Apr 26, 2023 at 4:37 PM H.J. Lu wrote: > > On Wed, Apr 26, 2023 at 1:24 PM Martin Liška wrote: > > > > On 4/26/23 21:23, H.J. Lu wrote: > > > On Wed, Apr 26, 2023 at 6:52 AM Martin Liška wrote: > > >> > > >> On 11/15/22 16:47, Martin Liška wrote: > > >>> Hi. > > >>> > > >>> I've just

Re: [committed] libgcc CRIS: Define TARGET_HAS_NO_HW_DIVIDE

> From: Paul Koning > Date: Wed, 26 Apr 2023 21:02:31 -0400 > > On Apr 26, 2023, at 8:05 PM, Hans-Peter Nilsson wrote: > > > > Not many targets define this besides msp430, pdp1, xtensa, > > and arm compared to those that appear to unconditionally > > have a hardware division instruction (also,

Re: [committed] libgcc CRIS: Define TARGET_HAS_NO_HW_DIVIDE

> On Apr 26, 2023, at 8:05 PM, Hans-Peter Nilsson wrote: > > Not many targets define this besides msp430, pdp1, xtensa, > and arm compared to those that appear to unconditionally > have a hardware division instruction (also, pdp11 and > msp430 seem confused and should be empty instead of "1"

[committed] libgcc CRIS: Define TARGET_HAS_NO_HW_DIVIDE

Not many targets define this besides msp430, pdp1, xtensa, and arm compared to those that appear to unconditionally have a hardware division instruction (also, pdp11 and msp430 seem confused and should be empty instead of "1" and "(! TARGET_HWMULT)" - and having hardware multiplication doesn't

Re: [PATCH v4 05/10] RISC-V: autovec: Add autovectorization patterns for binary integer operations

Hi Robin and Juzhe, Just took a look and I like the approach. On 4/26/23 19:43, juzhe.zhong wrote: Yeah，Robin stuff is what I want and is making perfect sense for me. Replied Message FromRobin Dapp Date04/27/2023 02:15 To juzhe.zh...@rivai.ai

Ping: Re: [PATCH v3] doc: Document order of define_peephole2 scanning

> From: Hans-Peter Nilsson > Date: Wed, 19 Apr 2023 18:59:14 +0200 [...] > So again: Approvers: pdf output reviewed. Ok to commit? > -- >8 -- > I was a bit surprised when my newly-added define_peephole2 didn't > match, but it was because it was expected to partially match the > generated output

Re: libsanitizer: sync from master

On Wed, Apr 26, 2023 at 1:24 PM Martin Liška wrote: > > On 4/26/23 21:23, H.J. Lu wrote: > > On Wed, Apr 26, 2023 at 6:52 AM Martin Liška wrote: > >> > >> On 11/15/22 16:47, Martin Liška wrote: > >>> Hi. > >>> > >>> I've just pushed libsanitizer update that was tested on x86_64-linux and > >>>

[committed] RISC-V: Fix sync.md and riscv.cc whitespace errors

On 4/26/23 14:21, Patrick O'Neill wrote: This patch fixes whitespace errors introduced with https://gcc.gnu.org/pipermail/gcc-patches/2023-April/616807.html 2023-04-26 Patrick O'Neill gcc/ChangeLog: * config/riscv/riscv.cc: Fix whitespace. * config/riscv/sync.md: Fix

Re: [PATCH v2] RISC-V: Fix sync.md and riscv.cc whitespace errors

On 4/26/23 14:45, Bernhard Reutner-Fischer wrote: On 26 April 2023 23:21:06 CEST, Patrick O'Neill wrote: This patch fixes whitespace errors introduced with https://gcc.gnu.org/pipermail/gcc-patches/2023-April/616807.html 2023-04-26 Patrick O'Neill gcc/ChangeLog: *

[PATCH v5 04/10] RISC-V:autovec: Add target vectorization hooks

2023-04-24 Michael Collison Juzhe Zhong * config/riscv/riscv.cc (riscv_estimated_poly_value): Implement TARGET_ESTIMATED_POLY_VALUE. (riscv_preferred_simd_mode): Implement TARGET_VECTORIZE_PREFERRED_SIMD_MODE.

[PATCH v5 07/10] vect: Verify that GET_MODE_NUNITS is a multiple of 2.

While working on autovectorizing for the RISCV port I encountered an issue where can_duplicate_and_interleave_p assumes that GET_MODE_NUNITS is a evenly divisible by two. The RISC-V target has vector modes (e.g. VNx1DImode), where GET_MODE_NUNITS is equal to one. Tested on RISCV and

[PATCH v5 02/10] RISC-V: autovec: Export policy functions to global scope

2023-03-02 Michael Collison Juzhe Zhong * config/riscv/riscv-vector-builtins.cc (get_tail_policy_for_pred): Remove static declaration to to make externally visible. (get_mask_policy_for_pred): Ditto. * config/riscv/riscv-vector-builtins.h

[PATCH v5 10/10] RISC-V: autovec: This patch supports 8 bit auto-vectorization in riscv.

From: Kevin Lee 2023-04-14 Kevin Lee gcc/testsuite/ChangeLog: * config/riscv/riscv.cc (riscv_autovectorize_vector_modes): Add new vector mode * gcc.target/riscv/rvv/autovec/loop-add-rv32.c: Support 8bit type * gcc.target/riscv/rvv/autovec/loop-add.c: Ditto *

[PATCH v5 03/10] RISC-V:autovec: Add auto-vectorization support functions

2023-04-24 Michael Collison Juzhe Zhong * config/riscv/riscv-v.cc (riscv_vector_preferred_simd_mode): New function. (get_mask_policy_no_pred): Ditto. (get_tail_policy_no_pred): Ditto. (riscv_vector_mask_mode_p): Ditto.

[PATCH v5 09/10] RISC-V: autovec: This patch adds a guard for VNx1 vectors that are present in ports like riscv.

From: Kevin Lee Kevin Lee gcc/ChangeLog: * tree-vect-data-refs.cc (vect_grouped_store_supported): Add new condition --- gcc/tree-vect-data-refs.cc | 2 ++ 1 file changed, 2 insertions(+) diff --git a/gcc/tree-vect-data-refs.cc b/gcc/tree-vect-data-refs.cc index

[PATCH v5 08/10] RISC-V:autovec: Add autovectorization tests for binary integer

2023-04-05 Michael Collison * gcc.target/riscv/rvv/autovec/loop-and-rv32.c: New test to verify code generation of vector "and" on rv32. * gcc.target/riscv/rvv/autovec/loop-and.c: New test to verify code generation of vector "and" on rv64. *

Re: [PATCH v2] RISC-V: Fix sync.md and riscv.cc whitespace errors

On 26 April 2023 23:21:06 CEST, Patrick O'Neill wrote: >This patch fixes whitespace errors introduced with >https://gcc.gnu.org/pipermail/gcc-patches/2023-April/616807.html > >2023-04-26 Patrick O'Neill > >gcc/ChangeLog: > > * config/riscv/riscv.cc: Fix whitespace. > *

[PATCH v5 00/10] RISC-V: autovec: Add autovec support

This series of patches adds foundational support for RISC-V auto-vectorization support. These patches are based on the current upstream rvv vector intrinsic support and is not a new implementation. Most of the implementation consists of adding the new vector cost model, the autovectorization

[PATCH v5 06/10] RISC-V:autovec: Add autovectorization tests for add & sub

2023-03-02 Michael Collison Vineet Gupta * gcc.target/riscv/rvv/autovec: New directory for autovectorization tests. * gcc.target/riscv/rvv/autovec/loop-add-rv32.c: New test to verify code generation of vector add on rv32. *

[PATCH v5 05/10] RISC-V:autovec: Add autovectorization patterns for binary integer & len_load/store

2023-04-25 Michael Collison Juzhe Zhong * config/riscv/riscv.md (riscv_vector_preferred_simd_mode): Include vector-iterators.md. * config/riscv/vector-auto.md: New file containing autovectorization patterns. * config/riscv/vector.md: Remove

[PATCH v5 01/10] RISC-V: autovec: Add new predicates and function prototypes

2023-04-24 Michael Collison Juzhe Zhong * config/riscv/riscv-protos.h (riscv_vector_preferred_simd_mode): New. (riscv_vector_mask_mode_p): Ditto. (riscv_vector_get_mask_mode): Ditto. (emit_vlmax_vsetvl): Ditto.

Re: [PATCH] RISC-V: Fix sync.md and riscv.cc whitespace errors

On 26 April 2023 23:10:01 CEST, Andreas Schwab wrote: >On Apr 26 2023, Patrick O'Neill wrote: > >> @@ -290,10 +290,10 @@ >>[(set (match_operand:GPR 0 "register_operand" "=") >> (match_operand:GPR 1 "memory_operand" "+A")) >> (set (match_dup 1) >> -(unspec_volatile:GPR

[PATCH v2] RISC-V: Fix sync.md and riscv.cc whitespace errors

This patch fixes whitespace errors introduced with https://gcc.gnu.org/pipermail/gcc-patches/2023-April/616807.html 2023-04-26 Patrick O'Neill gcc/ChangeLog: * config/riscv/riscv.cc: Fix whitespace. * config/riscv/sync.md: Fix whitespace. Signed-off-by: Patrick O'Neill ---

[pushed] c++: remove nsdmi_inst hashtable

Tested x86_64-pc-linux-gnu, applying to trunk. -- 8< -- It occurred to me that we have a perfectly good DECL_INITIAL field to put the instantiated DMI into, we don't need a separate hash table. gcc/cp/ChangeLog: * init.cc (nsdmi_inst): Remove. (maybe_instantiate_nsdmi_init):

[pushed] c++: local class in nested generic lambda [PR109241]

Tested x86_64-pc-linux-gnu, applying to trunk. -- 8< -- The earlier fix for PR109241 avoided the crash by handling a type with no TREE_BINFO. But we want to move toward doing the partial substitution of classes in generic lambdas, so let's take a step in that direction. PR c++/109241

[pushed] c++: unique friend shenanigans [PR69836]

Tested x86_64-pc-linux-gnu, applying to trunk. -- 8< -- Normally we re-instantiate a function declaration when we start to instantiate the body in case of multiple declarations. In this wacky testcase, this causes a problem because the type of the w_counter parameter depends on its declaration

Re: [PATCH] RISC-V: Fix sync.md and riscv.cc whitespace errors

On Apr 26 2023, Patrick O'Neill wrote: > @@ -290,10 +290,10 @@ >[(set (match_operand:GPR 0 "register_operand" "=") > (match_operand:GPR 1 "memory_operand" "+A")) > (set (match_dup 1) > - (unspec_volatile:GPR [(match_operand:GPR 2 "reg_or_0_operand" "rJ") > -

[PATCH] RISC-V: Fix sync.md and riscv.cc whitespace errors

This patch fixes whitespace errors introduced with https://gcc.gnu.org/pipermail/gcc-patches/2023-April/616807.html 2023-04-26 Patrick O'Neill gcc/ChangeLog: * config/riscv/riscv.cc: Fix whitespace. * config/riscv/sync.md: Fix whitespace. Signed-off-by: Patrick O'Neill ---

Re: libsanitizer: sync from master

On 4/26/23 20:31, Florian Weimer wrote: > * Martin Liška: > >> On 11/15/22 16:47, Martin Liška wrote: >>> Hi. >>> >>> I've just pushed libsanitizer update that was tested on x86_64-linux and >>> ppc64le-linux systems. >>> Moreover, I run bootstrap on x86_64-linux and checked ABI difference with

Re: libsanitizer: sync from master

On 4/26/23 21:23, H.J. Lu wrote: > On Wed, Apr 26, 2023 at 6:52 AM Martin Liška wrote: >> >> On 11/15/22 16:47, Martin Liška wrote: >>> Hi. >>> >>> I've just pushed libsanitizer update that was tested on x86_64-linux and >>> ppc64le-linux systems. >>> Moreover, I run bootstrap on x86_64-linux

Re: libsanitizer: sync from master

On 26 April 2023 20:31:10 CEST, Florian Weimer via Fortran wrote: >* Martin Liška: > >> On 11/15/22 16:47, Martin Liška wrote: >>> Hi. >>> >>> I've just pushed libsanitizer update that was tested on x86_64-linux and >>> ppc64le-linux systems. >>> Moreover, I run bootstrap on x86_64-linux and

Re: [PATCH] c++: Micro-optimize most_specialized_partial_spec

On Thu, Sep 1, 2022 at 2:40 PM Jason Merrill wrote: > > On 8/31/22 17:15, Patrick Palka wrote: > > This introduces an early exit test to most_specialized_partial_spec for > > the common case where we have no partial specializations, which allows > > us to avoid some unnecessary work. In passing,

[COMMITTED 4/5] Rename ssa_global_cache to ssa_cache and add has_range

The original ssa_global_cache was intended to simply be the global cache for ranger, but uses of it have since percolated such that it is really just a range acche for a list of ssa-names. This patch renames it from "ssa_global_cache" to "ssa_cache". It also adds a method called "has_range"

[COMMITTED 5/5] PR tree-optimization/108697 - Create a lazy ssa_cache.

Sparsely used ssa caches can benefit from using a bitmap to determine if a name already has an entry.  The path_query class was already managing something like this internally, but there is benefit to making it generally available. ssa_lazy_cache inherits from ssa_cache and adds management of

[COMMITTED 3/5] Add sbr_lazy_vector and adjust (e)vrp sparse cache

This implements a sparse vector class for rangers cache and uses it bey default except when the CFG is very small, in qhich case the original full vectors are faster.  It works like a normal vector cache (in fact it inherits from it), but uses a sparse bitmap to determine whether a vector

[COMMITTED 2/5] Quicker relation check.

If either of the SSA names in a comparison do not have any equivalences or relations, we can short-circuit the check slightly and be a bit faster. Bootstrapped on x86_64-pc-linux-gnu with no regressions.  Pushed. Andrew From ee03aca78fb5739f4cd76cb30332f8aff2c5243a Mon Sep 17 00:00:00 2001

[COMMITTED 1/5] PR tree-optimization/109417 - Don't save ssa-name pointer in dependency cache.

On 4/25/23 22:34, Jeff Law wrote: On 4/24/23 07:51, Andrew MacLeod wrote: Its not a real cache..  its merely a statement shortcut in dependency analysis to avoid re-parsing statements every time we look at them for dependency analysis It is not suppose to be used for anything other

Re: libsanitizer: sync from master

On Wed, Apr 26, 2023 at 6:52 AM Martin Liška wrote: > > On 11/15/22 16:47, Martin Liška wrote: > > Hi. > > > > I've just pushed libsanitizer update that was tested on x86_64-linux and > > ppc64le-linux systems. > > Moreover, I run bootstrap on x86_64-linux and checked ABI difference with > >

Re: [PATCH] GCC-13/changes: Add note about iostream usage

On Wed, Apr 26, 2023 at 12:07 PM Jonathan Wakely via Gcc-patches wrote: > > On 26/04/23 09:53 -0700, Andrew Pinski wrote: > >This adds a note about iostream usage so it does not catch others > >in surpise like it has already. > > > >OK? > > Thanks, I agree we should add something, but have some

Re: [PATCH] GCC-13/changes: Add note about iostream usage

On 26/04/23 09:53 -0700, Andrew Pinski wrote: This adds a note about iostream usage so it does not catch others in surpise like it has already. OK? Thanks, I agree we should add something, but have some comments below. --- htdocs/gcc-13/changes.html | 5 + 1 file changed, 5 insertions(+)

Re: libsanitizer: sync from master

* Martin Liška: > On 11/15/22 16:47, Martin Liška wrote: >> Hi. >> >> I've just pushed libsanitizer update that was tested on x86_64-linux and >> ppc64le-linux systems. >> Moreover, I run bootstrap on x86_64-linux and checked ABI difference with >> abidiff. > > Hello. > > And I've done the

Re: [PATCH v4 05/10] RISC-V:autovec: Add autovectorization patterns for binary integer operations

Hi Michael, I have the diff below for the binops in my tree locally. Maybe something like this works for you? Untested but compiles and the expander helpers would need to be fortified obviously. Regards Robin -- gcc/ChangeLog: * config/riscv/autovec.md (3): New binops expander.

[committed] RISCV: Inline subword atomic ops

Committed - I had to reformat the changelog so it would push and resolve a trivial merge conflict in riscv.opt. --- RISC-V has no support for subword atomic operations; code currently generates libatomic library calls. This patch changes the default behavior to inline subword atomic calls

[PATCH] GCC-13/changes: Add note about iostream usage

This adds a note about iostream usage so it does not catch others in surpise like it has already. OK? --- htdocs/gcc-13/changes.html | 5 + 1 file changed, 5 insertions(+) diff --git a/htdocs/gcc-13/changes.html b/htdocs/gcc-13/changes.html index 70732ec0..7c83f7c4 100644 ---

[PATCH, V4] PR target/105325, Make load/cmp fusion know about prefixed loads.

I posted a version of patch on March 21st, a second version on March 24th, and the third version on March 28th. The V4 patch just adds a new condition to the new test case. Previously, I was using 'powerpc_prefixed_addr' to determine whether the GCC compiler would automatically generate prefixed

[PATCH] doc: Add explanation of zero-length array example

As suggested here: https://gcc.gnu.org/pipermail/gcc/2023-April/241190.html OK for trunk? -- >8 -- gcc/ChangeLog: * doc/extend.texi (Zero Length): Describe example. --- gcc/doc/extend.texi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi

[committed] MAINTAINERS: Add myself to write after approval

On 4/26/23 09:08, Palmer Dabbelt wrote: On Wed, 26 Apr 2023 09:07:05 PDT (-0700), Patrick O'Neill wrote: 2023-04-26 Patrick O'Neill * MAINTAINERS: Add myself. Signed-off-by: Patrick O'Neill ---  MAINTAINERS | 1 +  1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS

Re: [PATCH] Add targetm.libm_function_max_error

Hello, On Wed, 26 Apr 2023, Jakub Jelinek via Gcc-patches wrote: > For glibc I've gathered data from: > 4) using attached ulp-tester.c (how to invoke in file comment; tested >both x86_64, ppc64, ppc64le 50M pseudo-random values in all 4 rounding >modes, plus on x86_64 float/double

Re: [PATCH] MAINTAINERS: Add myself to write after approval

On Wed, 26 Apr 2023 09:07:05 PDT (-0700), Patrick O'Neill wrote: 2023-04-26 Patrick O'Neill * MAINTAINERS: Add myself. Signed-off-by: Patrick O'Neill --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index d2188c3275a..169418d44f7 100644

[PATCH] MAINTAINERS: Add myself to write after approval

2023-04-26 Patrick O'Neill * MAINTAINERS: Add myself. Signed-off-by: Patrick O'Neill --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index d2188c3275a..169418d44f7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -578,6 +578,7 @@ Dorit Nuzman

Re: [PATCH] testsuite: adjust NOP expectations for RISC-V

On Wed, 26 Apr 2023 08:26:26 PDT (-0700), gcc-patches@gcc.gnu.org wrote: On 4/25/23 08:50, Jan Beulich via Gcc-patches wrote: RISC-V will emit ".option nopic" when -fno-pie is in effect, which matches the generic pattern. Just like done for Alpha, special-case RISC-V. --- A couple more

Re: [PATCH] testsuite: adjust NOP expectations for RISC-V

On 4/25/23 08:50, Jan Beulich via Gcc-patches wrote: RISC-V will emit ".option nopic" when -fno-pie is in effect, which matches the generic pattern. Just like done for Alpha, special-case RISC-V. --- A couple more targets look to be affected as well, simply because their "no-operation" insn

[PATCH] Add targetm.libm_function_max_error

Hi! As has been discussed before, the following patch adds target hook for math library function maximum errors measured in ulps. The default is to return ~0U which is a magic maximum value which means nothing is known about precision of the match function. The first argument is unsigned int

[PATCH][committed] aarch64: Reimplement RSHRN2 intrinsic patterns with standard RTL codes

Hi all, Similar to the previous patch, we can reimplement the rshrn2 patterns using standard RTL codes for shift, truncate and plus with the appropriate constants. This allows us to get rid of UNSPEC_RSHRN entirely. Bootstrapped and tested on aarch64-none-linux-gnu. Pushing to trunk. Thanks,

[PATCH][committed] aarch64: Reimplement RSHRN intrinsic patterns with standard RTL codes

Hi all, This patch reimplements the backend patterns for the rshrn intrinsics using standard RTL codes rather than UNSPECS. We already represent shrn as truncate of a shift. rshrn can be represented as truncate (src + (1 << (shft - 1)) >> shft), similar to how LLVM treats it. I have a

Re: libsanitizer: sync from master

On 11/15/22 16:47, Martin Liška wrote: > Hi. > > I've just pushed libsanitizer update that was tested on x86_64-linux and > ppc64le-linux systems. > Moreover, I run bootstrap on x86_64-linux and checked ABI difference with > abidiff. Hello. And I've done the same now and merged upstream

RE: [PATCH] RISC-V: Legitimise the const0_rtx for RVV load/store address

Thanks Kito. It comes from some experience of Ju-Zhe for auto vectorization in previous. Pan -Original Message- From: Kito Cheng Sent: Wednesday, April 26, 2023 9:24 PM To: Li, Pan2 Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@sifive.com; Wang, Yanzhang Subject:

Re: [PATCH] LoongArch: Enable shrink wrapping

On Wed, 2023-04-26 at 17:53 +0800, Lulu Cheng wrote: > Hi, ruoyao: > >    The performance of spec2006 is finished. The fixed-point > 400.perlbench has about 3% performance improvement, > > and the other basics have not changed, and the floating-point tests > have > basically remained the

Re: [PATCH] RISC-V: Legitimise the const0_rtx for RVV load/store address

LGTM, pushed to trunk > This patch try to legitimise the const0_rtx (aka zero register) > as the base register for the RVV load/store instructions. > > For example: > vint32m1_t test_vle32_v_i32m1_shortcut (size_t vl) > { > return __riscv_vle32_v_i32m1 ((int32_t *)0, vl); > } The example is

[PATCH v2] RISC-V: ICE for vlmul_ext_v intrinsic API

From: Yanzhang Wang PR 109617 gcc/ChangeLog: * config/riscv/vector-iterators.md: Support VNx2HI and VNX4DI when MIN_VLEN >= 128. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/vlmul_ext-1.c: New test. Signed-off-by: Yanzhang Wang Co-authored-by: Pan Li ---

Re: [PATCH] RISCV: Add vector psabi checking.

> gcc/ChangeLog: > > * config/riscv/riscv.cc (riscv_scalable_vector_type_p): > (riscv_arg_has_vector): > (riscv_pass_in_vector_p): > (riscv_get_arg_info): You need to write something for changelog...:P

Re: [PATCH] wwwdocs: Document more libstdc++ additions for GCC 13

On Wed, 26 Apr 2023 at 13:52, Patrick Palka via Libstdc++ < libstd...@gcc.gnu.org> wrote: > Does this look OK for wwwdocs? > > --- > htdocs/gcc-13/changes.html | 12 +++- > 1 file changed, 11 insertions(+), 1 deletion(-) > > diff --git a/htdocs/gcc-13/changes.html

[PATCH] wwwdocs: Document more libstdc++ additions for GCC 13

Does this look OK for wwwdocs? --- htdocs/gcc-13/changes.html | 12 +++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/htdocs/gcc-13/changes.html b/htdocs/gcc-13/changes.html index 7b64b2e5..191d0a4d 100644 --- a/htdocs/gcc-13/changes.html +++ b/htdocs/gcc-13/changes.html

[PATCH] RISCV: Add vector psabi checking.

From: Yanzhang Wang This patch adds support to check function's argument or return is vector type and throw warning if yes. gcc/ChangeLog: * config/riscv/riscv.cc (riscv_scalable_vector_type_p): (riscv_arg_has_vector): (riscv_pass_in_vector_p):

RE: [PATCH] RISC-V: ICE for vlmul_ext_v intrinsic API

Great! Thanks yanzhang. Could you please help to add some text about the changes below? Or kito may meet some error by git hook when commit the PATCH. gcc/ChangeLog: * config/riscv/vector-iterators.md: <- add text for change. gcc/testsuite/ChangeLog:

Re: [PATCH] avr: Set param_min_pagesize to 0 [PR105523]

On Wed, Apr 26, 2023 at 12:56 PM wrote: > > On Wed, Apr 26, 2023 at 3:15 PM Richard Biener via Gcc-patches > wrote: > > > > On Wed, Apr 26, 2023 at 11:42 AM Richard Biener > > wrote: > > > > > > On Wed, Apr 26, 2023 at 11:01 AM SenthilKumar.Selvaraj--- via > > > Gcc-patches wrote: > > > > > >

Re: Unloop no longer looping loops in loop-ch

On Wed, 26 Apr 2023, Jan Hubicka wrote: > > > - if (precise) > > > + if (precise > > > + && get_max_loop_iterations_int (loop) == 1) > > > + { > > > + if (dump_file && (dump_flags & TDF_DETAILS)) > > > + fprintf (dump_file, "Loop %d no longer loops.\n", loop->num); > > > > but

[PATCH] RISC-V: ICE for vlmul_ext_v intrinsic API

From: Yanzhang Wang PR 109617 gcc/ChangeLog: * config/riscv/vector-iterators.md: gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/vlmul_ext-1.c: New test. Signed-off-by: Yanzhang Wang Co-authored-by: Pan Li --- gcc/config/riscv/vector-iterators.md

[PATCH] RISC-V: Legitimise the const0_rtx for RVV load/store address

From: Pan Li This patch try to legitimise the const0_rtx (aka zero register) as the base register for the RVV load/store instructions. For example: vint32m1_t test_vle32_v_i32m1_shortcut (size_t vl) { return __riscv_vle32_v_i32m1 ((int32_t *)0, vl); } Before this patch: li a5,0 vsetvli

Re: [PATCH] VECT: Add decrement IV iteration loop control by variable amount support

"juzhe.zh...@rivai.ai" writes: > Hi， Richard. > Would you mind take a look at the loop control part again: > > static gcond * > vect_set_loop_condition_partial_vectors (class loop *loop, > loop_vec_info loop_vinfo, tree niters, > tree final_iv, bool niters_maybe_zero, > gimple_stmt_iterator

[COMMITTED] Convert compare_nonzero_chars to wide_ints.

gcc/ChangeLog: * tree-ssa-strlen.cc (compare_nonzero_chars): Convert to wide_ints. --- gcc/tree-ssa-strlen.cc | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/gcc/tree-ssa-strlen.cc b/gcc/tree-ssa-strlen.cc index 0bbcb04834f..de785281b27 100644 ---

[COMMITTED] Remove range_has_numeric_bounds_p.

gcc/ChangeLog: * value-range.cc (irange::copy_legacy_to_multi_range): Rewrite use of range_has_numeric_bounds_p with irange API. (range_has_numeric_bounds_p): Delete. * value-range.h (range_has_numeric_bounds_p): Delete. --- gcc/value-range.cc | 12 +++-

[COMMITTED] Remove range_int_cst_p.

gcc/ChangeLog: * tree-data-ref.cc (compute_distributive_range): Replace uses of range_int_cst_p with irange API. * tree-ssa-strlen.cc (get_range_strlen_dynamic): Same. * tree-vrp.h (range_int_cst_p): Delete. * vr-values.cc (check_for_binary_op_overflow):

[COMMITTED] Remove legacy range support.

This patch removes all the code paths guarded by legacy_mode_p(), thus allowing us to re-use the int_range<1> idiom for a range of one sub-range. This allows us to represent these simple ranges in a more efficient manner. gcc/ChangeLog: * range-op.cc (range_op_cast_tests): Remove legacy

[COMMITTED] Remove some uses of deprecated irange API.

gcc/ChangeLog: * builtins.cc (expand_builtin_strnlen): Rewrite deprecated irange API uses to new API. * gimple-predicate-analysis.cc (find_var_cmp_const): Same. * internal-fn.cc (get_min_precision): Same. * match.pd: Same. * tree-affine.cc

[COMMITTED] Replace ad-hoc value_range dumpers with irange::dump.

This causes a regression in gcc.c-torture/unsorted/dump-noaddr.c. The test is asserting that two dumps are identical, but they are not because irange dumps the type which varies between runs: < VR [irange] void (*) (int) [1, +INF] > VR [irange]

[COMMITTED] Fix swapping of ranges.

The legacy range code has logic to swap out of order endpoints in the irange constructor. The new irange code expects the caller to fix any inconsistencies, thus speeding up the common case. However, this means that when we remove legacy, any stragglers must be fixed. This patch fixes the 3

Re: [PATCH] avr: Set param_min_pagesize to 0 [PR105523]

On Wed, Apr 26, 2023 at 3:15 PM Richard Biener via Gcc-patches wrote: > > On Wed, Apr 26, 2023 at 11:42 AM Richard Biener > wrote: > > > > On Wed, Apr 26, 2023 at 11:01 AM SenthilKumar.Selvaraj--- via > > Gcc-patches wrote: > > > > > > Hi, > > > > > > This patch fixes PR 105523 by setting

Re: Unloop no longer looping loops in loop-ch

> > - if (precise) > > + if (precise > > + && get_max_loop_iterations_int (loop) == 1) > > + { > > + if (dump_file && (dump_flags & TDF_DETAILS)) > > + fprintf (dump_file, "Loop %d no longer loops.\n", loop->num); > > but max loop iterations is 1 ...? I first check for

Re: [PATCH] LoongArch: Enable shrink wrapping

On 2023/4/26 18:14, Lulu Cheng wrote: 在 2023/4/26 下午6:02, WANG Xuerui 写道: On 2023/4/26 17:53, Lulu Cheng wrote: Hi, ruoyao:   The performance of spec2006 is finished. The fixed-point 400.perlbench has about 3% performance improvement, and the other basics have not changed, and the

Re: [PATCH] LoongArch: Enable shrink wrapping

在 2023/4/26 下午6:02, WANG Xuerui 写道: On 2023/4/26 17:53, Lulu Cheng wrote: Hi, ruoyao:   The performance of spec2006 is finished. The fixed-point 400.perlbench has about 3% performance improvement, and the other basics have not changed, and the floating-point tests have basically

Re: Re: [PATCH] VECT: Add decrement IV iteration loop control by variable amount support

Hi， Richard. Would you mind take a look at the loop control part again: static gcond * vect_set_loop_condition_partial_vectors (class loop *loop, loop_vec_info loop_vinfo, tree niters, tree final_iv, bool niters_maybe_zero, gimple_stmt_iterator loop_cond_gsi) ... tree loop_len_x = NULL_TREE;

Re: [PATCH] LoongArch: Enable shrink wrapping

On 2023/4/26 17:53, Lulu Cheng wrote: Hi, ruoyao:   The performance of spec2006 is finished. The fixed-point 400.perlbench has about 3% performance improvement, and the other basics have not changed, and the floating-point tests have basically remained the same. Nice to know!  

Re: [PATCH] LoongArch: Enable shrink wrapping

Hi, ruoyao:   The performance of spec2006 is finished. The fixed-point 400.perlbench has about 3% performance improvement, and the other basics have not changed, and the floating-point tests have basically remained the same.   Do you have any questions about the test cases

Re: [PATCH] Avoid creating useless debug temporaries

On Wed, Apr 26, 2023 at 11:31 AM Eric Botcazou wrote: > > > probably also helps PR109612 and the other similar PR referenced therein. > > Here's a more aggressive patch in this area, but it regresses guality tests, > for example: > > +FAIL: gcc.dg/guality/ipa-sra-1.c -O2 -DPREVENT_OPTIMIZATION

Re: [PATCH] avr: Set param_min_pagesize to 0 [PR105523]

On Wed, Apr 26, 2023 at 11:42 AM Richard Biener wrote: > > On Wed, Apr 26, 2023 at 11:01 AM SenthilKumar.Selvaraj--- via > Gcc-patches wrote: > > > > Hi, > > > > This patch fixes PR 105523 by setting param_min_pagesize to 0 for the > > avr target. For this target, zero and offsets from zero are

Re: [PATCH] avr: Set param_min_pagesize to 0 [PR105523]

On Wed, Apr 26, 2023 at 11:01 AM SenthilKumar.Selvaraj--- via Gcc-patches wrote: > > Hi, > > This patch fixes PR 105523 by setting param_min_pagesize to 0 for the > avr target. For this target, zero and offsets from zero are perfectly > valid addresses, and the default value of param_min_pagesize

Re: [PATCH V3] rs6000: Load high and low part of 64bit constant independently

Hi Jeff, on 2023/1/4 14:51, Jiufu Guo wrote: > Hi, > > Compare with previous version, this patch updates the comments only. > https://gcc.gnu.org/pipermail/gcc-patches/2022-December/608293.html > > For a complicate 64bit constant, below is one instruction-sequence to > build: > lis

Re: [PATCH] Avoid creating useless debug temporaries

> probably also helps PR109612 and the other similar PR referenced therein. Here's a more aggressive patch in this area, but it regresses guality tests, for example: +FAIL: gcc.dg/guality/ipa-sra-1.c -O2 -DPREVENT_OPTIMIZATION line 27 k == 3 +FAIL: gcc.dg/guality/ipa-sra-1.c -O3 -g

Re: [PATCH] VECT: Add decrement IV iteration loop control by variable amount support

"juzhe.zh...@rivai.ai" writes: > Thank you so much for pointing out this issue. > > After reading your comments carefully, I need to revise > "vect_set_loop_controls_by_while_len" in loop control like this: > > vect_set_loop_controls_by_while_len > ... > tree X = NULL_TREE; > FOR_EACH_VEC_ELT

Re: Re: [PATCH] VECT: Add decrement IV iteration loop control by variable amount support

Oh， I see。 I just checked the codes again. I think I can't do it directly in the vect_set_loop_controls_by_while_len Instead, I should do something like this for length: /* First try using permutes. This adds a single vector instruction to the loop for each mask, but needs no

[PATCH] avr: Set param_min_pagesize to 0 [PR105523]

Hi, This patch fixes PR 105523 by setting param_min_pagesize to 0 for the avr target. For this target, zero and offsets from zero are perfectly valid addresses, and the default value of param_min_pagesize ends up triggering warnings on valid memory accesses. Ok for trunk and backporting to 13

Re: Re: [PATCH] VECT: Add decrement IV iteration loop control by variable amount support

Thank you so much for pointing out this issue. After reading your comments carefully, I need to revise "vect_set_loop_controls_by_while_len" in loop control like this: vect_set_loop_controls_by_while_len ... tree X = NULL_TREE; FOR_EACH_VEC_ELT (rgc->controls, i, ctrl) ... if (i == 0) { X

[COMMITTED] Convert users of legacy API to get_legacy_range() function.

This patch converts the users of the legacy API to a function called get_legacy_range() which will return the pieces of the soon to be removed API (min, max, and kind). This is a temporary measure while these users are converted. In upcoming patches I will convert most users, but most of the

[COMMITTED] Remove irange::constant_p.

gcc/ChangeLog: * value-range-pretty-print.cc (vrange_printer::visit): Remove constant_p use. * value-range.cc (irange::constant_p): Remove. (irange::get_nonzero_bits_from_range): Remove constant_p use. * value-range.h (class irange): Remove constant_p.

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