On Wed, 16 Aug 2023 at 03:27, Jeff Law via Gcc-patches
wrote:
>
>
>
> On 8/9/23 20:25, Tsukasa OI wrote:
> > From: Tsukasa OI
> >
> > The "pause" RISC-V hint instruction requires the 'Zihintpause' extension
> > (in the assembler). However, GCC emits "pause" unconditionally, making
> > an
Hi Fei:
Tried to use Jiawei's patch to test this patch and found some issue:
> @@ -5430,13 +5632,15 @@ riscv_expand_prologue (void)
>/* Save the registers. */
>if ((frame->mask | frame->fmask) != 0)
> {
> - HOST_WIDE_INT step1 = riscv_first_stack_step (frame, remaining_size);
On Tue, 15 Aug 2023, David Malcolm via Gcc-patches wrote:
> I'd prefer to reword this, as libgccjit was a poor choice of name for
> the library (sorry!), to make it clearer it can be used for both ahead-
> of-time and just-in-time compilation, and that as used for compilation,
> the host
From: Pan Li
This patch would like to support the rounding mode API for the
VFWCVT.X.F.V as the below samples.
* __riscv_vfwcvt_xu_f_v_u64m2_rm
* __riscv_vfwcvt_xu_f_v_u64m2_rm_m
Signed-off-by: Pan Li
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins-bases.cc
(BASE): New
On Tue, 15 Aug 2023, Paul Koning wrote:
> Now I'm confused. I thought the whole point of what GCC is trying to, and
> wants to document, is that it DOES preserve security properties. If the
> source code is standards-compliant and contains algorithms free of security
> holes, then the
Committed, thanks Kito.
Pan
From: Kito Cheng
Sent: Wednesday, August 16, 2023 3:38 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang, Yanzhang
Subject: Re: [PATCH v2] RISC-V: Support RVV VFWCVT.X.F.V rounding mode
intrinsic API
lgtm
On Wed, Aug 16, 2023 at 3:32 PM
lgtm
On Wed, Aug 16, 2023 at 3:32 PM wrote:
> From: Pan Li
>
> This patch would like to support the rounding mode API for the
> VFWCVT.X.F.V as the below samples.
>
> * __riscv_vfwcvt_x_f_v_i64m2_rm
> * __riscv_vfwcvt_x_f_v_i64m2_rm_m
>
> Signed-off-by: Pan Li
>
> gcc/ChangeLog:
>
> *
From: Pan Li
This patch would like to support the rounding mode API for the
VFWCVT.X.F.V as the below samples.
* __riscv_vfwcvt_x_f_v_i64m2_rm
* __riscv_vfwcvt_x_f_v_i64m2_rm_m
Signed-off-by: Pan Li
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins-bases.cc
(BASE): New
On Mon, Aug 14, 2023 at 10:40 AM Hongtao Liu wrote:
>
> On Fri, Aug 11, 2023 at 2:02 PM liuhongt via Gcc-patches
> wrote:
> >
> > Rename original use_gather to use_gather_8parts, Support
> > -mtune-ctrl={,^}use_gather to set/clear tune features
> > use_gather_{2parts, 4parts, 8parts}. Support
On Fri, Aug 11, 2023 at 8:38 AM liuhongt wrote:
>
> For more details of GDS (Gather Data Sampling), refer to
> https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/advisory-guidance/gather-data-sampling.html
>
> After microcode update, there's
Committed, thanks Kito.
Pan
From: Kito Cheng
Sent: Wednesday, August 16, 2023 3:12 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang, Yanzhang
Subject: Re: [PATCH v2] RISC-V: Support RVV VFCVT.F.X.V and VFCVT.F.XU.V
rounding mode intrinsic API
lgtm
On Wed, Aug 16,
lgtm
On Wed, Aug 16, 2023 at 2:51 PM wrote:
> From: Pan Li
>
> This patch would like to support the rounding mode API for the
> VFCVT.F.X.V and VFCVT.F.XU.V as the below samples.
>
> * __riscv_vfcvt_f_x_v_f32m1_rm
> * __riscv_vfcvt_f_x_v_f32m1_rm_m
> * __riscv_vfcvt_f_xu_v_f32m1_rm
> *
Committed, thanks Kito.
Pan
-Original Message-
From: Kito Cheng
Sent: Wednesday, August 16, 2023 3:02 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang, Yanzhang
Subject: Re: [PATCH v2] RISC-V: Support RVV VFCVT.XU.F.V rounding mode
intrinsic API
lgtm
On
lgtm
On Wed, Aug 16, 2023 at 2:21 PM Pan Li via Gcc-patches
wrote:
>
> From: Pan Li
>
> This patch would like to support the rounding mode API for the
> VFCVT.XU.F.V as the below samples.
>
> * __riscv_vfcvt_xu_f_v_u32m1_rm
> * __riscv_vfcvt_xu_f_v_u32m1_rm_m
>
> Signed-off-by: Pan Li
>
>
Committed after fixing the comments.
https://gcc.gnu.org/g:a79cf858b39e01c80537bc5d47a5e9004418c267
Thanks
Gui Haochen
在 2023/8/14 15:47, Kewen.Lin 写道:
> Hi Haochen,
>
> on 2023/8/14 10:18, HAO CHEN GUI wrote:
>> Hi,
>> This patch modifies vsx extract expand and generates mfvsrwz/stxsiwx
>>
Committed after tweaking and testing.
https://gcc.gnu.org/git/gitweb.cgi?p=gcc.git;h=d471bdb0453de7b738f49148b66d57cb5871937d
Thanks
Gui Haochen
在 2023/7/28 17:32, Kewen.Lin 写道:
> Hi Haochen,
>
> on 2023/7/5 11:22, HAO CHEN GUI wrote:
>> Hi,
>> This patch skips redundant vector extract insn
From: Pan Li
This patch would like to support the rounding mode API for the
VFCVT.F.X.V and VFCVT.F.XU.V as the below samples.
* __riscv_vfcvt_f_x_v_f32m1_rm
* __riscv_vfcvt_f_x_v_f32m1_rm_m
* __riscv_vfcvt_f_xu_v_f32m1_rm
* __riscv_vfcvt_f_xu_v_f32m1_rm_m
Signed-off-by: Pan Li
"juzhe.zh...@rivai.ai" writes:
> Hi, Robin, Richard and Richi.
>
> I am wondering whether we can just simply replace the VEC_EXTRACT expander
> with binary?
>
> Like this :?
>
> DEF_INTERNAL_OPTAB_FN (VEC_EXTRACT, ECF_CONST | ECF_NOTHROW,
> - vec_extract, vec_extract)
> +
LGTM
juzhe.zh...@rivai.ai
From: Robin Dapp
Date: 2023-08-15 23:49
To: gcc-patches; palmer; Kito Cheng; jeffreyalaw; juzhe.zh...@rivai.ai
CC: rdapp.gcc
Subject: [PATCH] RISC-V: Fix reduc_strict_run-1 test case.
Hi,
this patch changes the equality check for the reduc_strict_run-1
testcase
From: Pan Li
This patch would like to support the rounding mode API for the
VFCVT.XU.F.V as the below samples.
* __riscv_vfcvt_xu_f_v_u32m1_rm
* __riscv_vfcvt_xu_f_v_u32m1_rm_m
Signed-off-by: Pan Li
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins-bases.cc
(BASE): New
Committed, thanks Jeff.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of juzhe.zh...@rivai.ai
Sent: Wednesday, August 16, 2023 9:23 AM
To: jeffreyalaw ; gcc-patches
Cc: kito.cheng ; Kito.cheng ;
Robin Dapp
Subject: Re: Re: [PATCH] RISC-V: Support
Committed, thanks Richard.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Richard Biener via Gcc-patches
Sent: Tuesday, August 15, 2023 8:35 PM
To: Juzhe-Zhong
Cc: gcc-patches@gcc.gnu.org; richard.sandif...@arm.com
Subject: Re: [PATCH V2] VECT: Apply MASK_LEN_{LOAD_LANES,
Committed, thanks Kito.
Pan
From: Kito Cheng
Sent: Wednesday, August 16, 2023 1:57 PM
To: Li, Pan2
Cc: GCC Patches ; 钟居哲 ; Wang,
Yanzhang
Subject: Re: [PATCH v2] RISC-V: Support RVV VFCVT.X.F.V rounding mode intrinsic
API
LGTM
mailto:pan2...@intel.com>> 於 2023年8月16日 週三 13:17 寫道：
From: Pan
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