> -Original Message-
> From: Richard Sandiford
> Sent: Friday, September 1, 2023 2:36 PM
> To: Tamar Christina
> Cc: gcc-patches@gcc.gnu.org; nd ; Richard Earnshaw
> ; Marcus Shawcroft
> ; Kyrylo Tkachov
> Subject: Re: [PATCH]AArch64 xorsign: Fix scalar xorsign lowering
>
> Tamar
Hi All,
In GCC-9 our scalar xorsign pattern broke and we didn't notice it because the
testcase was not strong enough. With this commit
8d2d39587d941a40f25ea0144cceb677df115040 is the first bad commit
commit 8d2d39587d941a40f25ea0144cceb677df115040
Author: Segher Boessenkool
Date: Mon Oct 22
> -Original Message-
> From: Richard Biener
> Sent: Friday, August 18, 2023 2:53 PM
> To: Tamar Christina
> Cc: gcc-patches@gcc.gnu.org; nd ; j...@ventanamicro.com
> Subject: RE: [PATCH 12/19]middle-end: implement loop peeling and IV
> updates for early break.
>
> On Fri, 18 Aug 2023,
> > Yeah if you comment it out one of the testcases should fail.
>
> using new_preheader instead of e->dest would make things clearer.
>
> You are now adding the same arg to every exit (you've just queried the
> main exit redirect_edge_var_map_vector).
>
> OK, so I think I understand what
> >> Do you see vect_constant_defs in practice, or is this just for
> >> completeness?
> >> I would expect any constants to appear as direct operands. I don't
> >> mind keeping it if it's just a belt-and-braces thing though.
> >
> > In the latency case where I had allow_constants the early
> > +
> > +(define_constraint "D3"
> > + "@internal
> > + A constraint that matches vector of immediates that is with 0 to
> > +(bits(mode)/2)-1."
> > + (and (match_code "const,const_vector")
> > + (match_test "aarch64_const_vec_all_same_in_range_p (op, 0,
> > +
> Tamar Christina writes:
> > Hi All,
> >
> > When determining issue rates we currently discount non-constant MLA
> > accumulators for Advanced SIMD but don't do it for the latency.
> >
> > This means the costs for Advanced SIMD with a constant accumulator are
> > wrong and results in us costing
Hi All,
Currently we segfault when len == 0 for an attribute list.
essentially [cons: =0, 1, 2, 3; attrs: ] segfaults but should be equivalent to
[cons: =0, 1, 2, 3] and [cons: =0, 1, 2, 3; attrs:]. This fixes it by just
returning early and leaving it to the validators whether this should error
Hi All,
In GCC 11 we implemented the vectorizer optab for widening left shifts,
however this optab is only supported for uniform shift constants.
At the moment GCC still has two loop vectorization strategy (classical loop and
SLP based loop vec) and the optab is implemented as a scalar pattern.
Hi All,
boolean comparisons have different cost depending on the mode. e.g.
a && b when predicated doesn't require an addition instruction, the AND is free
by combining the predicate of the one operation into the second one. At the
moment though we only fuse compares so this update requires one
Hi All,
When determining issue rates we currently discount non-constant MLA accumulators
for Advanced SIMD but don't do it for the latency.
This means the costs for Advanced SIMD with a constant accumulator are wrong and
results in us costing SVE and Advanced SIMD the same. This can cauze us to
Ping.
> -Original Message-
> From: Tamar Christina
> Sent: Wednesday, July 26, 2023 8:35 PM
> To: Tamar Christina ; gcc-patches@gcc.gnu.org
> Cc: nd ; jos...@codesourcery.com
> Subject: RE: [PATCH 2/2][frontend]: Add novector C pragma
>
> Hi, This is a respin of the patch taking in the
Hi, This is a respin of the patch taking in the feedback received from the C++
part.
Simultaneously it's also a ping
Hi All,
FORTRAN currently has a pragma NOVECTOR for indicating that vectorization should
not be applied to a particular loop.
ICC/ICX also has such a pragma for C and
> > +
> > + cp_token *tok = pragma_tok;
> > +
> > + do
> > {
> > - tok = cp_lexer_consume_token (parser->lexer);
> > - ivdep = cp_parser_pragma_ivdep (parser, tok);
> > - tok = cp_lexer_peek_token (the_parser->lexer);
> > + switch (cp_parser_pragma_kind (tok))
> >
Hi All,
FORTRAN currently has a pragma NOVECTOR for indicating that vectorization should
not be applied to a particular loop.
ICC/ICX also has such a pragma for C and C++ called #pragma novector.
As part of this patch series I need a way to easily turn off vectorization of
particular loops,
Hi All,
FORTRAN currently has a pragma NOVECTOR for indicating that vectorization should
not be applied to a particular loop.
ICC/ICX also has such a pragma for C and C++ called #pragma novector.
As part of this patch series I need a way to easily turn off vectorization of
particular loops,
Hi All,
The resulting predicate register of a whilelo is not
restricted to the lower half of the predicate register file.
As such these tests started failing after recent changes
because the whilelo outside the loop is getting assigned p15.
This widens the regexp.
Tested on
I think Andrew is listed as maintainer for tree-ssa, or maybe it's on one of
the Richard's lists?
> -Original Message-
> From: Gcc-patches bounces+tamar.christina=arm@gcc.gnu.org> On Behalf Of Philipp
> Tomsich
> Sent: Tuesday, July 11, 2023 7:51 AM
> To: Jakub Jelinek
> Cc:
> -Original Message-
> From: Richard Biener
> Sent: Friday, July 14, 2023 2:35 PM
> To: Tamar Christina
> Cc: gcc-patches@gcc.gnu.org; nd ; j...@ventanamicro.com
> Subject: RE: [PATCH 12/19]middle-end: implement loop peeling and IV
> updates for early break.
>
> On Thu, 13 Jul 2023,
> On Mon, Jul 17, 2023 at 12:21 AM Tamar Christina via Gcc-patches patc...@gcc.gnu.org> wrote:
> >
> > > -Original Message-
> > > From: Richard Biener
> > > Sent: Monday, July 17, 2023 7:19 AM
> > > To: Roger Sayle
> > > Cc: gcc-
> -Original Message-
> From: Richard Biener
> Sent: Monday, July 17, 2023 7:19 AM
> To: Roger Sayle
> Cc: gcc-patches@gcc.gnu.org; Tamar Christina
> Subject: Re: [PATCH] Fix bootstrap failure (with g++ 4.8.5) in
> tree-if-conv.cc.
>
> On Fri, Jul 14, 2023 at 8:56 PM Roger Sayle
>
> -Original Message-
> From: Richard Biener
> Sent: Thursday, July 13, 2023 6:31 PM
> To: Tamar Christina
> Cc: gcc-patches@gcc.gnu.org; nd ; j...@ventanamicro.com
> Subject: Re: [PATCH 12/19]middle-end: implement loop peeling and IV
> updates for early break.
>
> On Wed, 28 Jun 2023,
> -Original Message-
> From: Richard Biener
> Sent: Thursday, July 13, 2023 12:49 PM
> To: Tamar Christina
> Cc: gcc-patches@gcc.gnu.org; nd ; j...@ventanamicro.com
> Subject: Re: [PATCH 8/19]middle-end: updated niters analysis to handle
> multiple exits.
>
> On Wed, 28 Jun 2023, Tamar
> e7ac2b5f3db55de3dbbab7bd2bfe08388f4ec533..cab82d7960e5be517bba2
> 621f7f4
> > 888e7bf3c295 100644
> > --- a/gcc/cfgloop.h
> > +++ b/gcc/cfgloop.h
> > @@ -272,6 +272,14 @@ public:
> > the basic-block from being collected but its index can still be
> > reused. */
> >basic_block
> > - *type_out = STMT_VINFO_VECTYPE (stmt_info);
> > + if (cond_cst)
> > +{
> > + append_pattern_def_seq (vinfo, stmt_info, pattern_stmt, vectype);
> > + pattern_stmt
> > + = gimple_build_cond (gimple_cond_code (cond_stmt),
> > +gimple_get_lhs
Hi Both,
Thanks for all the reviews/patches so far
> >
> > Looks good, but I wonder what we can do to at least make the multiple
> > exit case behave reasonably? The vectorizer keeps track
>
> > of a "canonical" exit, would it be possible to pass in the main exit
> > edge and use that
Hi All,
This patch builds on the previous patch by fixing another issue with the
way ifcvt currently picks which branches to test.
The issue with the current implementation is while it sorts for
occurrences of the argument, it doesn't check for complexity of the arguments.
As an example:
Hi All,
Following on from Jakub's patch in g:de0ee9d14165eebb3d31c84e98260c05c3b33acb
these two patches finishes the work fixing the regression and improves codegen.
As explained in that commit, ifconvert sorts PHI args in increasing number of
occurrences in order to reduce the number of
> On Wed, 28 Jun 2023, Tamar Christina wrote:
>
> > Hi All,
> >
> > expand_vector_piecewise does not support VLA expansion as it has a
> > hard assert on the type not being VLA.
> >
> > Instead of just failing to expand and so the call marked unsupported we ICE.
> > This adjust it so we don't and
Hi Jason,
Thanks for the review. I only now realized I should have split them between C
and C++.
Will do so on the respins.
>
> On 6/28/23 09:41, Tamar Christina wrote:
> > Hi All,
> >
> > FORTRAN currently has a pragma NOVECTOR for indicating that
> > vectorization should not be applied to a
s.
>
>
> juzhe.zh...@rivai.ai
>
> From: Li, Pan2
> Date: 2023-06-28 22:21
> To: juzhe.zh...@rivai.ai
> Subject: FW: [PATCH v5 0/19] Support early break/return auto-vectorization
> FYI.
>
> -Original Message-
> From: Gcc-patches
> On Behalf
Adding proper maintainers.
> -Original Message-
> From: Tamar Christina
> Sent: Wednesday, June 28, 2023 2:46 PM
> To: gcc-patches@gcc.gnu.org
> Cc: nd ; Richard Earnshaw ;
> Marcus Shawcroft ; Kyrylo Tkachov
> ; Richard Sandiford
>
> Subject: [PATCH 9/19]AArch64 middle-end: refactor
Resending attached only due to size limit
> -Original Message-
> From: Tamar Christina
> Sent: Wednesday, June 28, 2023 2:42 PM
> To: gcc-patches@gcc.gnu.org
> Cc: nd ; rguent...@suse.de; j...@ventanamicro.com
> Subject: [PATCH 3/19]middle-end clean up vect testsuite using pragma
>
Hi All,
Advanced SIMD lacks a cmpeq for vectors, and unlike compare to 0 we can't
rewrite to a cmtst.
This operation is however fairly common, especially now that we support early
break vectorization.
As such this adds a pattern to recognize the negated any comparison and
transform it to an
Hi All,
This adds an implementation for conditional branch optab for AArch64.
For e.g.
void f1 ()
{
for (int i = 0; i < N; i++)
{
b[i] += a[i];
if (a[i] > 0)
break;
}
}
For 128-bit vectors we generate:
cmgtv1.4s, v1.4s, #0
umaxp v1.4s,
Hi All,
This adds an implementation for conditional branch optab for AArch32.
For e.g.
void f1 ()
{
for (int i = 0; i < N; i++)
{
b[i] += a[i];
if (a[i] > 0)
break;
}
}
For 128-bit vectors we generate:
vcgt.s32q8, q9, #0
vpmax.u32
Hi All,
This adds an implementation for conditional branch optab for MVE.
Unfortunately MVE has rather limited operations on VPT.P0, we are missing the
ability to do P0 comparisons and logical OR on P0.
For that reason we can only support cbranch with 0, as for comparing to a 0
predicate we
Hi All,
Advanced SIMD lacks flag setting vector comparisons which SVE adds. Since
machines
with SVE also support Advanced SIMD we can use the SVE comparisons to perform
the
operation in cases where SVE codegen is allowed, but the vectorizer has decided
to generate Advanced SIMD because of loop
Hi All,
I didn't want these to get lost in the noise of updates.
The following three tests now correctly work for targets that have an
implementation of cbranch for vectors so XFAILs are conditionally removed gated
on vect_early_break support.
Bootstrapped Regtested on aarch64-none-linux-gnu
Hi All,
This patch updates the peeling code to maintain LCSSA during peeling.
The rewrite also naturally takes into account multiple exits and so it didn't
make sense to split them off.
For the purposes of peeling the only change for multiple exits is that the
secondary exits are all wired to
Hi All,
This implements vectorable_early_exit which is used as the codegen part of
vectorizing a gcond.
For the most part it shares the majority of the code with
vectorizable_comparison with addition that it needs to be able to reduce
multiple resulting statements into a single one for use in
Hi All,
When performing early break vectorization we need to be sure that the vector
operations are safe to perform. A simple example is e.g.
for (int i = 0; i < N; i++)
{
vect_b[i] = x + i;
if (vect_a[i]*2 != x)
break;
vect_a[i] = x;
}
where the store to vect_b is not allowed
Hi All,
Vectorization of a gcond starts off essentially the same as vectorizing a
comparison witht he only difference being how the operands are extracted.
This refactors vectorable_comparison such that we now have a generic function
that can be used from vectorizable_early_break. The
Hi All,
For early break vectorization we have to update niters analysis to record and
analyze all exits of the loop, and so all conds.
The niters of the loop is still determined by the main/natural exit of the loop
as this is the O(n) bounds. For now we don't do much with the secondary conds,
Hi All,
This patch splits off the vectorizer's understanding of the main loop exit off
from the normal loop infrastructure.
Essentially we're relaxing the use of single_exit() in the vectorizer as we will
no longer have a single single and need a well defined split between the main
and secondary
Hi All,
expand_vector_piecewise does not support VLA expansion as it has a hard assert
on the type not being VLA.
Instead of just failing to expand and so the call marked unsupported we ICE.
This adjust it so we don't and can gracefully handle the expansion in support
checks.
Bootstrapped
Hi All,
The bitfield vectorization support does not currently recognize bitfields inside
gconds. This means they can't be used as conditions for early break
vectorization which is a functionality we require.
This adds support for them by explicitly matching and handling gcond as a
source.
Hi All,
There's an existing bug in loop frequency scaling where the if statement checks
to see if there's a single exit, and records an dump file note but then
continues.
It then tries to access the null pointer, which of course fails.
For multiple loop exists it's not really clear how to scale
Hi All,
FORTRAN currently has a pragma NOVECTOR for indicating that vectorization should
not be applied to a particular loop.
ICC/ICX also has such a pragma for C and C++ called #pragma novector.
As part of this patch series I need a way to easily turn off vectorization of
particular loops,
Hi,
With the patch enabling the vectorization of early-breaks, we'd like to allow
bitfield lowering in such loops, which requires the relaxation of allowing
multiple exits when doing so. In order to avoid a similar issue to PR107275,
the code that rejects loops with certain types of gimple_stmts
Hi All,
This patch adds initial support for early break vectorization in GCC.
The support is added for any target that implements a vector cbranch optab,
this includes both fully masked and non-masked targets.
Depending on the operation, the vectorizer may also require support for boolean
mask
Hi All,
It seems like @blackslashchar{} is a relatively new addition
to texinfo. Other parts of the docs use @samp{\} so use it
here too so older distros work.
Bootstrapped on aarch64-none-linux-gnu and no issues.
committed under obvious rule.
Thanks,
Tamar
gcc/ChangeLog:
PR
Hi All,
define_cond_exec does not support the special @@ syntax
and so can't support {@. As such just remove support
for it.
Bootstrapped and no issues.
Ok for master?
Thanks,
Tamar
gcc/ChangeLog:
PR bootstrap/110324
* gensupport.cc (convert_syntax): Explicitly check for RTX
Hi All,
I accidentally left a test comment in the final version of the patch.
This removes the comment.
Regtested on aarch64-none-linux-gnu and no issues.
Committed under the obvious rule.
Thanks,
Tamar
gcc/ChangeLog:
* config/aarch64/aarch64.md (*mov_aarch64): Drop test comment.
> -Original Message-
> From: Jeff Law
> Sent: Tuesday, June 20, 2023 3:17 AM
> To: Andrew Pinski ; Thiago Jung Bauermann
>
> Cc: Manolis Tsamis ; Philipp Tomsich
> ; Richard Biener ;
> Palmer Dabbelt ; Kito Cheng ;
> gcc-patches@gcc.gnu.org; Tamar Christina
> Subject: Re: [PATCH 2/2]
> -Original Message-
> From: Richard Biener
> Sent: Monday, June 19, 2023 11:19 AM
> To: Tamar Christina
> Cc: gcc-patches@gcc.gnu.org
> Subject: RE: [PATCH] Remove -save-temps from tests using -flto
>
> On Mon, 19 Jun 2023, Tamar Christina wrote:
>
> > > -Original Message-
> >
> -Original Message-
> From: Richard Biener
> Sent: Monday, June 19, 2023 7:28 AM
> To: gcc-patches@gcc.gnu.org
> Cc: Tamar Christina
> Subject: [PATCH] Remove -save-temps from tests using -flto
>
> The following removes -save-temps that doesn't seem to have any good
> reason from tests
Hi All,
Updated patch with feedback addressed.
Bootstrapped Regtested on aarch64-none-linux-gnu and no issues.
Any feedback?
Thanks,
Tamar
gcc/ChangeLog:
* gensupport.cc (class conlist, add_constraints, add_attributes,
skip_spaces, expect_char, preprocess_compact_syntax,
Hi All,
As Jakub pointed out, DEFAULT_MATCHPD_PARTITIONS
is now unused and can be removed.
Bootstrapped aarch64-none-linux-gnu and no issues.
Ok for master?
Thanks,
Tamar
gcc/ChangeLog:
* config.in: Regenerate.
* configure: Regenerate.
* configure.ac: Remove
>
> Do you use the DEFAULT_MATCHPD_PARTITIONS macro anywhere?
> If not, why the AC_DEFINE_UNQUOTED at all and not just the AC_SUBST?
>
It used to be used to change the default of genmatch.cc, but the default is now
not to split anymore. So guess I can remove it.
Will follow up...
Hi All,
Looks like I forgot to regenerate config.in which
causes updates when you enable maintainer mode.
Bootstrapped aarch64-none-linux-gnu.
Committed under obvious rule.
Thanks,
Tamar
gcc/ChangeLog:
* config.in: Regenerate.
--- inline copy of patch --
diff --git a/gcc/config.in
Hi Coudert,
Sorry, missed that one.
I'll fix that.
Tamar.
> -Original Message-
> From: FX Coudert
> Sent: Saturday, June 10, 2023 9:21 PM
> To: Tamar Christina
> Cc: g...@gcc.gnu.org; Jeff Law ; gcc-
> patc...@gcc.gnu.org
> Subject: gcc/config.in was not regenerated
>
> Hi,
>
>
Hi All,
This converts some patterns in the AArch64 backend to use the new
compact syntax.
Bootstrapped Regtested on aarch64-none-linux-gnu and no issues.
Ok for master?
gcc/ChangeLog:
* config/aarch64/aarch64.md (arches): Add nosimd.
(*mov_aarch64, *movsi_aarch64,
Hi,
New version of the patch, I've omitted the explanation again
Bootstrapped Regtested on aarch64-none-linux-gnu and no issues.
Any feedback?
Thanks,
Tamar
gcc/ChangeLog:
* gensupport.cc (class conlist, add_constraints, add_attributes,
create_missing_attributes,
Hi,
Thanks for the review, just some quick responses before I make the changes:
> >int operand_number; /* Operand index in the big array. */
> >int output_format; /* INSN_OUTPUT_FORMAT_*. */
> > + bool compact_syntax_p;
> >struct operand_data
Hi All,
This patch adds support for a compact syntax for specifying constraints in
instruction patterns. Credit for the idea goes to Richard Earnshaw.
With this new syntax we want a clean break from the current limitations to make
something that is hopefully easier to use and maintain.
The idea
Hi,
Yes I hope to upstream it this year. I'm busy cleaning up a new version of the
patch which and hope to send it up for review again next week if all tests pass.
Cheers,
Tamar
From: juzhe.zh...@rivai.ai
Sent: Monday, May 15, 2023 6:20 AM
To: gcc-patches
Cc: rguenther ; Tamar Christina ;
> -Original Message-
> From: Alexander Monakov
> Sent: Friday, May 5, 2023 7:22 PM
> To: Tamar Christina
> Cc: Richard Biener ; gcc-patches@gcc.gnu.org
> Subject: RE: [PATCH] Makefile.in: clean up match.pd-related dependencies
>
>
> On Fri, 5 May 2023, Tamar Christina wrote:
>
> > >
> -Original Message-
> From: Alexander Monakov
> Sent: Friday, May 5, 2023 6:59 PM
> To: Tamar Christina
> Cc: Richard Biener ; gcc-patches@gcc.gnu.org
> Subject: RE: [PATCH] Makefile.in: clean up match.pd-related dependencies
>
>
> On Fri, 5 May 2023, Tamar Christina wrote:
>
> > > >
> > Am 05.05.2023 um 19:03 schrieb Alexander Monakov via Gcc-patches patc...@gcc.gnu.org>:
> >
> > Clean up confusing changes from the recent refactoring for parallel
> > match.pd build.
> >
> > gimple-match-head.o is not built. Remove related flags adjustment.
> >
> > Autogenerated
> -Original Message-
> From: Jakub Jelinek
> Sent: Friday, May 5, 2023 4:33 PM
> To: Tamar Christina
> Cc: Jeff Law ; David Edelsohn ;
> GCC Patches
> Subject: Re: [PATCH 5/5] match.pd: Use splits in makefile and make
> configurable.
>
> On Fri, May 05, 2023 at 03:22:11PM +, Tamar
> -Original Message-
> From: Jakub Jelinek
> Sent: Friday, May 5, 2023 4:18 PM
> To: Jeff Law
> Cc: David Edelsohn ; Tamar Christina
> ; GCC Patches
> Subject: Re: [PATCH 5/5] match.pd: Use splits in makefile and make
> configurable.
>
> On Fri, May 05, 2023 at 09:04:16AM -0600, Jeff
> -Original Message-
> From: Jeff Law
> Sent: Friday, May 5, 2023 4:04 PM
> To: David Edelsohn ; Tamar Christina
>
> Cc: GCC Patches
> Subject: Re: [PATCH 5/5] match.pd: Use splits in makefile and make
> configurable.
>
>
>
> On 5/5/23 08:59, David Edelsohn via Gcc-patches wrote:
> >
> This looks pretty reasonable to me. Are there any patches left in
> this series that need review? I'm very much looking forward to
> build time provements related to this patch, particularly for
> targets that I bootstrap with qemu emulation -- we take multiple
> hours
/5] match.pd: Use splits in makefile and make
> configurable.
>
>
>
> > -Original Message-
> > From: Gcc-patches > bounces+kyrylo.tkachov=arm....@gcc.gnu.org> On Behalf Of Tamar
> > Christina via Gcc-patches
> > Sent: Tuesday, May 2, 2023 8:
in makefile and make
> configurable.
>
>
>
> On 4/28/23 04:44, Tamar Christina via Gcc-patches wrote:
> > Hi All,
> >
> > This updates the build system to split up match.pd files into chunks of 10.
> > This also introduces a new flag --with-matchpd-partiti
> On the check for verbose==2, should that be verbose >= 2 ?
>
That's fair enough. Made the change.
Thanks,
Tamar.
> paul
>
> > On Apr 28, 2023, at 6:38 AM, Tamar Christina via Gcc-patches patc...@gcc.gnu.org> wrote:
> >
> > Hi All,
> >
> &g
Hi All,
This updates the build system to split up match.pd files into chunks of 10.
This also introduces a new flag --with-matchpd-partitions which can be used to
change the number of partitions.
For the analysis of why 10 please look at the previous patch in the series.
Bootstrapped Regtested
> > [1] https://gcc.gnu.org/legacy-ml/gcc-patches/2018-04/msg01125.html
> >
> > Bootstrapped Regtested on aarch64-none-linux-gnu and no issues.
> >
> > Ok for master?
>
> Some comments - I have to leave the Makefile bits to somebody else to see
> whether they are portable as-is.
>
> The private
Hi All,
This is a small improvement in QoL codegen for match.pd to save time not
re-evaluating the condition for printing debug information in every function.
There is a small but consistent runtime and compile time win here. The runtime
win comes from not having to do the condition over again,
Hi All,
genmatch currently outputs commented out line directives that have no effect
but the compiler still has to parse only to discard.
They are however handy when debugging genmatch output. As such this moves them
behind the -vv flag.
Bootstrapped Regtested on aarch64-none-linux-gnu and no
t; j...@ventanamicro.com
> > > Subject: Re: [PATCH 2/3]middle-end match.pd: simplify debug dump
> > > checks
> > >
> > > On Tue, Apr 18, 2023 at 12:22?PM Tamar Christina via Gcc-patches
> > > wrote:
> > > >
> > > >
> On Tue, Apr 18, 2023 at 12:22 PM Tamar Christina via Gcc-patches patc...@gcc.gnu.org> wrote:
> >
> > Hi All,
> >
> > This is a small improvement in QoL codegen for match.pd to save time
> > not re-evaluating the condition for printing debug information in every
Thanks Evandro,
That one works. I’ll run the new cost model and sched modules through a number
of workloads and come back with the results.
Cheers,
Tamar
From: Evandro Menezes
Sent: Monday, April 24, 2023 11:52 PM
To: Evandro Menezes
Cc: Tamar Christina ; evandro+gcc-patc...@gcc.gnu.org;
Hi Evandro,
I wanted to give this patch a try, but the diff seems corrupt, the whitespaces
at the start of the context lines seem to have gone missing.
Could you try resending it?
Thanks,
Tamar
> -Original Message-
> From: Gcc-patches bounces+tamar.christina=arm@gcc.gnu.org> On
> -Original Message-
> From: Richard Sandiford
> Sent: Friday, April 21, 2023 6:19 PM
> To: Tamar Christina
> Cc: gcc-patches@gcc.gnu.org; nd ; Richard Earnshaw
>
> Subject: Re: [PATCH] RFC: New compact syntax for insn and insn_split in
> Machine Descriptions
>
> Tamar Christina
> On Tue, Apr 18, 2023 at 12:22 PM Tamar Christina via Gcc-patches patc...@gcc.gnu.org> wrote:
> >
> > Hi All,
> >
> > This is a small improvement in QoL codegen for match.pd to save time
> > not re-evaluating the condition for printing debug information in every
d
>
> On Tue, Apr 18, 2023 at 12:21 PM Tamar Christina via Gcc-patches patc...@gcc.gnu.org> wrote:
> >
> > Hi All,
> >
> > This is a small QoL codegen improvement for match.pd to not emit
> > labels when they are not needed. The codegen is nice and there
Hi All,
This patch adds support for a compact syntax for specifying constraints in
instruction patterns. Credit for the idea goes to Richard Earnshaw.
I am sending up this RFC to get feedback for it's inclusion in GCC 14.
With this new syntax we want a clean break from the current limitations to
Hi All,
This is a small improvement in QoL codegen for match.pd to save time not
re-evaluating the condition for printing debug information in every function.
There is a small but consistent runtime and compile time win here. The runtime
win comes from not having to do the condition over again,
Hi All,
Just sending these so people can test the series
This is a small improvement in QoL codegen for match.pd to save time not
re-evaluating the condition for printing debug information in every function.
There is a small but consistent runtime and compile time win here. The runtime
win
Hi All,
Just sending these so people can test the series.
This is a small QoL codegen improvement for match.pd to not emit labels when
they are not needed. The codegen is nice and there is a small (but consistent)
improvement in compile time.
Bootstrapped Regtested on aarch64-none-linux-gnu
Hi All,
I previously made the test generic, but there's no list
of targets that support integer MLA, and so it's not
really feasible for me to make this generic.
As such I've moved it to be AArch64 only.
committed under the obvious rule.
Thanks,
Tamar
gcc/testsuite/ChangeLog:
PR
> >> As Andrew has been advising on this one, I'd prefer for him to review it.
> >> However, he's on vacation this week. FYI...
> >>
> >> Aldy
> >>
> >> On Mon, Mar 6, 2023 at 12:22 PM Tamar Christina
> >> wrote:
> >>> Ping.
> >>>
> >>> And updated the patch to reject cases that we don't expect
Hi,
Here's the respun patch.
Bootstrapped Regtested on aarch64-none-linux-gnu and no issues.
Ok for master?
Thanks,
Tamar
gcc/ChangeLog:
PR target/108583
* target.def (preferred_div_as_shifts_over_mult): New.
* doc/tm.texi.in: Document it.
* doc/tm.texi:
Cheers,
Thanks! I'll way for him to come back then
Thanks,
Tamar
> -Original Message-
> From: Aldy Hernandez
> Sent: Wednesday, March 8, 2023 8:57 AM
> To: Tamar Christina
> Cc: gcc-patches@gcc.gnu.org; nd ; amacl...@redhat.com
> Subject: Re: [PATCH 2/4][ranger]: Add range-ops for
Hi All,
The testcase
typedef unsigned int vec __attribute__((vector_size(32)));
vec
f3 (vec a, vec b, vec c)
{
vec d = a * b;
return d + ((c + d) >> 1);
}
shows a case where we don't want to form an FMA due to the MUL not being single
use. In this case to form an FMA we have to redo the
> -Original Message-
> From: Richard Sandiford
> Sent: Wednesday, March 8, 2023 9:18 AM
> To: Tamar Christina
> Cc: gcc-patches@gcc.gnu.org; nd ; Richard Earnshaw
> ; Marcus Shawcroft
> ; Kyrylo Tkachov
> Subject: Re: [PATCH 4/4]AArch64 Update div-bitmask to implement new
> optab
Hi All,
When doing an emergency dump the cfg output dumps are corrupted because the
ending "}" is missing.
Normally when the pass manager finishes it would call finish_graph_dump_file to
produce this. This is called here because each pass can dump multiple digraphs.
However during an emergency
> Hi!
>
> On Sun, Mar 05, 2023 at 03:33:40PM -0600, Segher Boessenkool wrote:
> > On Sun, Mar 05, 2023 at 08:43:20PM +, Tamar Christina wrote:
> > Yes, *look* better: I have seen no proof or indication that this would
>
> ("looks", I cannot type, sorry)
>
> > actually generate better code,
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