Sure thing, see below PR.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115013
Pan
From: Vladimir Makarov
Sent: Thursday, May 9, 2024 8:21 PM
To: Li, Pan2 ; gcc-patches@gcc.gnu.org
Subject: Re: [pushed][PR114810][LRA]: Recognize alternatives with lack of
available registers for insn and demote
On 5/8/24 23:25, Li, Pan2 wrote:
Hi Vladimir,
Looks this patch results in some ICE in the rvv.exp of RISC-V backend,
feel free to ping me if more information is needed for reproducing.
= Summary of gcc testsuite =
| # of unexpected case / # of unique unexpected case
|gcc |
CC more RISC-V port people for awareness.
Pan
From: Li, Pan2
Sent: Thursday, May 9, 2024 11:25 AM
To: Vladimir Makarov ; gcc-patches@gcc.gnu.org
Subject: RE: [pushed][PR114810][LRA]: Recognize alternatives with lack of
available registers for insn and demote them.
Hi Vladimir,
Looks this
Hi Vladimir,
Looks this patch results in some ICE in the rvv.exp of RISC-V backend, feel
free to ping me if more information is needed for reproducing.
= Summary of gcc testsuite =
| # of unexpected case / # of unique unexpected case
