Re: [PATCH, i386, middle-end, tessuite] Intel TSX's HLE.

2012-05-02 Thread Kirill Yukhin
Otherwise, this looks good. Thanks, I've applied inputs! Comitted to MT: http://gcc.gnu.org/ml/gcc-cvs/2012-05/msg00047.html Thanks, K

Re: [PATCH, i386, middle-end, tessuite] Intel TSX's HLE.

2012-05-02 Thread H.J. Lu
On Wed, May 2, 2012 at 8:37 AM, Kirill Yukhin kirill.yuk...@gmail.com wrote: Otherwise, this looks good. Thanks, I've applied inputs! Comitted to MT: http://gcc.gnu.org/ml/gcc-cvs/2012-05/msg00047.html It caused: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53194 -- H.J.

Re: [PATCH, i386, middle-end, tessuite] Intel TSX's HLE.

2012-04-27 Thread Kirill Yukhin
Hello guys, After conversation in IRC with Richard, I've slightly updated the patch. 1. According to Richards suggestion I moved PTA_HLE to `generic` march. 2. Applied and updated Andi's patch (see [1]). 3. Updated tests to use proper memory model combintations 4. Added 1-sentense description to

Re: [PATCH, i386, middle-end, tessuite] Intel TSX's HLE.

2012-04-27 Thread Richard Henderson
On 04/27/12 05:49, Kirill Yukhin wrote: + if (targetm.memmodel_check) +val = targetm.memmodel_check (val); + else if (val ~MEMMODEL_MASK) + +{ Incorrect vertical whitespace. + if ( (failure MEMMODEL_MASK) == MEMMODEL_RELEASE + || (failure MEMMODEL_MASK) ==

Re: [PATCH, i386, middle-end, tessuite] Intel TSX's HLE.

2012-04-23 Thread Kirill Yukhin
Otherwise, OK as far as x86 is concerned, but you will need separate approval for middle-end part. Hi guys, this is a ping Could anybody from middle-end please have a look? Thanks, K

Re: [PATCH, i386, middle-end, tessuite] Intel TSX's HLE.

2012-04-20 Thread Kirill Yukhin
Thanks! K On Thu, Apr 19, 2012 at 9:18 PM, Uros Bizjak ubiz...@gmail.com wrote: On Thu, Apr 19, 2012 at 5:21 PM, Kirill Yukhin kirill.yuk...@gmail.com wrote: Folks, Thanks a lot for prompts! I've updated my patch, so cmparing to previous it is:  - have dedicated hook var, to define target

Re: [PATCH, i386, middle-end, tessuite] Intel TSX's HLE.

2012-04-20 Thread Kirill Yukhin
My only other comment is that I think the MEMMODEL_MASK ought to be defined globally where the MEMMODEL enum is defined instead of defining it everywhere it is needed. Agree. Done (along with Uros's input). New define added to gcc/coretypes.h Updated patch attached. updated ChangeLog entry:

Re: [PATCH, i386, middle-end, tessuite] Intel TSX's HLE.

2012-04-19 Thread Kirill Yukhin
Folks, Thanks a lot for prompts! I've updated my patch, so cmparing to previous it is: - have dedicated hook var, to define target dep. bits in mem model. Check (and warning) is performed in get_memmodel - prefix emit performed through dedicated operand type (%K) Updated ChangeLog entry:

Re: [PATCH, i386, middle-end, tessuite] Intel TSX's HLE.

2012-04-19 Thread Andrew MacLeod
On 04/19/2012 11:21 AM, Kirill Yukhin wrote: +++ b/gcc/builtins.c @@ -5338,6 +5338,7 @@ static enum memmodel get_memmodel (tree exp) { rtx op; + unsigned memmodel_mask = (116) - 1; ... @@ -5398,11 +5409,14 @@ expand_builtin_atomic_compare_exchange (enum machine_mode mode, tree exp,

Re: [PATCH, i386, middle-end, tessuite] Intel TSX's HLE.

2012-04-19 Thread Uros Bizjak
On Thu, Apr 19, 2012 at 5:21 PM, Kirill Yukhin kirill.yuk...@gmail.com wrote: Folks, Thanks a lot for prompts! I've updated my patch, so cmparing to previous it is:  - have dedicated hook var, to define target dep. bits in mem model. Check (and warning) is performed in get_memmodel   -

Re: [PATCH, i386, middle-end, tessuite] Intel TSX's HLE.

2012-04-18 Thread Kirill Yukhin
Forgot to attach the patch :) On Wed, Apr 18, 2012 at 1:34 PM, Kirill Yukhin kirill.yuk...@gmail.com wrote: Hello guys, Since there is no more objections to my RFC, started here [1], I've implemented rest __atomic builtins in the same way. It corresponds to Spec, which can be found here [2].

Re: [PATCH, i386, middle-end, tessuite] Intel TSX's HLE.

2012-04-18 Thread Rainer Orth
Kirill Yukhin kirill.yuk...@gmail.com writes: Forgot to attach the patch :) Just a nit: you're using `prefixies' throughout the patch. I guess this should be `prefixes' instead. Rainer -- - Rainer Orth,

Re: [PATCH, i386, middle-end, tessuite] Intel TSX's HLE.

2012-04-18 Thread Kirill Yukhin
Whoops, thank you. I'll fix it K On Wed, Apr 18, 2012 at 1:44 PM, Rainer Orth r...@cebitec.uni-bielefeld.de wrote: Kirill Yukhin kirill.yuk...@gmail.com writes: Forgot to attach the patch :) Just a nit: you're using `prefixies' throughout the patch.  I guess this should be `prefixes'

Re: [PATCH, i386, middle-end, tessuite] Intel TSX's HLE.

2012-04-18 Thread Uros Bizjak
On Wed, Apr 18, 2012 at 11:34 AM, Kirill Yukhin kirill.yuk...@gmail.com wrote: Hello guys, Since there is no more objections to my RFC, started here [1], I've implemented rest __atomic builtins in the same way. It corresponds to Spec, which can be found here [2]. Can you please implement

Re: [PATCH, i386, middle-end, tessuite] Intel TSX's HLE.

2012-04-18 Thread Andrew MacLeod
Stupid mailer.. sigh. trying again: On 04/18/2012 05:36 AM, Kirill Yukhin wrote: op = expand_normal (exp); - if (INTVAL (op) 0 || INTVAL (op) = MEMMODEL_LAST) + if (INTVAL (op) 0) { warning (OPT_Winvalid_memory_model, invalid memory model argument to builtin);

Re: [PATCH, i386, middle-end, tessuite] Intel TSX's HLE.

2012-04-18 Thread Kirill Yukhin
Sure, thanks for prompt! On Wed, Apr 18, 2012 at 2:12 PM, Uros Bizjak ubiz...@gmail.com wrote: On Wed, Apr 18, 2012 at 11:34 AM, Kirill Yukhin kirill.yuk...@gmail.com wrote: Hello guys, Since there is no more objections to my RFC, started here [1], I've implemented rest __atomic builtins in

Re: [PATCH, i386, middle-end, tessuite] Intel TSX's HLE.

2012-04-18 Thread Jakub Jelinek
On Wed, Apr 18, 2012 at 06:16:02PM +0400, Kirill Yukhin wrote: In any case, I think it ought to check that the 16 reserved bits for memory model is correct (like it use to for the whole enum), and if it isn't, issue the warning and mask in SEQ_CST for the memory model portion. Good point.