On 02 Dec 12:21, Uros Bizjak wrote:
On Tue, Dec 2, 2014 at 12:08 PM, Ilya Enkovich enkovich@gmail.com wrote:
Having stage1 close to end, may we make some decision regarding this
patch? Having a couple of working variants, may we choose and use one
of them?
I propose to wait for
On 05 Nov 11:00, Uros Bizjak wrote:
On Wed, Nov 5, 2014 at 10:35 AM, Ilya Enkovich enkovich@gmail.com wrote:
Hi,
Having stage1 close to end, may we make some decision regarding this
patch? Having a couple of working variants, may we choose and use one
of them?
I propose to wait
On Tue, Dec 2, 2014 at 12:08 PM, Ilya Enkovich enkovich@gmail.com wrote:
Having stage1 close to end, may we make some decision regarding this
patch? Having a couple of working variants, may we choose and use one
of them?
I propose to wait for Vlad for an update about his plans on
Hi,
Having stage1 close to end, may we make some decision regarding this
patch? Having a couple of working variants, may we choose and use one
of them?
Thanks,
Ilya
2014-07-15 17:38 GMT+04:00 Uros Bizjak ubiz...@gmail.com:
On Tue, Jul 15, 2014 at 1:01 PM, Ilya Enkovich enkovich@gmail.com
On Wed, Nov 5, 2014 at 10:35 AM, Ilya Enkovich enkovich@gmail.com wrote:
Hi,
Having stage1 close to end, may we make some decision regarding this
patch? Having a couple of working variants, may we choose and use one
of them?
I propose to wait for Vlad for an update about his plans on
2014-07-14 23:58 GMT+04:00 Uros Bizjak ubiz...@gmail.com:
On Thu, Jul 3, 2014 at 3:38 PM, Ilya Enkovich enkovich@gmail.com wrote:
2014-07-03 16:07 GMT+04:00 Uros Bizjak ubiz...@gmail.com:
On Thu, Jul 3, 2014 at 1:50 PM, Ilya Enkovich enkovich@gmail.com
wrote:
I didn't find a nice
On Tue, Jul 15, 2014 at 10:25 AM, Ilya Enkovich enkovich@gmail.com wrote:
Also fully restrict xmm8-15 does not seem right. It is just costly
but not fully disallowed.
As said earlier, you can try Ya*x as a constraint.
I tried it. It does not seem to affect allocation much. I do not see
On 15 Jul 10:42, Uros Bizjak wrote:
On Tue, Jul 15, 2014 at 10:25 AM, Ilya Enkovich enkovich@gmail.com
wrote:
Also fully restrict xmm8-15 does not seem right. It is just costly
but not fully disallowed.
As said earlier, you can try Ya*x as a constraint.
I tried it. It does
On Tue, Jul 15, 2014 at 1:01 PM, Ilya Enkovich enkovich@gmail.com wrote:
On 15 Jul 10:42, Uros Bizjak wrote:
On Tue, Jul 15, 2014 at 10:25 AM, Ilya Enkovich enkovich@gmail.com
wrote:
Also fully restrict xmm8-15 does not seem right. It is just costly
but not fully disallowed.
Ping
2014-07-03 17:38 GMT+04:00 Ilya Enkovich enkovich@gmail.com:
2014-07-03 16:07 GMT+04:00 Uros Bizjak ubiz...@gmail.com:
On Thu, Jul 3, 2014 at 1:50 PM, Ilya Enkovich enkovich@gmail.com wrote:
I didn't find a nice way to fix peephole2 patterns to take register
constraints into
On Thu, Jul 3, 2014 at 3:38 PM, Ilya Enkovich enkovich@gmail.com wrote:
2014-07-03 16:07 GMT+04:00 Uros Bizjak ubiz...@gmail.com:
On Thu, Jul 3, 2014 at 1:50 PM, Ilya Enkovich enkovich@gmail.com wrote:
I didn't find a nice way to fix peephole2 patterns to take register
constraints
2014-07-02 21:03 GMT+04:00 Uros Bizjak ubiz...@gmail.com:
Hello!
Silvermont processors have penalty for instructions having 4+ bytes of
prefixes (including escape
bytes in opcode). This situation happens when REX prefix is used in SSE4
instructions. This
patch tries to avoid such
2014-07-02 20:21 GMT+04:00 Andi Kleen a...@firstfloor.org:
Ilya Enkovich enkovich@gmail.com writes:
Silvermont processors have penalty for instructions having 4+ bytes of
prefixes (including escape bytes in opcode). This situation happens
when REX prefix is used in SSE4 instructions.
2014-07-02 20:27 GMT+04:00 Jakub Jelinek ja...@redhat.com:
On Wed, Jul 02, 2014 at 09:21:25AM -0700, Andi Kleen wrote:
Ilya Enkovich enkovich@gmail.com writes:
Silvermont processors have penalty for instructions having 4+ bytes of
prefixes (including escape bytes in opcode). This
On Thu, Jul 03, 2014 at 02:49:10PM +0400, Ilya Enkovich wrote:
2014-07-02 20:21 GMT+04:00 Andi Kleen a...@firstfloor.org:
Ilya Enkovich enkovich@gmail.com writes:
Silvermont processors have penalty for instructions having 4+ bytes of
prefixes (including escape bytes in opcode). This
2014-07-03 14:56 GMT+04:00 Jakub Jelinek ja...@redhat.com:
On Thu, Jul 03, 2014 at 02:49:10PM +0400, Ilya Enkovich wrote:
2014-07-02 20:21 GMT+04:00 Andi Kleen a...@firstfloor.org:
Ilya Enkovich enkovich@gmail.com writes:
Silvermont processors have penalty for instructions having 4+
On Thu, Jul 3, 2014 at 12:45 PM, Ilya Enkovich enkovich@gmail.com wrote:
Silvermont processors have penalty for instructions having 4+ bytes of
prefixes (including escape
bytes in opcode). This situation happens when REX prefix is used in SSE4
instructions. This
patch tries to avoid
Hello!
There is already a higher priority for registers not requiring REX.
My patch affects cases when compiler has to use xmm8-15 and it just
tries to say LRA to assign them for non SSE4 instructions. I doubt it
would have some use for other targets than Silvermont.
When it is just a
2014-07-03 15:11 GMT+04:00 Uros Bizjak ubiz...@gmail.com:
On Thu, Jul 3, 2014 at 12:45 PM, Ilya Enkovich enkovich@gmail.com wrote:
Silvermont processors have penalty for instructions having 4+ bytes of
prefixes (including escape
bytes in opcode). This situation happens when REX prefix
On Thu, Jul 3, 2014 at 1:50 PM, Ilya Enkovich enkovich@gmail.com wrote:
I didn't find a nice way to fix peephole2 patterns to take register
constraints into account. Is there any way to do it?
Use REX_SSE_REGNO_P (REGNO (operands[...])) in the insn C constraint.
Also fully restrict
2014-07-03 16:07 GMT+04:00 Uros Bizjak ubiz...@gmail.com:
On Thu, Jul 3, 2014 at 1:50 PM, Ilya Enkovich enkovich@gmail.com wrote:
I didn't find a nice way to fix peephole2 patterns to take register
constraints into account. Is there any way to do it?
Use REX_SSE_REGNO_P (REGNO
Ilya Enkovich enkovich@gmail.com writes:
Silvermont processors have penalty for instructions having 4+ bytes of
prefixes (including escape bytes in opcode). This situation happens
when REX prefix is used in SSE4 instructions. This patch tries to
avoid such situation by preferring
On Wed, Jul 02, 2014 at 09:21:25AM -0700, Andi Kleen wrote:
Ilya Enkovich enkovich@gmail.com writes:
Silvermont processors have penalty for instructions having 4+ bytes of
prefixes (including escape bytes in opcode). This situation happens
when REX prefix is used in SSE4
Hello!
Silvermont processors have penalty for instructions having 4+ bytes of
prefixes (including escape
bytes in opcode). This situation happens when REX prefix is used in SSE4
instructions. This
patch tries to avoid such situation by preferring xmm0-xmm7 usage over
xmm8-xmm15 in
On Jul 2, 2014, at 9:27 AM, Jakub Jelinek ja...@redhat.com wrote:
On Wed, Jul 02, 2014 at 09:21:25AM -0700, Andi Kleen wrote:
Ilya Enkovich enkovich@gmail.com writes:
Silvermont processors have penalty for instructions having 4+ bytes of
prefixes (including escape bytes in opcode). This
Mike Stump mikest...@comcast.net writes:
Silvermont processors have penalty for instructions having 4+ bytes of
prefixes (including escape bytes in opcode). This situation happens
when REX prefix is used in SSE4 instructions. This patch tries to
avoid such situation by preferring xmm0-xmm7
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