[SH][committed] Remove SH5/SH64 documentation

Hi, As announced here https://gcc.gnu.org/ml/gcc/2015-08/msg00101.html this patch removes some SH5/SH64 related documentation. Tested with make info dvi pdf. Committed as r227959. Cheers, Oleg gcc/ChangeLog: * doc/invoke.texi (SH Options): Undocument SH5/SH64 related options.

Re: [PR middle-end/60832] Do not convert widest_int to tree just for printing it.

On Sun, 20 Sep 2015, Manuel López-Ibáñez wrote: > In do_warn_aggressive_loop_optimizations, we convert to a tree just to print a > widest_int. Apart from overly complicated, this results in printing '3u' > instead of just '3'. > > Unfortunately, adding a printf-like conversion specifier would

[PATCH] Fix PR67651

The following fixes a very old bug in RTL nonzero_address_p which fails to consider -fno-delete-null-pointer-checks. Fixing that makes the testcase extern unsigned int _vector_table; int main(void) { unsigned int *vector_base = &_vector_table; if (vector_base == 0) { return 1; }

Re: [PATCH tree-inline] do not say "called from here" with UNKNOWN_LOCATION

On Fri, Sep 18, 2015 at 8:47 PM, Manuel López-Ibáñez wrote: > And now with the patch. > > On 18 September 2015 at 20:40, Manuel López-Ibáñez > wrote: >> In https://sourceware.org/ml/libc-alpha/2014-12/msg00300.html, we give a >> "called from here"

Re: [v3 patch] refactoring - pull out common data members as _Context

Hi, As the changes grow (https://github.com/innocentim/gcc/commits/master), it's getting harder to rebase them onto svn trunk. Can we start slowly reviewing and checking these in? Should I post them one by one to the lis? These patches typically break one giant piece of code (mainly

[PATCH] [ARM] Replacing variable swaps that use a temporary variable with a call to std::swap in gcc/config/arm/arm.c

Replacing variable swaps that use a temporary variable with a call to std::swap. Tested against arm-none-eabi target including a variant with neon enabled. 2015-XX-XX Bilyan Borisov * config/arm/arm.c (thumb_output_move_mem_multiple): Replaced

Re: [ARM] Fix PR middle-end/65958

> On targets using thumb1, I can see: > - the new test failing (you should probably add a dg-skip or an > effective-target directive) OK, I have added: /* { dg-skip-if "" { arm_thumb1 } } */ as in the ivopts-orig_biv-inc.c test. > - gcc.dg/pr48134.c now fails, saying: > sorry, unimplemented:

Re: [PATCH] 2015-09-03 Benedikt Huber <benedikt.hu...@theobroma-systems.com> Philipp Tomsich <philipp.toms...@theobroma-systems.com>

Hi, Thanks for your work on this. There are a bunch of predominantly style nits in line below. My none nit comments on this patch are: This should be left turned off for all cores where we have not seen benchmark numbers to indicate that this optimization is a benefit, we can take patches for

Re: [PATCH tree-inline] do not say "called from here" with UNKNOWN_LOCATION

On 21 September 2015 at 12:29, Richard Biener wrote: > On Mon, Sep 21, 2015 at 11:59 AM, Manuel López-Ibáñez > wrote: >> On 21 September 2015 at 10:18, Richard Biener >> wrote: >>> input_location is set from the call

Re: [PATCH] Add new hooks ASM_OUTPUT_START_FUNCTION_HEADER ...

On Mon, Sep 21, 2015 at 12:31:58PM +0100, Dominik Vogt wrote: > This patch adds to new backend hooks > ASM_OUTPUT_START_FUNCTION_HEADER and > ASM_OUTPUT_END_FUNCTION_FOOTER that may be defined to emit > assembly code at the very start or end of a function. This > functionality is needed by the

Re: [PATCH] Fix PR66952

On 23 July 2015 at 13:17, Richard Biener wrote: > On Thu, 23 Jul 2015, Kyrill Tkachov wrote: > >> >> On 23/07/15 10:02, Andreas Schwab wrote: >> > Richard Biener writes: >> > >> > > Index: gcc/testsuite/gcc.dg/torture/pr66952.c >> > >

[PATCH, i386, AVX-512] Fix splitter for `not-xor' logic.

Hello Uroš, This simple patch fixes mode (to iterator) in splitter for `not-xor' logic. Bootstrapped & reg-tested on trunk. Is it ok for trunk? Is it ok for gcc-5-branch? (if tested accordingly) (I have no idea how to reference to define_split in ChangeLog entry) gcc/ *

Re: [PATCH][AArch64] Use preferred aliases for CSNEG, CSINC, CSINV

Hi Andrew, On 12/09/15 02:15, Andrew Pinski wrote: On Tue, Sep 1, 2015 at 6:08 PM, Kyrill Tkachov wrote: Hi all, The ARMv8-A reference manual says: "CNEG , , is equivalent to CSNEG , , , invert() and is the preferred disassembly when Rn == Rm && cond != '111x'."

[SH][committed] Adjust pr64345-1.c testcase for SH2A

Hi, There have been some changes to the generated bitfiddling code for SH2A and the test case caught them. Those changes are good, and the test case can be adjusted accordingly. Tested on sh-elf with make -k check-gcc RUNTESTFLAGS="sh.exp --target_board=sh-sim\{-m2a/-mb}" Committed as r227971.

Re: [PATCH tree-inline] do not say "called from here" with UNKNOWN_LOCATION

On 21 September 2015 at 12:29, Richard Biener wrote: >>> least note the function we are failing to inline to (thus, use >>> DECL_SOURCE_LOCATION >>> of cfun->decl). So better add a diag_location and compute that upfront to >>> avoid >>> repeating the check. >> >>

Re: [AArch64][PATCH 2/5] Make BIC, other logical instructions, available. (was: Add BIC instruction.)

On 18/09/15 09:05, James Greenhalgh wrote: On Thu, Sep 17, 2015 at 05:40:48PM +0100, Matthew Wahab wrote: Hello, ARMv8.1 adds atomic swap and atomic load-operate instructions with optional memory ordering specifiers. This patch adds an expander to generate a BIC instruction that can be

Re: [libcpp/C PATCH] Handle lines encoded into several maps in linemap_position_for_loc_and_offset

On Sun, Aug 23, 2015 at 06:07:13PM +0200, Manuel López-Ibáñez wrote: > linemap_position_for_loc_and_offset() tries to generate a location_t > encoding a column offset from the current location, for example, point > to a certain character inside a string. This is trivial to do when the > new

Re: [PATCH] New attribute to create target clones

On 08/27/2015 01:18 PM, Evgeny Stupachenko wrote: Based on RFC: https://gcc.gnu.org/ml/gcc-patches/2015-08/msg01322.html The patch implement an extension to Function Multiversioning that allows to clone a function for multiple targets. __attribute__((target_clones("avx","arch=slm","default")))

Re: [AArch64][PATCH 2/5] Make BIC, other logical instructions, available. (was: Add BIC instruction.)

On Mon, Sep 21, 2015 at 12:12:21PM +0100, Matthew Wahab wrote: > On 18/09/15 09:05, James Greenhalgh wrote: > > On Thu, Sep 17, 2015 at 05:40:48PM +0100, Matthew Wahab wrote: > >> Hello, > >> > >> ARMv8.1 adds atomic swap and atomic load-operate instructions with > >> optional memory ordering

Re: [Patch/ccmp] Cost instruction sequences to choose better expand order

On 09/18/2015 05:21 PM, Jiong Wang wrote: Current conditional compare (CCMP) support in GCC aim to optimize short circuit for cascade comparision, given a simple conditional compare candidate: if (a == 17 || a == 32) [...] The problem is current implementation always expand t0 first, then

Re: [C++] Coding rule enforcement

On Tue, Sep 15, 2015 at 3:31 PM, Jason Merrill wrote: > On 09/15/2015 01:20 PM, Manuel López-Ibáñez wrote: >> >> On 15/09/15 15:26, Richard Biener wrote: >>> >>> On Tue, Sep 15, 2015 at 3:02 PM, Nathan Sidwell wrote: Jason, somme of our customers

Re: [PATCH, ARM]: Fix static interworking call

On 21 September 2015 at 12:55, Christian Bruel wrote: > Hi Christophe, > >> It seems you committed the 1st version of your patch. > > > Not sure what version you are talking about. I committed what was posted > (https://gcc.gnu.org/ml/gcc-patches/2015-09/msg01260.html) at

Re: [AArch64][PATCH 1/5] Use atomic instructions for swap and fetch-update operations.

On 18/09/15 08:58, James Greenhalgh wrote: On Thu, Sep 17, 2015 at 05:37:55PM +0100, Matthew Wahab wrote: diff --git a/gcc/config/aarch64/atomics.md b/gcc/config/aarch64/atomics.md index 65d2cc9..0e71002 100644 --- a/gcc/config/aarch64/atomics.md +++ b/gcc/config/aarch64/atomics.md @@ -27,6

Re: [PR middle-end/60832] Do not convert widest_int to tree just for printing it.

On 21 September 2015 at 09:24, Richard Biener wrote: > On Sun, 20 Sep 2015, Manuel López-Ibáñez wrote: > >> In do_warn_aggressive_loop_optimizations, we convert to a tree just to print >> a >> widest_int. Apart from overly complicated, this results in printing '3u' >> instead

Re: [AArch64][PATCH 5/5] Use atomic load-operate instructions for update-fetch patterns.

On 17/09/15 17:54, Matthew Wahab wrote: ARMv8.1 adds atomic swap and atomic load-operate instructions with optional memory ordering specifiers. This patch uses the ARMv8.1 load-operate instructions to implement the atomic__fetch patterns. The approach is to use the atomic load-operate

Re: Fwd: [PATCH] Enable libstdc++ numeric conversions on Cygwin

On 19/09/15 15:55 -0400, Jennifer Yao wrote: Do you already have a copyright assignment for GCC? If not, would you be willing to complete one? No, but I would be willing to complete one, yes. Are you willing to send me the appropriate forms, or should I contact someone else? Great, I'll

[SH][committed] FIx PR 67657

Hi, This fixes PR 67657 on trunk. It seems that something after the peephole2 pass is not happy to see things like: mov.l @r2+,r2 which some of the SH peephole2 patterns create out of e.g. mov.l @r2+,r0 mov r0,r2 The post-inc is a bit pointless, so this patch catches such

Re: [AArch64][PATCH 4/5] Use atomic load-operate instructions for fetch-update patterns.

On 18/09/15 09:55, James Greenhalgh wrote: On Thu, Sep 17, 2015 at 05:47:43PM +0100, Matthew Wahab wrote: Hello, ARMv8.1 adds atomic swap and atomic load-operate instructions with optional memory ordering specifiers. This patch uses the ARMv8.1 atomic load-operate instructions to implement the

Re: [RFC] Try vector as a new representation for vector masks

2015-09-18 19:50 GMT+03:00 Richard Henderson : > On 09/18/2015 06:21 AM, Ilya Enkovich wrote: +machine_mode +default_get_mask_mode (unsigned nunits, unsigned vector_size) +{ + unsigned elem_size = vector_size / nunits; + machine_mode elem_mode +

Re: [PATCH c/c++] use explicit locations for some warnings in c-pragma.c

On 21 September 2015 at 06:52, Christophe Lyon wrote: > It looks like I mis-applied your patch. > I cleaned up and re-applied it, and I can confirm it fixes the problem. Committed as obvious as r227967. Thanks, Manuel.

Re: [Patch/ccmp] Cost instruction sequences to choose better expand order

Bernd Schmidt writes: > On 09/18/2015 05:21 PM, Jiong Wang wrote: >> >> Current conditional compare (CCMP) support in GCC aim to optimize >> short circuit for cascade comparision, given a simple conditional >> compare candidate: >> >>if (a == 17 || a == 32) > [...] >> The problem is current

Re: [PATCH, libgfortran] Fix FIND_FILE decls and use.

On 21 Sep 12:53, FX wrote: > Dear Kirill, > > > When libgfortran is configured w/ HAVE_WORKING_STAT undefined > > *and* current system is not MinGW - FIND_FILE_[DECL|ARGS} still > > trying to use Windows's handles (id). > > Well, if HAVE_WORKING_STAT is not defined, then it means some other

[PATCH] Fix -Wmisleading-indentation false-positive

This patch fixes the last remaining false-positive -Wmisleading-indentation warning that is emitted against the sqlite sources. The problem is the following kind of code snippet: for (i = 0; i < 10; i++ ); foo (i); which is an "interesting" coding style but it is

Re: [PATCH] Fix -Wmisleading-indentation false-positive

On 09/21/2015 01:23 PM, Patrick Palka wrote: * c-indentation.c (should_warn_for_misleading_indentation): Float out and consolidate the calls to get_visual_column that is passed guard_exploc as an argument. Compare next_stmt_vis_column with guard_line_first_nws

Re: [PATCH, i386, AVX-512] Fix splitter for `not-xor' logic.

On Mon, Sep 21, 2015 at 12:50 PM, Kirill Yukhin wrote: > Hello Uroš, > > This simple patch fixes mode (to iterator) in > splitter for `not-xor' logic. > > Bootstrapped & reg-tested on trunk. > > Is it ok for trunk? > > Is it ok for gcc-5-branch? (if tested accordingly)

[PATCH, libgfortran] Fix FIND_FILE decls and use.

Hello, When libgfortran is configured w/ HAVE_WORKING_STAT undefined *and* current system is not MinGW - FIND_FILE_[DECL|ARGS} still trying to use Windows's handles (id). Proposed patch discriminates MinGW case under HAVE_WORKING_STAT switched off. Bootstrapped (on Linux). libgfortran/

Re: [PATCH tree-inline] do not say "called from here" with UNKNOWN_LOCATION

On Mon, Sep 21, 2015 at 12:46 PM, Manuel López-Ibáñez wrote: > On 21 September 2015 at 12:29, Richard Biener > wrote: least note the function we are failing to inline to (thus, use DECL_SOURCE_LOCATION of cfun->decl). So better

Re: [AArch64][PATCH 3/5] Add atomic load-operate instructions.

On 18/09/15 09:39, James Greenhalgh wrote: On Thu, Sep 17, 2015 at 05:42:35PM +0100, Matthew Wahab wrote: --- gcc/config/aarch64/atomics.md | 41 + 1 file changed, 41 insertions(+) diff --git a/gcc/config/aarch64/atomics.md

[PATCH] Add new hooks ASM_OUTPUT_START_FUNCTION_HEADER ...

This patch adds to new backend hooks ASM_OUTPUT_START_FUNCTION_HEADER and ASM_OUTPUT_END_FUNCTION_FOOTER that may be defined to emit assembly code at the very start or end of a function. This functionality is needed by the patch that ports the "target" attribute and pragma to S/390. (I'll post

Re: [C++ PATCH] Complete the implementation of N4230, Nested namespace definition.

OK, thanks! Jason

[patch committed FT32] Fixes for hardware startup

The attached patch contains several fixes for the default hardware startup. [libgcc] 2015-09-21 James Bowman * config/ft32/crti-hw.S: Use __PMSIZE to allow configurable memory layout. Deal correctly with BSS region larger than 32K. Handle a

Re: [PATCH], PowerPC IEEE 128-bit patch #7 (revised)

A heads up. I just found some places in the IEEE 128-bit floating point code where it doesn't handle conversions to/from __ibm128. Nor does it generate the same names for -mabi=ieeelongdouble. I will submit a revised patch when it is ready. -- Michael Meissner, IBM IBM, M/S 2506R, 550 King

Re: [patch committed SH] Fix PR target/67573

> I've committed the attached patch to fix PR67573. LRA reveals > that scratch registers in *call_*pcrel should be defined as > early clobbered. The patch is tested on sh4-unkown-linux-gnu. I backported the fix for PR target/67573 to 5-branch. The trunk patch applies without problem. Tested

Re: [PATCH tree-inline] do not say "called from here" with UNKNOWN_LOCATION

On Mon, Sep 21, 2015 at 12:29:36PM +0200, Richard Biener wrote: > On Mon, Sep 21, 2015 at 11:59 AM, Manuel López-Ibáñez > wrote: > > On 21 September 2015 at 10:18, Richard Biener > > wrote: > >> input_location is set from the call stmt: > >> >

Re: (patch,rfc) s/gimple/gimple */

On Mon, Sep 21, 2015 at 08:32:36PM +0100, Richard Sandiford wrote: > Richard Biener writes: > > On Fri, Sep 18, 2015 at 3:32 PM, Trevor Saunders > > wrote: > >> On Wed, Sep 16, 2015 at 03:11:14PM -0400, David Malcolm wrote: > >>> On Wed,

Re: Openacc launch API

Jakub? https://gcc.gnu.org/ml/gcc-patches/2015-09/msg01287.html On 09/17/15 10:40, Nathan Sidwell wrote: Updated patch addressing your points. Some further comments though ... + while (GOMP_LAUNCH_PACK (GOMP_LAUNCH_END, 0, 0) + != (tag = va_arg (ap, unsigned))) That's a somewhat

[PATCH] Fix PR67664

The following avoids duplicate DW_AT_const_value attributesin the way probably intended by the early-debug merge which added the get_AT check in the first place. Bootstrapped & tested on x86_64-unknown-linux-gnu, applied. Richard. 2015-09-21 Richard Biener PR

Re: [C++] Coding rule enforcement

On 21 September 2015 at 15:46, Daniel Gutson wrote: > > FWIW, we could make this plugin in 2 weeks (w already have static > checkers as plugins for our customers). I understand Nathan that you > may have some deadlines, but if we could have the opportunity to

Re: [PATCH] shrink-wrap: Handle multiple predecessors of prologue

On Mon, Sep 21, 2015 at 01:56:28PM +0200, Bernd Schmidt wrote: > >+ basic_block new_bb = create_empty_bb (EXIT_BLOCK_PTR_FOR_FN > >(cfun)->prev_bb); > >+ BB_COPY_PARTITION (new_bb, pro); > [...] > >+ *entry_edge = make_single_succ_edge (new_bb, pro, EDGE_FALLTHRU); > >+ force_nonfallthru

[PATCH, i386, AVX-512] Fix operands in mask unpack[si|di] patterns.

Hello, This patch fixes operands in kunpck[hi|si|di] insn patterns. Bootstrapped (regtesting in progress). gcc/ * gcc/config/i386/i386.md (define_insn "kunpckhi"): Fix operand in pattern. (define_insn "kunpcksi"): Ditto. (define_insn "kunpckdi"): Ditto. Is it ok

Re: [PATCH 6/n] OpenMP 4.0 offloading infrastructure: option handling

Hi! On Sat, 11 Oct 2014 18:49:00 +0400, Ilya Verbin wrote: > This is the last common infrastructure patch in the series. > 1. -foffload== >By default, GCC will build offload images for all offload targets specified > in configure, with non-target-specific options passed

[PATCH] Fix dwarf2out ICE

When testing with -g g++.dg/ext/attr-alias-3.C ICEs because we mess up the context of class-scope vars with aliases. The following fixes this. Bootstrapped and tested on x86_64-unknown-linux-gnu, applied. Richard. 2015-09-21 Richard Biener * passes.c

[PATCH, i386] Introduce switch for Skylake Server CPU.

Hello, This patch introduces switches necessary for new Intel Server CPU (code-named Skylake). Bootstrapped & regtested. Is it ok for trunk? gcc/ * config.gcc: Support "skx". * config/i386/i386-c.c (ix86_target_macros_internal): Handle PROCESSOR_SKX. *

Re: [PATCH, i386] Introduce switch for Skylake Server CPU.

On Mon, Sep 21, 2015 at 05:14:45PM +0300, Kirill Yukhin wrote: > Hello, > This patch introduces switches necessary for new Intel Server CPU > (code-named Skylake). > > Bootstrapped & regtested. > > Is it ok for trunk? > > gcc/ > * config.gcc: Support "skx". > *

[PATCH] DWARF support for AIX v3

Appended is a patch to support DWARF on AIX and works with GDB and AIX assembler. The AIX assembler prepends the CU length to the section and does not want the compiler to provide it, so I need to disable those parts of dwarf2out.c. I know it's ugly, but, on the upside, this eventually allows

Re: [PATCH, i386] Introduce switch for Skylake Server CPU.

Hello HJ, On 21 Sep 07:40, H.J. Lu wrote: > On Mon, Sep 21, 2015 at 7:14 AM, Kirill Yukhin > wrote: > > Hello, > > This patch introduces switches necessary for new Intel Server CPU > > (code-named Skylake). > > > > Bootstrapped & regtested. > > > > Is it ok for trunk? >

Re: [PATCH] PR28901 -Wunused-variable ignores unused const initialised variables

On Fri, 2015-09-18 at 20:29 -0600, Martin Sebor wrote: > On 09/15/2015 11:20 AM, Steve Ellcey wrote: > > I guess it is not the 'const' I think should be handled special but the > > 'static'. Having unused static variables (const or not) declared in a > > header file but unused seems reasonable

[PATCH] Fix undefined behavior in h8300 backend

This was found when building all configurations using the trunk compiler. A run-of-the-mill problem with left shifting -1. To make sure I didn't muck anything up badly, I went back to Kazu's introduction of this pattern (2003), took his pseudo-code and turned it into a trivial h8300

Re: [C/C++ PATCH] RFC: Implement -Wduplicated-cond (PR c/64249) (take

On Fri, Sep 18, 2015 at 10:45:33AM -0600, Martin Sebor wrote: > >Done in the below. This version actually bootstraps, because I've added > >-Wno-duplicated-cond for insn-dfatab.o and insn-latencytab.o (don't know > >how to fix these) + I've tweaked a condition in genemit.c. The problem > >here

Re: [PATCH, i386] Introduce switch for Skylake Server CPU.

On Mon, Sep 21, 2015 at 6:57 PM, Kirill Yukhin wrote: > Hi Uroš, Jakub, > eOn 21 Sep 16:27, Jakub Jelinek wrote: >> On Mon, Sep 21, 2015 at 05:14:45PM +0300, Kirill Yukhin wrote: >> > Hello, >> > This patch introduces switches necessary for new Intel Server CPU >> >

Re: [PATCH] PR fortran/67615 -- check for scalar expression

> 2015-09-21 Steven G. Kargl > > PR fortran/67615 > * resolve.c (gfc_resolve_code): Check for scalar expression in > arithmetic-if. > > > 2015-09-21 Steven G. Kargl > > PR fortran/67615 > * gfortran.dg/pr67615.f90: new

[PATCH] PR fortran/67615 -- check for scalar expression

Patch is self-explanatory. Built and regression tested on x86_64-*-freebsd. OK to commit? 2015-09-21 Steven G. Kargl PR fortran/67615 * resolve.c (gfc_resolve_code): Check for scalar expression in arithmetic-if. 2015-09-21 Steven G. Kargl

New post-LTO OpenACC pass

Jakub, this patch adds a new transforming pass, which executes after the LTO readback pass, and hence knows whether it is targeting the host or (a) device. The contents of the pass will be built out -- it does much more on the gomp4 pass. This instance simply scans and replaces the

Re: [PATCH 6/n] OpenMP 4.0 offloading infrastructure: option handling

2015-09-21 18:15 GMT+03:00 Thomas Schwinge : > (, "--foffload* undocumented", has recently > been filed.) > > (In the following, "intelmic" is short for > "x86_64-intelmicemul-linux-gnu", and "nvptx" is short for "nvptx-none".) > > What is the

Fwd: [PATCH] Fix undefined behavior in h8300 backend

With the patch this time... Forwarded Message Subject: [PATCH] Fix undefined behavior in h8300 backend Date: Mon, 21 Sep 2015 11:10:04 -0600 From: Jeff Law To: gcc-patches@gcc.gnu.org This was found when building all configurations using the trunk compiler.

Re: [C/C++ PATCH] RFC: Implement -Wduplicated-cond (PR c/64249) (take

On Fri, Sep 18, 2015 at 08:16:52PM +0200, Manuel López-Ibáñez wrote: > On 18/09/15 18:45, Martin Sebor wrote: > >but it makes me wonder how common this pattern is in portable > >code and whether adding workarounds for it is the right solution > >(or if it might prompt people to disable the

Re: [RFC] Try vector as a new representation for vector masks

On 09/21/2015 05:08 AM, Ilya Enkovich wrote: > There is no any conversion here, maskload_optab is a convert_optab > because it uses two modes, one for value and the other one for mask. Ah, I see. In which case I think we ought to come up with a different name. C.f. get_vcond_icode. r~

Re: [PATCH, libgfortran] Fix FIND_FILE decls and use.

Dear Kirill, > When libgfortran is configured w/ HAVE_WORKING_STAT undefined > *and* current system is not MinGW - FIND_FILE_[DECL|ARGS} still > trying to use Windows's handles (id). Well, if HAVE_WORKING_STAT is not defined, then it means some other mechanism has to be used. If your target is

Re: [C++] Coding rule enforcement

On 09/21/2015 10:01 AM, Manuel López-Ibáñez wrote: On 21 September 2015 at 15:46, Daniel Gutson wrote: FWIW, we could make this plugin in 2 weeks (w already have static checkers as plugins for our customers). I understand Nathan that you may have some

Re: [C++] Coding rule enforcement

On Mon, Sep 21, 2015 at 1:23 PM, Jason Merrill wrote: > On 09/21/2015 10:01 AM, Manuel López-Ibáñez wrote: >> >> On 21 September 2015 at 15:46, Daniel Gutson >> wrote: >>> >>> >>> FWIW, we could make this plugin in 2 weeks (w already have

Re: [C++] Coding rule enforcement

On 09/21/15 12:23, Jason Merrill wrote: On 09/21/2015 10:01 AM, Manuel López-Ibáñez wrote: On 21 September 2015 at 15:46, Daniel Gutson wrote: FWIW, we could make this plugin in 2 weeks (w already have static checkers as plugins for our customers). I

Re: [PATCH, i386] Introduce switch for Skylake Server CPU.

Hi Uroš, Jakub, eOn 21 Sep 16:27, Jakub Jelinek wrote: > On Mon, Sep 21, 2015 at 05:14:45PM +0300, Kirill Yukhin wrote: > > Hello, > > This patch introduces switches necessary for new Intel Server CPU > > (code-named Skylake). > > > > Bootstrapped & regtested. > Is it a good idea to introduce

Re: [C++] Coding rule enforcement

On 09/21/2015 12:39 PM, Nathan Sidwell wrote: On 09/21/15 12:23, Jason Merrill wrote: On 09/21/2015 10:01 AM, Manuel López-Ibáñez wrote: On 21 September 2015 at 15:46, Daniel Gutson wrote: FWIW, we could make this plugin in 2 weeks (w already have

Re: [AArch64][PATCH 5/5] Use atomic load-operate instructions for update-fetch patterns.

On Mon, Sep 21, 2015 at 12:40:32PM +0100, Matthew Wahab wrote: > On 17/09/15 17:54, Matthew Wahab wrote: > > ARMv8.1 adds atomic swap and atomic load-operate instructions with > > optional memory ordering specifiers. This patch uses the ARMv8.1 > > load-operate instructions to implement the

[commit, spu] Re: [BUILDROBOT] spu: left shift of negative value

Jan-Benedict Glaw wrote: > I just noticed that (for config_list.mk builds), current GCC errors > out at spu.c, see eg. build > http://toolchain.lug-owl.de/buildbot/show_build_details.php?id=3D469639 : > > g++ -fno-PIE -c -g -O2 -DIN_GCC -DCROSS_DIRECTORY_STRUCTURE -fno-excep= > tions

Re: [PATCH, i386] Introduce switch for Skylake Server CPU.

On Mon, Sep 21, 2015 at 4:27 PM, Jakub Jelinek wrote: > On Mon, Sep 21, 2015 at 05:14:45PM +0300, Kirill Yukhin wrote: >> Hello, >> This patch introduces switches necessary for new Intel Server CPU >> (code-named Skylake). >> >> Bootstrapped & regtested. >> >> Is it ok for

Re: [Patch/ccmp] Cost instruction sequences to choose better expand order

> On Sep 21, 2015, at 4:39 AM, Bernd Schmidt wrote: > >> On 09/18/2015 05:21 PM, Jiong Wang wrote: >> >> Current conditional compare (CCMP) support in GCC aim to optimize >> short circuit for cascade comparision, given a simple conditional >> compare candidate: >> >>

Re: [AArch64][PATCH 4/5] Use atomic load-operate instructions for fetch-update patterns.

On Mon, Sep 21, 2015 at 12:31:21PM +0100, Matthew Wahab wrote: > I've also removed the CC clobber from the _lse patterns, it was overly > cautious. > > Update patch attached, Ok for trunk? > Matthew OK. Thanks, James > > gcc/ > 2015-09-21 Matthew Wahab > > *

Re: [AArch64] Fix vcvt_high_f64_f32 and vcvt_figh_f32_f64 intrinsics.

On Mon, Sep 21, 2015 at 10:44:32AM +0100, Alan Lawrence wrote: > [Resending in plain text] This makes sense to me now, although I find > your comment slightly confusing: > > [] in that > +;; the meaning of HI and LO is always taken with a little-endian view of > +;; the vector > > You mean

Re: [PATCH, i386] Introduce switch for Skylake Server CPU.

On Mon, Sep 21, 2015 at 7:14 AM, Kirill Yukhin wrote: > Hello, > This patch introduces switches necessary for new Intel Server CPU > (code-named Skylake). > > Bootstrapped & regtested. > > Is it ok for trunk? > > gcc/ > * config.gcc: Support "skx". > *

Re: [PATCH] shrink-wrap: Handle multiple predecessors of prologue

We might not be able to redirect the jump from the block formerly the predecessor of PRO, to jump over the new block (it was not necessarily a fallthrough edge, could be EDGE_COMPLEX). In most cases we could do it of course. I would prefer not to add special case code (that is not as well

Re: [AArch64] Fix vcvt_high_f64_f32 and vcvt_figh_f32_f64 intrinsics.

On 21/09/15 15:38, James Greenhalgh wrote: On Mon, Sep 21, 2015 at 10:44:32AM +0100, Alan Lawrence wrote: [Resending in plain text] This makes sense to me now, although I find your comment slightly confusing: [] in that +;; the meaning of HI and LO is always taken with a little-endian

Re: [PATCH, i386, AVX-512] Fix operands in mask unpack[si|di] patterns.

On Mon, Sep 21, 2015 at 4:27 PM, Kirill Yukhin wrote: > Hello, > This patch fixes operands in kunpck[hi|si|di] insn patterns. > Bootstrapped (regtesting in progress). > > gcc/ > * gcc/config/i386/i386.md (define_insn "kunpckhi"): Fix > operand in pattern.

Re: [AArch64] Fix vcvt_high_f64_f32 and vcvt_figh_f32_f64 intrinsics.

[Resending in plain text] This makes sense to me now, although I find your comment slightly confusing: [] in that +;; the meaning of HI and LO is always taken with a little-endian view of +;; the vector You mean vec_unpacks_{hi,lo} (which seems to go against the *architectural* bit after

Re: [PATCH] Fix Cygwin bootstrap failing to find win32 libraries

2015-09-21 0:35 GMT+02:00 JonY <10wa...@gmail.com>: > On 9/21/2015 02:05, Kai Tietz wrote: >> 2015-09-16 13:42 GMT+02:00 JonY <10wa...@gmail.com>: >>> libgcc is failing to find kerne32 etc during the 2nd stage when >>> bootstraping, explicitly add w32api directory to search path. >>> >>> Patch OK?

Re: [PATCH tree-inline] do not say "called from here" with UNKNOWN_LOCATION

On 21 September 2015 at 10:18, Richard Biener wrote: > input_location is set from the call stmt: > > /* FIXME: instantiate_decl isn't called by inlinable_function_p. */ > saved_location = input_location; > input_location = gimple_location (stmt); > > it would be

Re: [PATCH] [ARM] Replacing variable swaps that use a temporary variable with a call to std::swap in gcc/config/arm/arm.c

Hi Bilyan, On 21/09/15 08:41, Bilyan Borisov wrote: Replacing variable swaps that use a temporary variable with a call to std::swap. Tested against arm-none-eabi target including a variant with neon enabled. 2015-XX-XX Bilyan Borisov * config/arm/arm.c

Re: New post-LTO OpenACC pass

On 09/21/2015 09:30 AM, Nathan Sidwell wrote: > +const pass_data pass_data_oacc_transform = > +{ > + GIMPLE_PASS, /* type */ > + "fold_oacc_transform", /* name */ Want to rename the tree dump file to oacc_xforms like I'm did in the attached patch? Regardless, I think we need to document this

Re: New post-LTO OpenACC pass

On 09/21/15 16:30, Cesar Philippidis wrote: On 09/21/2015 09:30 AM, Nathan Sidwell wrote: +const pass_data pass_data_oacc_transform = +{ + GIMPLE_PASS, /* type */ + "fold_oacc_transform", /* name */ Want to rename the tree dump file to oacc_xforms like I'm did in the attached patch?

Re: (patch,rfc) s/gimple/gimple */

Richard Biener writes: > On Fri, Sep 18, 2015 at 3:32 PM, Trevor Saunders > wrote: >> On Wed, Sep 16, 2015 at 03:11:14PM -0400, David Malcolm wrote: >>> On Wed, 2015-09-16 at 09:16 -0400, Trevor Saunders wrote: >>> > Hi, >>> > >>> > I gave

Re: [PATCH tree-inline] do not say "called from here" with UNKNOWN_LOCATION

On Mon, Sep 21, 2015 at 11:59 AM, Manuel López-Ibáñez wrote: > On 21 September 2015 at 10:18, Richard Biener > wrote: >> input_location is set from the call stmt: >> >> /* FIXME: instantiate_decl isn't called by inlinable_function_p. */ >>

Re: [AArch64][PATCH 1/5] Use atomic instructions for swap and fetch-update operations.

On Mon, Sep 21, 2015 at 12:06:40PM +0100, Matthew Wahab wrote: > On 18/09/15 08:58, James Greenhalgh wrote: > > On Thu, Sep 17, 2015 at 05:37:55PM +0100, Matthew Wahab wrote: > > >> diff --git a/gcc/config/aarch64/atomics.md b/gcc/config/aarch64/atomics.md > >> index 65d2cc9..0e71002 100644 > >>

Re: [patch] Only do shrink_to_fit() when exceptions enabled

Oops. Bootstrapped with --disable-libstdcxx-dual-abi on x86_64-linux, committed to trunk. commit 9b9d9e3a5921f9a5225b466ce9d07b42b72f54dd Author: Jonathan Wakely Date: Mon Sep 21 11:58:41 2015 +0100 Fix bootstrap error introduced in r227870 PR

Re: [PATCH] shrink-wrap: Handle multiple predecessors of prologue

On 09/18/2015 05:36 PM, Segher Boessenkool wrote: { + while (pro != entry && !can_get_prologue (pro, prologue_clobbered)) + { + gcc_assert (pro != entry); Lose the assert, it's redundant with the loop condition. + basic_block new_bb = create_empty_bb

Re: [SH][committed] FIx PR 67657

On Mon, 2015-09-21 at 22:04 +0900, Oleg Endo wrote: > Hi, > > This fixes PR 67657 on trunk. It seems that something after the > peephole2 pass is not happy to see things like: > mov.l @r2+,r2 > > which some of the SH peephole2 patterns create out of e.g. > mov.l @r2+,r0 > mov

Re: [PATCH] PR fortran/67615 -- check for scalar expression

On Mon, Sep 21, 2015 at 07:52:48PM +0200, FX wrote: > > 2015-09-21 Steven G. Kargl > > > > PR fortran/67615 > > * resolve.c (gfc_resolve_code): Check for scalar expression in > > arithmetic-if. > > > > > > 2015-09-21 Steven G. Kargl > >

[PATCH tree-inline v2] do not say "called from here" with UNKNOWN_LOCATION

In https://sourceware.org/ml/libc-alpha/2014-12/msg00300.html, we give a "called from here" note without actually having a location, which looks strange. I haven't been able to generate such a testcase. If this happens, try to at least point to the current function being called. If that location

[patch] Pack global state of forwprop to one structure

Hi, the following patch almost removes the global state of pass_forwprop. Only almost, because the pass calls fold_const with its own valueize function which uses lattices, and changing the prototype of valueize (by adding a void *data parameter) is something I am not going to undertake without

[PATCH,committed] Fix typos in comment.

I committed the following patch, which spells "defined" correctly. 2015-09-21 Steven G. Kargl * resolve.c (nonscalar_typebound_assign): Fix typos in comment. Index: resolve.c === --- resolve.c

Re: [RFC,PATCH] DWARF support for AIX

On Sun, Sep 20, 2015 at 4:25 PM, David Edelsohn wrote: > Appended is an initial implementation of DWARF support for AIX. The > patch emits the correct sections and works with the existing DWARF > support for AIX XCOFF in GDB ... somewhat. > > First, AIX only supports a subset

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