Re: [Patch] Implement is_[nothrow_]swappable (p0185r1)

2016-05-23 13:50 GMT+02:00 Jonathan Wakely : > On 17/05/16 20:39 +0200, Daniel Krügler wrote: >> >> This is an implementation of the Standard is_swappable traits according to >> >> http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2016/p0185r1.html >> >> During that work it

Re: C++ PATCH for c++/70735 (static locals and generic lambdas)

On May 24, 2016, at 3:35 PM, Paolo Carlini wrote: > On 23/05/2016 21:01, Jason Merrill wrote: >> +// PR c++/70735 >> +// { dg-do run { target c++1y } } >> + > [...] >> @@ -0,0 +1,19 @@ >> +// PR c++/70735 >> +// { dg-do run { target c++1y } } > I'm changing these c++1y

Re: C++ PATCH for c++/70735 (static locals and generic lambdas)

Hi, On 23/05/2016 21:01, Jason Merrill wrote: +// PR c++/70735 +// { dg-do run { target c++1y } } + [...] @@ -0,0 +1,19 @@ +// PR c++/70735 +// { dg-do run { target c++1y } } I'm changing these c++1y to c++14. Paolo.

Re: More backwards/FSM jump thread refactoring and extension

On 05/24/2016 06:03 PM, Trevor Saunders wrote: On Tue, May 24, 2016 at 10:58:18AM -0600, Jeff Law wrote: --- a/gcc/tree-ssa-threadbackward.c +++ b/gcc/tree-ssa-threadbackward.c @@ -356,6 +356,44 @@ profitable_jump_thread_path (vec *, return taken_edge; } +/* PATH is

Re: More backwards/FSM jump thread refactoring and extension

On Tue, May 24, 2016 at 10:58:18AM -0600, Jeff Law wrote: > --- a/gcc/tree-ssa-threadbackward.c > +++ b/gcc/tree-ssa-threadbackward.c > @@ -356,6 +356,44 @@ profitable_jump_thread_path (vec > *, >return taken_edge; > } > > +/* PATH is vector of blocks forming a jump

Re: [PATCH][MIPS] Add -minline-intermix to ignore compression flags when inlining

On 05/24/2016 08:23 AM, Robert Suchanek wrote: [snip] diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 73f1cb6..2f6195e 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -837,6 +837,7 @@ Objective-C and Objective-C++ Dialects}. -mips16 -mno-mips16 -mflip-mips16

Re: [PATCH][MIPS] Add support for code_readable function attribute

On 05/24/2016 08:25 AM, Robert Suchanek wrote: [snip] diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index e4d6c1c..dd23c70 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -4441,6 +4441,23 @@ On MIPS targets, you can use the @code{nocompression} function attribute to

RE: [Patch V2] Fix SLP PR58135.

Hi Christophe, > -Original Message- > From: Christophe Lyon [mailto:christophe.l...@linaro.org] > Sent: Tuesday, May 24, 2016 8:45 PM > To: Kumar, Venkataramanan > Cc: Richard Biener ; gcc-patches@gcc.gnu.org > Subject: Re:

Re: [fortran] Re: Make array_at_struct_end_p to grok MEM_REFs

On Mon, 23 May 2016, Jan Hubicka wrote: > > > > The assert below is unnecessary btw - it is ensured by IL checking. > I removed the assert but had to add a check that sizes match. As sported by > the > testsuite, the declaration size doesn't need to match the size of object that > we > see. >

[AArch64, 6/6] Reimplement vpadd intrinsics & extend rtl patterns to all modes

These intrinsics was implemented by inline assembly using "faddp" instruction. There was a pattern "aarch64_addpv4sf" which supportsV4SF mode only while we can extend this pattern to support VDQF mode, then we can reimplement these intrinsics through builtlins. gcc/ 2016-05-23 Jiong Wang

Re: [patch,openacc] use firstprivate pointers for subarrays in c and c++

On Mon, May 23, 2016 at 07:31:53PM -0700, Cesar Philippidis wrote: > @@ -12559,7 +12560,7 @@ c_finish_omp_clauses (tree clauses, enum > c_omp_region_type ort) > t = OMP_CLAUSE_DECL (c); > if (TREE_CODE (t) == TREE_LIST) > { > - if (handle_omp_array_sections (c,

[AArch64, 1/6] Reimplement scalar fixed-point intrinsics

This patch reimplement scalar intrinsics for conversion between floating- point and fixed-point. Previously, all such intrinsics are implemented through inline assembly. This patch added RTL pattern for these operations that those intrinsics can be implemented through builtins. gcc/ 2016-05-23

[AArch64, 3/6] Reimplement frsqrte intrinsics

These intrinsics were implemented before the instruction pattern "aarch64_rsqrte" added, that these intrinsics were implemented through inline assembly. This mirgrate the implementation to builtin. gcc/ 2016-05-23 Jiong Wang * config/aarch64/aarch64-builtins.def

[PATCH][ARM] PR target/69857 Remove bogus early return false; in gen_operands_ldrd_strd

Hi all, As the PR says, the gen_operands_ldrd_strd function has a spurious return false in it. It seems to have been there from the beginning when that code was added. The code is trying to transform: mov r0, 0 str r0, [r2] mov r0, 1 str r0, [r2, #4] into:

Re: [PATCH] Fix PR tree-optimization/71170

On 24 May 2016 at 18:36, Christophe Lyon wrote: > On 24 May 2016 at 05:13, Kugan Vivekanandarajah > wrote: >> On 23 May 2016 at 21:35, Richard Biener wrote: >>> On Sat, May 21, 2016 at 8:08 AM, Kugan

[patch, libgfortran] PR71123 committed

Committed rev r236628 as simple and obvious. I munged the Changelog then fixed it. New Revision: 236628 "https://gcc.gnu.org/viewcvs?rev=236628; 2016-05-23 Jerry DeLisle * io/list_read (eat_spaces): Eat '\r' as part of spaces. * gfortran.dg/namelist_90.f: New test

[AArch64, 0/6] Remove inline assembly in arm_neon.h

This patch set is a further step to remove those intrinsics implemented by inline assembly. The touched intrinsics including those for fixed-point coversion, frsqrt*, fabd and faddp. The implementation approach is quite simple, for these intrinsics that were implemented by inline assembly: *

Tighten syntax checking for OpenACC routine construct in C

Hi! OK for trunk? commit 155feb878deedd09fd60e2322b1515de41595b13 Author: Thomas Schwinge Date: Tue May 24 10:42:08 2016 +0200 Tighten syntax checking for OpenACC routine construct in C gcc/c/ * c-parser.c (c_parser_oacc_routine): Tighten

Re: [PATCH] Make basic asm implicitly clobber memory

On 05/23/16 23:46, David Wohlferd wrote: > On 5/23/2016 12:46 AM, Richard Biener wrote: > > On Sun, 22 May 2016, Andrew Haley wrote: > >> On 05/20/2016 07:50 AM, David Wohlferd wrote: > >>> I realize deprecation/removal is drastic. Especially since basic > >>> asm (mostly) works as is. But

[AArch64, 4/6] Reimplement frsqrts intrinsics

Similar as [3/6], these intrinsics were implemented before the instruction pattern "aarch64_rsqrts" added, that these intrinsics were implemented through inline assembly. This mirgrate the implementation to builtin. gcc/ 2016-05-23 Jiong Wang *

[AArch64, 2/6] Reimplement vector fixed-point intrinsics

Based on top of [1/6], this patch reimplement vector intrinsics for conversion between floating-point and fixed-point. gcc/ 2016-05-23 Jiong Wang * config/aarch64/aarch64-builtins.def (scvtf): New builtins for vector types. (ucvtf): Likewise.

[AArch64, 5/6] Reimplement fabd intrinsics & merge rtl patterns

These intrinsics were implemented before "fabd_3" introduces. Meanwhile the patterns "fabd_3" and "*fabd_scalar3" can be merged into a single "fabd3" using VALLF. This patch migrate the implementation to builtins backed by this pattern. gcc/ 2016-05-23 Jiong Wang

Re: Tighten syntax checking for OpenACC routine construct in C

On Tue, May 24, 2016 at 10:51:15AM +0200, Thomas Schwinge wrote: > Hi! > > OK for trunk? > > commit 155feb878deedd09fd60e2322b1515de41595b13 > Author: Thomas Schwinge > Date: Tue May 24 10:42:08 2016 +0200 > > Tighten syntax checking for OpenACC routine construct

Re: [PATCH] Fix PR tree-optimization/71170

On 24 May 2016 at 05:13, Kugan Vivekanandarajah wrote: > On 23 May 2016 at 21:35, Richard Biener wrote: >> On Sat, May 21, 2016 at 8:08 AM, Kugan Vivekanandarajah >> wrote: >>> On 20 May 2016 at

RE: [PATCH][MIPS] Add -mgrow-frame-downwards option

Sandra Loosemore writes: > On 05/20/2016 08:58 AM, Robert Suchanek wrote: > > Hi, > > > > The patch changes the default behaviour of the direction in which the > > local frame grows for MIPS16. > > > > The code size reduces by about 0.5% in average case for -Os, hence, it

Re: [PATCH] Fix PR tree-optimization/71170

On Tue, May 24, 2016 at 06:46:49PM +1000, Kugan Vivekanandarajah wrote: > 2016-05-24 Kugan Vivekanandarajah > > * tree-ssa-reassoc.c (sort_by_operand_rank): Check fgimple_bb for NULL. s/fgimple/gimple/ ? > --- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-44.c > +++

Re: [PATCH] Improve TBAA with unions

On Wed, 18 May 2016, Richard Biener wrote: > > The following adjusts get_alias_set beahvior when applied to > union accesses to use the union alias-set rather than alias-set > zero. This is in line with behavior from the alias oracle > which (bogously) circumvents alias-set zero with looking at

Re: RFC [1/2] divmod transform

On 23 May 2016 at 17:35, Richard Biener wrote: > On Mon, May 23, 2016 at 10:58 AM, Prathamesh Kulkarni > wrote: >> Hi, >> I have updated my patch for divmod (attached), which was originally >> based on Kugan's patch. >> The patch

[C/C++ PATCH] Fix bogus warning with -Wswitch-unreachable (PR c/71249)

Martin S. noticed that cc1plus bogusly warns on the following test. That's because I didn't realize that GIMPLE_BINDs might be nested in C++ so we need to look through them, and only then get the first statement in the seq. Bootstrapped/regtested on x86_64-linux, ok for trunk? 2016-05-24 Marek

Re: [ARM] Add support for overflow add, sub, and neg operations

Hi Michael, Sorry for the delay in reviewing. A few comments at the bottom. On 29/03/16 00:19, Michael Collison wrote: An updated patch that resolves the issues with thumb2 support and adds test cases as requested. Looking to check this into GCC 7 stage1 when it opens. 2016-02-24 Michael

Re: [PATCH AArch64]Support missing vcond pattern by adding/using vec_cmp/vcond_mask patterns.

Ping. Thanks, bin On Tue, May 17, 2016 at 10:02 AM, Bin Cheng wrote: > Hi, > Alan and Renlin noticed that some vcond patterns are not supported in > AArch64(or AArch32?) backend, and they both had some patches fixing this. > After investigation, I agree with them that

Re: [PATCH v2] Ensure source_date_epoch is always initialised

Hi, > On 24 May 2016, at 11:59, Dhole wrote: > > Hey! > > I'm the original author of the SOURCE_DATE_EPOCH patch. > > I've just seen this. I believe that this bug was fixed in the the > rework of the patch I sent some days ago [1], although the latest > version of that

Re: [fortran] Re: Make array_at_struct_end_p to grok MEM_REFs

On Tue, 24 May 2016, Jan Hubicka wrote: > > > - if (stride) > > > + if (stride && akind >= GFC_ARRAY_ALLOCATABLE) > > > rtype = build_range_type (gfc_array_index_type, gfc_index_zero_node, > > > int_const_binop (MINUS_EXPR, stride, > > >

Re: [PR71252][PATCH] ICE: verify_ssa failed

On Tue, May 24, 2016 at 12:38 PM, Kugan Vivekanandarajah wrote: > Hi, > > In build_and_add_sum, new stmt is created and inserted (which is the > actual use stmt). Therefore stmt_to_insert has to be inserted after > this is created. This patch moves it after. > >

Re: [PATCH 2/3] Add profiling support for IVOPTS

On Thu, May 19, 2016 at 11:28 AM, Martin Liška wrote: > On 05/17/2016 12:27 AM, Bin.Cheng wrote: >>> As profile-guided optimization can provide very useful information >>> about basic block frequencies within a loop, following patch set leverages >>> that information. It speeds up

Re: [fortran] Re: Make array_at_struct_end_p to grok MEM_REFs

> > - if (stride) > > + if (stride && akind >= GFC_ARRAY_ALLOCATABLE) > > rtype = build_range_type (gfc_array_index_type, gfc_index_zero_node, > > int_const_binop (MINUS_EXPR, stride, > >build_int_cst (TREE_TYPE

Re: [PATCH] Fix PR tree-optimization/71170

On Tue, May 24, 2016 at 5:13 AM, Kugan Vivekanandarajah wrote: > On 23 May 2016 at 21:35, Richard Biener wrote: >> On Sat, May 21, 2016 at 8:08 AM, Kugan Vivekanandarajah >> wrote: >>> On 20 May

Re: [PATCH][ARM] PR target/69857 Remove bogus early return false; in gen_operands_ldrd_strd

On 24/05/16 09:52, Kyrill Tkachov wrote: > Hi all, > > As the PR says, the gen_operands_ldrd_strd function has a spurious return > false in it. > It seems to have been there from the beginning when that code was added. > > The code is trying to transform: > mov r0, 0 > str r0,

[PATCH] Fix PR71254

The following testsuite regression on the gcc 5 branch exposes a latent issue on aarch64. Fixed by compiling the testcase only on the arch the fix was backported for. Tested w/ aarch64 cross and x86_64, committed to branch. Richard. 2016-05-24 Richard Biener PR

[PR71252][PATCH] ICE: verify_ssa failed

Hi, In build_and_add_sum, new stmt is created and inserted (which is the actual use stmt). Therefore stmt_to_insert has to be inserted after this is created. This patch moves it after. I don’t know how I can reduce the Fortran test-case so adding the test-case from bug report. Any help in

[PATCH] Fix PR71253

I am currently testing the following patch that makes the control dependences data structures survive edge redirection when the pass knows it doesn't alter control dependences. It basically replaces the edge list with a vector of BB indices (so even removing BBs and still querying the control

Re: [PATCH v2] Ensure source_date_epoch is always initialised

Hey! I'm the original author of the SOURCE_DATE_EPOCH patch. I've just seen this. I believe that this bug was fixed in the the rework of the patch I sent some days ago [1], although the latest version of that patch has not been reviewed yet. In [1] the initialization of source_date_epoch is

Re: [Patch wwwdocs] Add aarch64-none-linux-gnu as a primary platform for GCC-7

On Tue, May 24, 2016 at 12:20 AM, Gerald Pfeifer wrote: > On Mon, 23 May 2016, Richard Biener wrote: >> So I propose to demote -freebsd to secondary and use >> i686-unknown-freebsd (or x86_64-unknown-freebsd?). >> >> Gerald, Andreas, can you comment on both issues? Esp. i386

Re: [PR71252][PATCH] ICE: verify_ssa failed

On Tue, May 24, 2016 at 08:38:29PM +1000, Kugan Vivekanandarajah wrote: > Hi, > > In build_and_add_sum, new stmt is created and inserted (which is the > actual use stmt). Therefore stmt_to_insert has to be inserted after > this is created. This patch moves it after. > > I don’t know how I can

Re: [PATCH][AArch64] Improve aarch64_case_values_threshold setting

Jim Wilson wrote: > It looks like a slight lose on qdf24xx on SPEC CPU2006 at -O3. I see > about a 0.37% loss on the integer benchmarks, and no significant > change on the FP benchmarks. The integer loss is mainly due to > 458.sjeng which drops 2%. We had tried various values for >

Re: [PATCH] Introduce can_remove_lhs_p

On Mon, 23 May 2016, Marek Polacek wrote: > On Mon, May 23, 2016 at 04:36:30PM +0200, Jakub Jelinek wrote: > > On Mon, May 23, 2016 at 04:28:33PM +0200, Marek Polacek wrote: > > > As promised in , > > > this is a simple clean-up which

Re: [fortran] Re: Make array_at_struct_end_p to grok MEM_REFs

Hi, I tried the attached patch that gets rid of gfc_array_range_type because it seems pointless from middle-end POV. It however affects .original dumps in the following way: --- assumed_type_2.f90.003t.original2016-05-24 14:32:45.771503552 +0200 +++ ../assumed_type_2.f90.003t.original

[PATCH][ARM][1/4] Replace uses of int_log2 by exact_log2

Hi all, The int_log2 function in arm.c is not really useful since we already have a generic function for calculating the log2 of HOST_WIDE_INTs. The only difference in functionality is that int_log2 also asserts that the result is no greater than 31. This patch removes int_log2 in favour of

[PATCH] Fix PR71230

The following fixes the ICEs in PR71230. Bootstrap and regtest running on x86_64-unknown-linux-gnu. Richard. 2016-05-24 Richard Biener PR tree-optimization/71240 * tree-ssa-math-opts.c (init_symbolic_number): Verify the source has integral type.

[PATCH][ARM][2/4] Replace casts of 1 to HOST_WIDE_INT by HOST_WIDE_INT_1 and HOST_WIDE_INT_1U

Hi all, hwint.h defines a number of useful macros to access the constants -1,0,1 cast to HOST_WIDE_INT or unsigned HOST_WIDE_INT. We can use these to save some horizontal space and parentheses when we need such constants. This patch replaces such uses with these macros to slightly improve the

[PATCH] Fix PR71230 some more

There were more omissions in how zero_one_operation works with the new way of processing negates in the context of multiplication chains. Bootstrapped on x86_64-unknown-linux-gnu, testing in progress. CPU 2006 build in progress as well. Richard. 2016-05-24 Richard Biener

Re: RFC [1/2] divmod transform

On Tue, 24 May 2016, Prathamesh Kulkarni wrote: > On 23 May 2016 at 17:35, Richard Biener wrote: > > On Mon, May 23, 2016 at 10:58 AM, Prathamesh Kulkarni > > wrote: > >> Hi, > >> I have updated my patch for divmod (attached), which

Re: [fortran] Re: Make array_at_struct_end_p to grok MEM_REFs

> > Ah, yes. Now I see. > > > The test I updated that looks for DECL simply assumes > > that declarations can not be accessed past their end. > > It would make more sense to use object size machinery here somehow. > > (i.e. even in fortran we have accesses to mallocated buffers of constant >

Re: [fortran] Re: Make array_at_struct_end_p to grok MEM_REFs

On Tue, 24 May 2016, Jan Hubicka wrote: > > > > Ah, yes. Now I see. > > > > > The test I updated that looks for DECL simply assumes > > > that declarations can not be accessed past their end. > > > It would make more sense to use object size machinery here somehow. > > > (i.e. even in fortran

[C++ Patch] PR 69872 ("[6/7 Regression] -Wnarrowing note without warning/errror")

Hi, in this small diagnostic regression we emit an inform without a preceding warning/error: checking the return value of the pedwarn, as we normally want to do, fixes the problem. Tested x86_64-linux. Thanks, Paolo. / /cp 2016-05-24 Paolo Carlini

Re: [PATCH][ARM] PR target/70830: Avoid POP-{reglist}^ when returning from interrupt handlers

Ping. https://gcc.gnu.org/ml/gcc-patches/2016-05/msg01211.html Thanks, Kyrill On 17/05/16 11:40, Kyrill Tkachov wrote: On 13/05/16 12:05, Kyrill Tkachov wrote: Hi Christophe, On 12/05/16 20:57, Christophe Lyon wrote: On 12 May 2016 at 11:48, Ramana Radhakrishnan

Re: [fortran] Re: Make array_at_struct_end_p to grok MEM_REFs

On Tue, 24 May 2016, Jan Hubicka wrote: > Hi, > I tried the attached patch that gets rid of gfc_array_range_type because it > seems pointless from middle-end POV. It however affects .original dumps in the > following way: > --- assumed_type_2.f90.003t.original2016-05-24 14:32:45.771503552

Re: [PATCH v2] Ensure source_date_epoch is always initialised

On 16-05-24 12:06:48, James Clarke wrote: > Hi, > > On 24 May 2016, at 11:59, Dhole wrote: > > > > Hey! > > > > I'm the original author of the SOURCE_DATE_EPOCH patch. > > > > I've just seen this. I believe that this bug was fixed in the the > > rework of the patch I

Re: [fortran] Re: Make array_at_struct_end_p to grok MEM_REFs

> > Hmm, you are probably right. If we can have array with TYPE_DOMAIN != NULL > > and sane bounds, but with TYPE_SIZE == NULL, we probably need to punt on > > NULL > > TYPE_SIZE. I can add it just to be sure. > > As a MEM_REF embeds a VIEW_CONVERT you can placement-new > > struct { int a[5];

Re: [fortran] Re: Make array_at_struct_end_p to grok MEM_REFs

> As said I'd simply use NULL TYPE_MAX_VALUE, not drop TYPE_DOMAIN > completely (yes, NULL TYPE_DOMAIN is equal to [0:] so we can as well > print that - as you say, not sure what else breaks with that ;)) NULL TYPE_MAX_VALUE was used by my previous patch, because it used gfc_array_range_type

[PATCH][ARM][4/4] Simplify checks for CONST_INT_P and comparison against 1/0

Hi all, Following up from patch 3/4 there are a few more instances where we check that an RTX is CONST_INT_P and then compare its INTVAL against 1 or 0. These can be replaced by just comparing the RTX directly against CONST1_RTX or CONST0_RTX. This patch does that. Bootstrapped and tested on

[PATCH][ARM][3/4] Cleanup casts from INTVAL to [unsigned] HOST_WIDE_INT

Hi all, We have a few instances in the arm backend where we take the INTVAL of an RTX and immediately cast it to an (unsigned HOST_WIDE_INT). This is exactly equivalent to taking the UINTVAL of the RTX. This patch fixes such uses. A couple of uses in arm.md take the INTVAL and then compare

Re: [PATCH v3] gcov: Runtime configurable destination output

On 05/23/16 16:03, Aaron Conole wrote: The previous gcov behavior was to always output errors on the stderr channel. This is fine for most uses, but some programs will require stderr to be untouched by libgcov for certain tests. This change allows configuring the gcov output via an environment

Re: [PATCH] Fix PR71230

On Tue, May 24, 2016 at 03:28:42PM +0200, Richard Biener wrote: > The following fixes the ICEs in PR71230. > > Bootstrap and regtest running on x86_64-unknown-linux-gnu. Wouldn't it be enough to use TYPE_SIZE_UNIT instead of TYPE_PRECISION for the non-INTEGRAL_TYPE_Ps and just deal with it at

[PATCH][MIPS] Add -minline-intermix to ignore compression flags when inlining

Hi, The below allows us to inline functions that have different compression flags for better tuning of performance/code size balance. Ok to commit? Regards, Robert 2016-05-24 Matthew Fortune gcc/ * config/mips/mips.c (mips_can_inline_p): Allow inlining

RE: [PATCH][MIPS] P5600 scheduler fix

Robert Suchanek writes: > gcc/ > * config/mips/p5600.md (p5600_fpu_fadd): Remove checking for > `fabs' and `fneg' type attributes. > (p5600_fpu_fabs): Add `fmove' to the comment. OK. Thanks, Matthew

Re: RFC [1/2] divmod transform

On 24 May 2016 at 17:42, Richard Biener wrote: > On Tue, 24 May 2016, Prathamesh Kulkarni wrote: > >> On 23 May 2016 at 17:35, Richard Biener wrote: >> > On Mon, May 23, 2016 at 10:58 AM, Prathamesh Kulkarni >> >

Re: [PATCH] Vectorize inductions that are live after the loop.

On Mon, May 23, 2016 at 2:53 PM, Alan Hayward wrote: > > Thanks for the review. > > On 23/05/2016 11:35, "Richard Biener" wrote: > >> >>@@ -6332,79 +6324,81 @@ vectorizable_live_operation (gimple *stmt, >> stmt_vec_info stmt_info =

[PATCH][MIPS] Don't split shifts by default for MIPS16.

Hi, The following changes the default behaviour of shift splitting for MIPS16 e.g. the shifts will be split only when used with undocumented -mno-debugd option that is now switched on by default. This appears to enable better optimization in certain cases, and hence, giving slightly better

[PATCH][MIPS] Remove "new" MIPS TLS access patterns

Hi, The below finishes the revert of r137670 that was already partially reverted in r137734 as part of PR target/35802. It would appear that the revert was not completed because of a spill failure at the time. As LRA can handle the 'v' constraint just fine and MIPS is going to drop the support

[PATCH][MIPS] P5600 scheduler fix

Hi, The below is a fix for the P5600 scheduler. Ok to commit? Regards, Robert 2016-05-24 Simon Dardis Prachi Godbole gcc/ * config/mips/p5600.md (p5600_fpu_fadd): Remove checking for `fabs' and `fneg' type

RE: [PATCH][MIPS] Remove "new" MIPS TLS access patterns

Robert Suchanek writes: > The below finishes the revert of r137670 that was already partially reverted > in r137734 as part of PR target/35802. > > It would appear that the revert was not completed because of a spill failure > at the time. As LRA can handle the 'v'

Re: [PATCH] Introduce can_remove_lhs_p

On Tue, May 24, 2016 at 02:17:10PM +0200, Richard Biener wrote: > On Mon, 23 May 2016, Marek Polacek wrote: > > > On Mon, May 23, 2016 at 04:36:30PM +0200, Jakub Jelinek wrote: > > > On Mon, May 23, 2016 at 04:28:33PM +0200, Marek Polacek wrote: > > > > As promised in > > > >

Re: [PATCH] Fix PR71230

On Tue, 24 May 2016, Jakub Jelinek wrote: > On Tue, May 24, 2016 at 03:28:42PM +0200, Richard Biener wrote: > > The following fixes the ICEs in PR71230. > > > > Bootstrap and regtest running on x86_64-unknown-linux-gnu. > > Wouldn't it be enough to use TYPE_SIZE_UNIT instead of TYPE_PRECISION >

RE: [PATCH] Disable -mbranch-likely for -Os when targetting generic architecture

Hi Catherine, Apologies for the (very) late reply. It appears that I never replied to the last message. > > gcc/ > > * config/mips/mips-cpus.def: Replace PTF_AVOID_BRANCHLIKELY > > with > > PTF_AVOID_BRANCHLIKELY_ALWAYS for generic architecture and > > with > >

Re: RFC [1/2] divmod transform

On Tue, 24 May 2016, Prathamesh Kulkarni wrote: > On 24 May 2016 at 17:42, Richard Biener wrote: > > On Tue, 24 May 2016, Prathamesh Kulkarni wrote: > > > >> On 23 May 2016 at 17:35, Richard Biener wrote: > >> > On Mon, May 23, 2016 at 10:58 AM,

[PATCH][MIPS] Add support for code_readable function attribute

Hi, The patch adds support for __attribute__ ((code_readable)) with optional argument that accepts `no', `yes' or `pcrel' just like the -mcode-readable= command line switch. If the argument is not specified then the default `yes' is applied. This of course has only effect on targets supporting

Re: Tighten syntax checking for OpenACC routine construct in C

Hi! On Tue, 24 May 2016 10:54:53 +0200, Jakub Jelinek wrote: > On Tue, May 24, 2016 at 10:51:15AM +0200, Thomas Schwinge wrote: > > OK for trunk? > Ok. Committed without changes in r236639: commit c9d624bd2672463771546e73bf3d6446d64e43c0 Author: tschwinge

[v3 PATCH] PR libstdc++/66338

Tested on Linux-PPC64. The idea here is to get the constructor templates to step out of the way if what they are dealing with will be handled by a special member function, like the copy constructor. Doing so properly fixes the bug at hand and likely other similar cases, too. The problem in getting

Re: [Patch V2] Fix SLP PR58135.

Hi Venkat, On 23 May 2016 at 11:54, Kumar, Venkataramanan wrote: > Hi Richard, > >> -Original Message- >> From: Richard Biener [mailto:richard.guent...@gmail.com] >> Sent: Thursday, May 19, 2016 4:08 PM >> To: Kumar, Venkataramanan

[PATCH] Add priority_queue::value_compare (LWG 2684)

* include/bits/stl_queue.h (priority_queue::value_compare): Define. This is only Tentatively Ready but I don't think there's any harm in making the change now. Libc++ have been shipping this for years, without realising it wasn't actually in the standard :-) Tested x86_64, committed to

Re: [PATCH] c++/71147 - [6 Regression] Flexible array member wrongly rejected in template

Thanks for the suggestions. I implemented them in the attached update to the the patch. The macro I added evaluates its argument multiple times. That normally isn't a problem unless it's invoked with a non-trivial argument like a call to complete_type() that's passed to COMPLETE_TYPE_P() in

Re: [PATCH][AArch64] Improve aarch64_case_values_threshold setting

On 05/23/16 15:32, Evandro Menezes wrote: I'm fine with this patch, as it achieves in part what I intended before: going beyond the default_case_values_threshold, too conservative for Exynos M1. My concern is particularly what happens to in-order targets, like the ubiquitous A53. I'll

Re: [PATCH] Use flag_general_regs_only with -mgeneral-regs-only

On Sat, May 21, 2016 at 12:48 AM, Uros Bizjak wrote: > On Fri, May 20, 2016 at 7:49 PM, H.J. Lu wrote: >> On Fri, May 20, 2016 at 10:15 AM, Rainer Orth >> wrote: >>> "H.J. Lu" writes: >>> On Thu,

[PATCH] Fixes to must-tail-call tests

The following fixes the known failures of the must-tail-call tests. Tested with --target= * aarch64-unknown-linux-gnu * ia64-unknown-linux-gnu * m68k-unknown-linux-gnu * x86_64-pc-linux-gnu OK for trunk? gcc/testsuite/ChangeLog: * gcc.dg/plugin/must-tail-call-2.c (test_2_caller):

Re: [C/C++ PATCH] Fix bogus warning with -Wswitch-unreachable (PR c/71249)

OK. Jason On Tue, May 24, 2016 at 7:41 AM, Marek Polacek wrote: > Martin S. noticed that cc1plus bogusly warns on the following test. That's > because I didn't realize that GIMPLE_BINDs might be nested in C++ so we need > to > look through them, and only then get the first

Re: [C++ Patch] PR 69872 ("[6/7 Regression] -Wnarrowing note without warning/errror")

OK. Jason On Tue, May 24, 2016 at 8:32 AM, Paolo Carlini wrote: > Hi, > > in this small diagnostic regression we emit an inform without a preceding > warning/error: checking the return value of the pedwarn, as we normally want > to do, fixes the problem. Tested

Re: [PATCH] Use flag_general_regs_only with -mgeneral-regs-only

On Tue, May 24, 2016 at 5:40 PM, H.J. Lu wrote: >> No, this is a flag, not a variable. Let's figure out how to extend >> target flags to more than 63 flags first. > > Extending target flags to more than 63 bits requires replacing > HOST_WIDE_INT with a bit vector. Since

Re: RFC [1/2] divmod transform

On 24 May 2016 at 19:39, Richard Biener wrote: > On Tue, 24 May 2016, Prathamesh Kulkarni wrote: > >> On 24 May 2016 at 17:42, Richard Biener wrote: >> > On Tue, 24 May 2016, Prathamesh Kulkarni wrote: >> > >> >> On 23 May 2016 at 17:35, Richard Biener

Re: [PATCH][AArch64] Improve aarch64_case_values_threshold setting

On 05/24/16 07:08, Wilco Dijkstra wrote: Jim Wilson wrote: It looks like a slight lose on qdf24xx on SPEC CPU2006 at -O3. I see about a 0.37% loss on the integer benchmarks, and no significant change on the FP benchmarks. The integer loss is mainly due to 458.sjeng which drops 2%. We had

Re: Allow embedded timestamps by C/C++ macros to be set externally (3)

On 05/23/2016 04:59 PM, Dhole wrote: PING Note Bernd is on PTO for another week or so. jeff

Re: [PATCH] Fix PR70434, change FE IL for vector indexing

On Mon, May 23, 2016 at 04:22:57PM +0200, Richard Biener wrote: > *** /dev/null 1970-01-01 00:00:00.0 + > --- gcc/testsuite/c-c++-common/vector-subscript-5.c 2016-05-23 > 16:17:41.148043066 +0200 > *** > *** 0 > --- 1,13 > + /* { dg-do compile } */ > + > +

Re: [PATCH] Use flag_general_regs_only with -mgeneral-regs-only

On Tue, May 24, 2016 at 7:18 PM, H.J. Lu wrote: >> Oh, target_flags is only a 32bit integer :(. Is there a reason it >> can't be extended to HOST_WIDE_INT, as is the case with >> ix86_isa_flags? > > target_flags is generic, not target specific. I want to limit my > change

Re: [PATCH] Fix up Yr constraint

On Tue, May 24, 2016 at 6:55 PM, Jakub Jelinek wrote: > Hi! > > The Yr constraint contrary to what has been said when it has been submitted > actually is always NO_REX_SSE_REGS or NO_REGS, never ALL_SSE_REGS, so > the RA restriction to only the first 8 regs is done no matter

Re: [PATCH] Fix Yr constraint uses in vpmov* insns

On Tue, May 24, 2016 at 6:49 PM, Jakub Jelinek wrote: > Hi! > > Looking at the Yr constraint, it seems to me it is really meant to be used > for noavx, only in that case whether we use xmm0-xmm7 or xmm8+ matters for > the size of the instruction (number of prefixes). > In most

Re: [PATCH] Fix Yr constraint uses in various insns

On Tue, May 24, 2016 at 6:50 PM, Jakub Jelinek wrote: > Hi! > > Similarly to the last patch, this one fixes various misc patterns. > > Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? > > 2016-05-24 Jakub Jelinek > > *

Re: [PATCH] Fix one more Yr use

On Tue, May 24, 2016 at 6:52 PM, Jakub Jelinek wrote: > Hi! > > Another case (separate patch because I thought I should add an avx512f > alternative here, but later on found out it is already handled by > having the vrndscale* patterns defined before these ones > and having the

Re: [PATCH] Use flag_general_regs_only with -mgeneral-regs-only

On Tue, May 24, 2016 at 8:15 PM, Uros Bizjak wrote: > On Tue, May 24, 2016 at 7:18 PM, H.J. Lu wrote: > >>> Oh, target_flags is only a 32bit integer :(. Is there a reason it >>> can't be extended to HOST_WIDE_INT, as is the case with >>> ix86_isa_flags? >>

C/C++ OpenACC routine directive, undeclared name error: try to help the user, once

Hi! Some users of C/C++ OpenACC are surprised to see code such as: #pragma acc routine (F) [declaration or definition of F] ... run into "error: 'F' has not been declared". If the routine directive is meant to apply to the lexically following function declaration or definition, either

Re: [PATCH, ARM, ping1] Do not set ARM_ARCH_ISA_THUMB for armv5

Ping? Best regards, Thomas On Tuesday 10 May 2016 14:26:04 Thomas Preudhomme wrote: > Hi, > > ARM_ARCH_ISA_THUMB is currently set to 1 when compiling for armv5 despite > armv5 not supporting Thumb instructions (armv5t does): > > arm-none-eabi-gcc -dM -march=armv5 -E - < /dev/null | grep

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