[PATCH] Tweak array_at_struct_end_p

The following picks the changes suggested as followup for PR80533 that do not cause the warning regression on accessing a [0] array. Additionally the patch removes the unnecessary allow_compref of the function. The question whether we want to allow an array to extend into padding still stands.

[PATCH 3/3] Vect peeling cost model

gcc/ChangeLog: 2017-04-26 Robin Dapp * tree-vect-data-refs.c (vect_peeling_hash_get_lowest_cost): Change cost model. (vect_peeling_hash_choose_best_peeling): Return extended peel info. (vect_peeling_supportable): Return peeling status.

Re: [PATCH][AArch64] Improve address cost for -mcpu=generic

On 12/04/17 14:08, Wilco Dijkstra wrote: > All cores which add a cpu_addrcost_table use a non-zero value for > HI and TI mode shifts (a non-zero value for general indexing also > applies to all shifts). Given this, it makes no sense to use a > different setting in generic_addrcost_table. So

Re: Fix bootstrap issue with gcc 4.1

On Thu, May 4, 2017 at 11:04 AM, Jan Hubicka wrote: >> > >> >Sure, I'm not questioning the patch, just wondering if we shouldn't >> >improve >> >store-merging further (we want to do it anyway for e.g. bitop adjacent >> >operations etc.). >> >> We definitely want to do that. It

[PATCH, GCC] Require c99_runtime for pr78622.c

Hi, Testcase gcc.c-torture/execute/pr78622.c uses %hhd printf specifier which was introduced in C99. C89 only recognizes h, l and L length specifier, it does not recognize hh length specifier. As such, this commit adds a c99_runtime effective target requirement. ChangeLog entry is as follows:

Re: [PATCH][ARM] Update max_cond_insns settings

On 12/04/17 14:02, Wilco Dijkstra wrote: > The existing setting of max_cond_insns for most cores is non-optimal. > Thumb-2 IT has a maximum limit of 4, so 5 means emitting 2 IT sequences. > Also such long sequences of conditional instructions can increase the number > of executed instructions

[testsuite, committed] Replace absolute line numbers in g++.dg/warn

Hi, this patch replaces absolute line numbers in g++.dg/warn. Thanks, - Tom Replace absolute line numbers in g++.dg/warn 2017-05-03 Tom de Vries PR testsuite/80557 * g++.dg/warn/Wstrict-aliasing-float-ref-int-obj.C: Replace absolute line numbers. *

[testsuite, committed] Replace absolute line numbers in gcc.target/i386

Hi, this patch replaces absolute line numbers in gcc.target/i386. [ Ignoring avx-vtestpd* and avx-vtestps* for the moment. For those I've filed PR80606 - "avx-vtestpd-1.c contains outdated line number" ( https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80606 ) ]. Thanks, - Tom Replace absolute

Re: [RFC][PATCH] Introduce -fdump*-folding

On 05/03/2017 12:12 PM, Richard Biener wrote: On Wed, May 3, 2017 at 10:10 AM, Martin Liška wrote: Hello Last release cycle I spent quite some time with reading of IVOPTS pass dump file. Using -fdump*-details causes to generate a lot of 'Applying pattern' lines, which can make

C PATCH to fix missing -Wlogical-op warning (PR c/80525)

This PR points out a missing -Wlogical-op warning (unless you use -fwrapv). We end up calling warn_logical_operator with op_left that is C_M_C_E != 0 and op_right that is a + 1 But make_range just cannot handle C_M_C_Es right; for exprs it simply picks the first operand and that doesn't work

Re: [PATCH][AArch64] Enable AUTOPREFETCHER_WEAK with -mcpu=generic

On 05/04/17 13:38, Wilco Dijkstra wrote: > Many supported cores use the AUTOPREFETCHER_WEAK setting which tries > to order loads and stores to improve streaming performance. Since significant > gains were reported in http://patchwork.ozlabs.org/patch/534469/ it seems > like a good idea to enable

Re: Handle data dependence relations with different bases

On Wed, May 3, 2017 at 9:00 AM, Richard Sandiford wrote: > This patch tries to calculate conservatively-correct distance > vectors for two references whose base addresses are not the same. > It sets a new flag DDR_COULD_BE_INDEPENDENT_P if the dependence > isn't

[OBVIOUS][PATCH] Remove an unused variable.

Hi. Installed as obvious. Martin >From 67276230a5f6150a214d8be4ebbd4962f2ce371b Mon Sep 17 00:00:00 2001 From: marxin Date: Thu, 4 May 2017 11:59:31 +0200 Subject: [PATCH] Remove an unused variable. gcc/ChangeLog: 2017-05-04 Martin Liska * tree-vrp.c

Re: [PATCH][AArch64] Model Cortex-A53 load forwarding

On 05/04/17 13:29, Wilco Dijkstra wrote: > Code scheduling for Cortex-A53 isn't as good as it could be. It turns out > code runs faster overall if we place loads and stores with a dependency > closer together. To achieve this effect, this patch adds a bypass between > cortex_a53_load1 and

[PATCH] Fix ICE in get_range_info (PR tree-optimization/80612)

We need to check that the SSA_NAME we're passing down to get_range_info is of INTEGRAL_TYPE_P; on pointers we'd crash on an assert. Bootstrapped/regtested on x86_64-linux, ok for trunk and 7.2? 2017-05-04 Marek Polacek PR tree-optimization/80612 * calls.c

Re: [PATCH] Fix ICE in get_range_info (PR tree-optimization/80612)

On Thu, May 4, 2017 at 11:14 AM, Marek Polacek wrote: > We need to check that the SSA_NAME we're passing down to get_range_info > is of INTEGRAL_TYPE_P; on pointers we'd crash on an assert. > > Bootstrapped/regtested on x86_64-linux, ok for trunk and 7.2? Ok. Richard. >

[PATCH 2/3] Vect peeling cost model

Wrap some frequently used snippets in separate functions. gcc/ChangeLog: 2017-04-26 Robin Dapp * tree-vect-data-refs.c (vect_update_misalignment_for_peel): Rename. (vect_get_peeling_costs_all_drs): Create function.

Re: Handle data dependence relations with different bases

"Bin.Cheng" writes: > On Wed, May 3, 2017 at 9:00 AM, Richard Sandiford > wrote: >> Index: gcc/tree-data-ref.h >> === >> --- gcc/tree-data-ref.h 2017-05-03 08:48:11.977015306

Re: [PATCH, GCC] Require c99_runtime for pr78622.c

And now with the patch. Best regards, Thomas On 04/05/17 10:36, Thomas Preudhomme wrote: Hi, Testcase gcc.c-torture/execute/pr78622.c uses %hhd printf specifier which was introduced in C99. C89 only recognizes h, l and L length specifier, it does not recognize hh length specifier. As such,

Re: Cap niter_for_unrolled_loop to upper bound

On Thu, May 4, 2017 at 8:47 AM, Richard Sandiford wrote: > For the reasons explained in PR77536, niter_for_unrolled_loop assumes 5 > iterations in the absence of profiling information, although it doesn't > increase beyond the estimate for the original loop. This

Re: [PATCH][AArch64] Update alignment for -mcpu=generic

On 12/04/17 13:58, Wilco Dijkstra wrote: > With -mcpu=generic the loop alignment is currently 4. All but one of the > supported cores use 8 or higher. Since using 8 provides performance gains > on several cores, it is best to use that by default. As discussed in [1], > the jump alignment has no

Re: [PATCH] Fix -fopt-info documentation in invoke.texi

On Thu, May 4, 2017 at 12:51 AM, Steve Ellcey wrote: > The description of the default behavour of -fopt-info in invoke.texi is > wrong. This patch fixes it. I also added a sentence to explicitly say > what is implied by the note that -fopt-info-vec-missed is the same as >

Re: [PATCH, GCC/ARM, Stage 1] Enable Purecode for ARMv8-M Baseline

On Thu, May 04, 2017 at 09:50:42AM +0100, Prakhar Bahuguna wrote: > > > > Otherwise ok. Please respin and test with an armhf thumb32 bootstrap > > and regression test run. > > > > regards > > Ramana > > I've respun this patch with the suggested changes, along with a new changelog > for docs:

Re: Fix bootstrap issue with gcc 4.1

> > > >Sure, I'm not questioning the patch, just wondering if we shouldn't > >improve > >store-merging further (we want to do it anyway for e.g. bitop adjacent > >operations etc.). > > We definitely want to do that. It should also 'nicely' merge with bswap for > gathering the load side of a

[PATCH 1/3] Vect peeling cost model

Some refactoring and definitions to use for (unknown) DR_MISALIGNMENT, gcc/ChangeLog: 2017-04-26 Robin Dapp * tree-data-ref.h (struct data_reference): Create DR_HAS_NEGATIVE_STEP. * tree-vectorizer.h (dr_misalignment): Define DR_MISALIGNMENT.

Cap niter_for_unrolled_loop to upper bound

For the reasons explained in PR77536, niter_for_unrolled_loop assumes 5 iterations in the absence of profiling information, although it doesn't increase beyond the estimate for the original loop. This left a hole in which the new estimate could be less than the old one but still greater than the

Re: [PATCH, GCC/ARM, Stage 1] Enable Purecode for ARMv8-M Baseline

On 02/05/2017 16:20:50, Ramana Radhakrishnan wrote: > On Tue, May 02, 2017 at 11:45:48AM +0100, Prakhar Bahuguna wrote: > > This patch adds support for purecode to ARMv8-M Baseline, in addition to the > > existing support for ARMv7-M and ARMv8-M Mainline. > > > > gcc/ChangeLog: > > > >

Misc. BRIG/HSAIL FE updates

Hi, In r247576 I committed the patch below, which has minor updates and fixes to the BRIG/HSAIL frontend. Index: gcc/brig/brigfrontend/brig-code-entry-handler.cc === --- gcc/brig/brigfrontend/brig-code-entry-handler.cc (revision

Re: [PATCH] Fix PR31130, remove strict-overflow handling from VRP

On Tue, 2 May 2017, Richard Biener wrote: > > The following patch removes (well, the patch only disables) > strict-overflow handling (and thus emitting -Wstrict-overflo diagnostics) > from VRP. > > I XFAILed three testcases (well, all three are really the same testcase), > removed on XFAIL

Re: [RFC] S/390: Alignment peeling prolog generation

Hi, > This one only works for known misalignment, otherwise it's overkill. > > OTOH if with some refactoring we can end up using a single cost model > that would be great. That is for the SAME_ALIGN_REFS we want to > choose the unknown misalignment with the maximum number of > SAME_ALIGN_REFS.

Re: [PATCH] Backport the recent ARM ABI patch to 6 (PR target/77728)

Ping. On Thu, Apr 27, 2017 at 12:44:42PM +0200, Marek Polacek wrote: > This is a backport of the ARM ABI fix, except that it doesn't change code, > only adds the ABI warning. > > So there were four changes, three of them are changing "else if (res < 0)" > to "if (res != 0)" and the fourth was

Re: [PATCH][AArch64] Set jump alignment to 4 for Cortex cores

On 12/04/17 13:50, Wilco Dijkstra wrote: > Set jump alignment to 4 for Cortex cores as it reduces codesize by 0.4% on > average > with no obvious performance difference. See original discussion of the > overheads > of various alignments: >

Re: Handle data dependence relations with different bases

On Thu, May 4, 2017 at 11:06 AM, Richard Sandiford wrote: > "Bin.Cheng" writes: >> On Wed, May 3, 2017 at 9:00 AM, Richard Sandiford >> wrote: >>> Index: gcc/tree-data-ref.h >>>

Re: [RFC][PATCH] Introduce -fdump*-folding

On 05/04/2017 12:40 PM, Richard Biener wrote: On Thu, May 4, 2017 at 11:22 AM, Martin Liška wrote: On 05/03/2017 12:12 PM, Richard Biener wrote: On Wed, May 3, 2017 at 10:10 AM, Martin Liška wrote: Hello Last release cycle I spent quite some time with

Re: Handle data dependence relations with different bases

On Wed, May 3, 2017 at 10:00 AM, Richard Sandiford wrote: > This patch tries to calculate conservatively-correct distance > vectors for two references whose base addresses are not the same. > It sets a new flag DDR_COULD_BE_INDEPENDENT_P if the dependence > isn't

Re: C PATCH to fix missing -Wlogical-op warning (PR c/80525)

On Thu, May 04, 2017 at 12:42:03PM +0200, Richard Biener wrote: > > +static tree > > +unwrap_c_maybe_const (tree *tp, int *walk_subtrees, void *) > > +{ > > + if (TREE_CODE (*tp) == C_MAYBE_CONST_EXPR) > > +{ > > + *tp = C_MAYBE_CONST_EXPR_EXPR (*tp); > > + /* C_MAYBE_CONST_EXPRs

Re: C PATCH to fix missing -Wlogical-op warning (PR c/80525)

On Thu, May 04, 2017 at 02:13:24PM +0200, Richard Biener wrote: > On Thu, May 4, 2017 at 2:11 PM, Marek Polacek wrote: > > On Thu, May 04, 2017 at 12:42:03PM +0200, Richard Biener wrote: > >> > +static tree > >> > +unwrap_c_maybe_const (tree *tp, int *walk_subtrees, void *) >

[PATCH] RISC-V: Unify indention in riscv.md

From: Kito Cheng This contains only whitespace changes. gcc/ChangeLog 2017-05-04 Kito Cheng * config/riscv/riscv.md: Unify indentation. --- gcc/ChangeLog | 4 + gcc/config/riscv/riscv.md | 559

[PATCH] RISC-V: Add -mstrict-align option

From: Andrew Waterman The RISC-V user ISA permits misaligned accesses, but they may trap and be emulated. That emulation software needs to be compiled assuming strict alignment. Even when strict alignment is not required, set SLOW_UNALIGNED_ACCESS based upon -mtune to avoid

Re: Handle data dependence relations with different bases

"Bin.Cheng" writes: > On Thu, May 4, 2017 at 11:06 AM, Richard Sandiford > wrote: >> "Bin.Cheng" writes: >>> On Wed, May 3, 2017 at 9:00 AM, Richard Sandiford >>> wrote: Index:

Re: Fix bootstrap issue with gcc 4.1

> On Thu, May 4, 2017 at 11:04 AM, Jan Hubicka wrote: > >> > > >> >Sure, I'm not questioning the patch, just wondering if we shouldn't > >> >improve > >> >store-merging further (we want to do it anyway for e.g. bitop adjacent > >> >operations etc.). > >> > >> We definitely want to

Re: [RFC][PATCH] Introduce -fdump*-folding

On Thu, May 4, 2017 at 11:22 AM, Martin Liška wrote: > On 05/03/2017 12:12 PM, Richard Biener wrote: >> >> On Wed, May 3, 2017 at 10:10 AM, Martin Liška wrote: >>> >>> Hello >>> >>> Last release cycle I spent quite some time with reading of IVOPTS pass >>> dump

Re: C PATCH to fix missing -Wlogical-op warning (PR c/80525)

On Thu, May 4, 2017 at 2:11 PM, Marek Polacek wrote: > On Thu, May 04, 2017 at 12:42:03PM +0200, Richard Biener wrote: >> > +static tree >> > +unwrap_c_maybe_const (tree *tp, int *walk_subtrees, void *) >> > +{ >> > + if (TREE_CODE (*tp) == C_MAYBE_CONST_EXPR) >> > +{ >>

Re: [PATCH, GCC/ARM, Stage 1] PR71607: Fix ICE when loading constant

On 03/05/2017 11:30:13, Richard Earnshaw (lists) wrote: > On 20/04/17 10:54, Prakhar Bahuguna wrote: > > [ARM] PR71607: Fix ICE when loading constant > > > > gcc/ChangeLog: > > > > 2017-04-18 Andre Vieira > > Prakhar Bahuguna

Re: C PATCH to fix missing -Wlogical-op warning (PR c/80525)

On Thu, May 4, 2017 at 12:27 PM, Marek Polacek wrote: > This PR points out a missing -Wlogical-op warning (unless you use -fwrapv). > > We end up calling warn_logical_operator with op_left that is > C_M_C_E != 0 > and op_right that is > a + 1 > > But make_range just cannot

Re: [PATCH 1/4][PR tree-optimization/78496] Don't simplify conditionals too early in VRP

On Wed, May 3, 2017 at 6:32 PM, Jeff Law wrote: > [ With the patch attached... ] > > > On 05/03/2017 10:31 AM, Jeff Law wrote: >> >> This is the first of 3-5 patches to address pr78496. >> >> The goal of these patches is to catch jump threads earlier in the pipeline >> to avoid

Re: Handle data dependence relations with different bases

On Thu, May 4, 2017 at 2:12 PM, Richard Biener wrote: > On Wed, May 3, 2017 at 10:00 AM, Richard Sandiford > wrote: >> This patch tries to calculate conservatively-correct distance >> vectors for two references whose base addresses are

Re: [0/67] Add wrapper classes for machine_modes

On 12/09/2016 05:48 AM, Richard Sandiford wrote: This series includes most of the changes in group C from: https://gcc.gnu.org/ml/gcc/2016-11/msg00033.html The idea is to add wrapper classes around machine_mode_enum for specific groups of modes, such as scalar integers, scalar floats,

Re: [PATCH] disable -Walloc-size-larger-than and -Wstringop-overflow for non-C front ends (PR 80545)

On 04/28/2017 04:02 PM, Martin Sebor wrote: The two options were included in -Wall and enabled for all front ends but only made to be recognized by the driver for the C family of compilers. That made it impossible to suppress those warnings when compiling code for those other front ends (like

Re: [PATCH] prevent -Wno-system-headers from suppressing -Wstringop-overflow (PR 79214)

On 05/04/2017 01:17 PM, Jeff Law wrote: On 01/25/2017 02:12 PM, Martin Sebor wrote: While putting together examples for the GCC 7 changes document I noticed that a few of the buffer overflow warnings issued by -Wstringop-overflow are defeated by Glibc's macros for string manipulation functions

[PATCH 09/12 rev1] [i386] Add patterns and predicates mcall-ms2sysv-xlogues

I've cleaned up the patterns and predicates as per your instructions, resulting in 74 less lines of code. Adding explicit insns to restore the stack pointer and pointer perform the "leave" (to the patterns restore_multiple_and_return and restore_multiple_leave_return, respectively) disambiguates

[PATCH 11/12 rev1] [i386] Add remainder of -mcall-ms2sysv-xlogues implementation

Now generates RTL with appropriate stack restore and leave patterns. Slightly cleaned up code that calculates the number of vector elements for clarity. Tests are good when rebased onto gcc-7_1_0-release as HEAD currently fails to bootstrap. Signed-off-by: Daniel Santos

[PATCH, rs6000] Fix vec_xl and vec_xst intrinsics for P8

Hi, In an earlier patch, I changed vec_xl and vec_xst to make use of new POWER9 instructions when loading or storing vector short/char values. In so doing, I failed to enable the existing instruction use for -mcpu=power8, so these were no longer considered valid by the compiler. Not good. This

[gomp4] Add front end support for the if_present clause with the update directive

This patch make the c, c++ and fortran FEs aware of the new OpenACC 2.5 if_present clause for the update directive. The ME and runtime support will come in a separate followup patch. Thomas, for some reason I'm seeing a couple of new UNRESOLVED tests for update-1.C. The c++ tests running with

Bump version namespace and remove _Rb_tree useless template parameter

Hi Here is the patch to remove the useless _Is_pod_comparator _Rb_tree_impl template parameter. As this is an ABI breaking change it is limited to the versioned namespace mode and the patch also bump the namespace version. Working on this patch I wonder if the

Re: [PATCH] prevent -Wno-system-headers from suppressing -Wstringop-overflow (PR 79214)

On 01/25/2017 02:12 PM, Martin Sebor wrote: While putting together examples for the GCC 7 changes document I noticed that a few of the buffer overflow warnings issued by -Wstringop-overflow are defeated by Glibc's macros for string manipulation functions like strncat and strncpy. While testing

Re: [PATCH] warn for reading past the end by library functions (PR 54924, 79234)

On 04/20/2017 04:49 PM, Martin Sebor wrote: PR libstdc++/54924 - Warn for std::string constructor with wrong size asks for a warning when constructing a std::string from a character array and a number of elements that's in excess of the number of elements. E.g., std::string s ("abc", 7);

[PATCH] Improve memory CSE

The following improves how we find the latest VUSE which definition dominates a PHI in get_continuation_for_phi. Rather than the very simplistic variant that requires one of the PHI args providing this we see if walking from any of the PHI args upwards will get us to such VUSE (with the

Re: [Patch, fortran] PR70071

On Thu, May 04, 2017 at 05:26:17PM +0200, Harald Anlauf wrote: > While trying to clean up my working copy, I found that the trivial > patch for the ICE-on-invalid as described in the PR regtests cleanly > for 7-release on i686-pc-linux-gnu. > > Here's the cleaned-up version (diffs attached). > >

Re: [PATCH] Small type_hash_canon improvement

On May 4, 2017 6:03:46 PM GMT+02:00, Jakub Jelinek wrote: >On Thu, May 04, 2017 at 05:54:47PM +0200, Richard Biener wrote: >> >2017-05-04 Jakub Jelinek >> > >> >* tree.c (next_type_uid): Change type to unsigned. >> >(type_hash_canon): Decrement back

Re: [PATCH] Small type_hash_canon improvement

On Thu, May 04, 2017 at 06:21:17PM +0200, Richard Biener wrote: > >the > >only other user after all calls free_node in a loop, so it is highly > >unlikely it would do anything there. > > > >If you mean the INTEGER_TYPE handling, then yes, I guess it could be > >done in free_node too and can move

Re: [PATCH][AArch64] Accept more addressing modes for PRFM

On 15/02/17 15:30, Richard Earnshaw (lists) wrote: On 15/02/17 15:03, Kyrill Tkachov wrote: Hi Richard, On 15/02/17 15:00, Richard Earnshaw (lists) wrote: On 03/02/17 17:12, Kyrill Tkachov wrote: Hi all, While evaluating Maxim's SW prefetch patches [1] I noticed that the aarch64 prefetch

Re: [PATCH 1/7] enhance -Wformat to detect quoting problems (PR 80280 et al.)

On 05/03/2017 03:27 PM, Joseph Myers wrote: On Wed, 3 May 2017, Martin Sebor wrote: Clarifying the comment is helpful, but a data structure involving putting the same character in both still doesn't make sense to me. It would seem a lot clearer to (for example) split "DFKTEV" into separate

[gomp5] Default to nonmonotonic schedule for dynamic/guided

Hi! OpenMP 5.0 will change the default, when neither monotonic nor nonmonotonic modifier is present on dynamic or guided schedule, it is now nonmonotonic, while in 4.5 the default was monotonic. 2017-05-04 Jakub Jelinek * omp-expand.c (expand_parallel_call,

[arm-embedded] [PATCH, GCC/x86 mingw32] Add configure option to force wildcard behavior on Windows

Hi, We've decided to apply the following patch to the ARM/embedded-7-branch as we did earlier for the ARM/embedded-6-branch. Patch attached for reference. Best regards, Thomas On 17/02/17 22:52, JonY wrote: On 02/17/2017 11:31 AM, Thomas Preudhomme wrote: Here you are: 2017-01-24 Thomas

Re: [PATCH GCC8][07/33]Offset validity check in address expression

On Wed, May 3, 2017 at 10:49 AM, Richard Biener wrote: > On Tue, May 2, 2017 at 7:06 PM, Bin.Cheng wrote: >> On Mon, Apr 24, 2017 at 11:34 AM, Richard Biener >> wrote: >>> On Tue, Apr 18, 2017 at 12:41 PM, Bin Cheng

Re: [PATCH GCC8][28/33]Don't count non-interger PHIs for register pressure

On Wed, Apr 26, 2017 at 3:32 PM, Bin.Cheng wrote: > On Wed, Apr 26, 2017 at 3:23 PM, Richard Biener > wrote: >> On Wed, Apr 26, 2017 at 3:37 PM, Bin.Cheng wrote: >>> On Wed, Apr 26, 2017 at 2:32 PM, Richard Biener >>>

[gomp5] Allow use_device_ptr clause on target data without map clauses

Hi! I've created branches/gomp-5_0-branch as a playground for OpenMP 5.0 implementation (so far mostly the TR4 - OpenMP Version 5.0 Preview 1 from last fall, but including later changes too). This is the first patch - OpenMP 5.0 will allow target data with just use_device_ptr clauses and no map

Re: [PR 80622] Treat const pools as initialized in SRA

On May 4, 2017 5:09:15 PM GMT+02:00, Martin Jambor wrote: >Hi, > >PR 80622 happens because when setting grp_write lazily, the code does >not acknowledge that constant pool bases come initialized and so >contain data even when not written to. The patch below fixes that but >it

[C++ PATCH[ global trees

This patch moves more things into the cp_global_trees array. 1) a set of identifiers, in particular initializer_list is no longer checked by strcmp or multiple get_identifier calls. 2) The anonymous namespace identifier 3) The global namespace and its name. committed to trunk. nathan --

Re: [PATCH GCC8][25/33]New loop constraint flags

On Wed, Apr 26, 2017 at 3:01 PM, Bin.Cheng wrote: > On Wed, Apr 26, 2017 at 2:27 PM, Richard Biener > wrote: >> On Tue, Apr 18, 2017 at 12:51 PM, Bin Cheng wrote: >>> Hi, >>> This patch adds new loop constraint flags marking

Re: [PATCH] Small type_hash_canon improvement

On May 4, 2017 4:43:45 PM GMT+02:00, Jakub Jelinek wrote: >Hi! > >While type_hash_canon in case of reusing an already existing type >ggc_frees the freshly created type, we still waste one type uid >for each such case, this patch attempts to avoid that. >Furthermore, for

PR80613

Hi, As mentioned in PR, the issue is that cddce1 marks the call to __builtin_strdup as necessary: marking necessary through .MEM_6 stmt p_7 = __builtin_strdup (); and since p_7 doesn't get added to worklist in propagate_necessity() because it's used only within free(), it's treated as "dead" and

Re: [PATCH] Small type_hash_canon improvement

On Thu, May 04, 2017 at 05:54:47PM +0200, Richard Biener wrote: > >2017-05-04 Jakub Jelinek > > > > * tree.c (next_type_uid): Change type to unsigned. > > (type_hash_canon): Decrement back next_type_uid if > > freeing a type node with the highest TYPE_UID. For

[PATCH] c/c++: Add fix-it hints for suggested missing #includes

As of r247522, fix-it-hints can suggest the insertion of new lines. This patch uses this to implement a new "maybe_add_include_fixit" function in c-common.c and uses it in the two places where the C and C++ frontend can suggest missing #include directives. [1] The idea is that the user can then

Re: [wwwdocs] gcc-8/porting_to.html

Great, thanks. I'll go and commit the corresponding wwwdocs change. Best regards, Thomas On 04/05/17 12:03, JonY wrote: On 03/23/2017 10:47 AM, Thomas Preudhomme wrote: Ack. Please find updated patch as per suggestions. Best regards, Thomas I've applied the changes to GCC 8 trunk as

[PR 80622] Treat const pools as initialized in SRA

Hi, PR 80622 happens because when setting grp_write lazily, the code does not acknowledge that constant pool bases come initialized and so contain data even when not written to. The patch below fixes that but it also puts a test for pre-initialization into a special function, uses it at all

Re: [PATCH GCC8][11/33]New interfaces for tree affine

On Mon, Apr 24, 2017 at 11:43 AM, Richard Biener wrote: > On Tue, Apr 18, 2017 at 12:43 PM, Bin Cheng wrote: >> Hi, >> This patch adds three simple interfaces for tree affine which will be used in >> cost computation later. >> >> Is it OK? > > >

Re: [PATCH GCC8][13/33]Rewrite cost computation of ivopts

On Wed, Apr 26, 2017 at 11:18 AM, Richard Biener wrote: > On Wed, Apr 26, 2017 at 12:12 PM, Bin.Cheng wrote: >> On Wed, Apr 26, 2017 at 10:50 AM, Richard Biener >> wrote: >>> On Tue, Apr 18, 2017 at 12:43 PM, Bin

Re: [wwwdocs] gcc-8/porting_to.html

Committed with the suggested changes (see attachment for reference). Thanks. Best regards, Thomas On 23/03/17 06:47, Gerald Pfeifer wrote: Hi Thomas, On Wed, 22 Mar 2017, Thomas Preudhomme wrote: Is this ok for wwwdocs once [1] is committed in GCC 8 cycle? + GCC on Microsoft Windows

Re: [PATCH 1/4][PR tree-optimization/78496] Don't simplify conditionals too early in VRP

On 05/04/2017 04:59 AM, Richard Biener wrote: I think this is a hack ;) Basically the issue is that jump-threading uses ASSERT_EXPRs at all (which are an implementation detail of VRP). As far as I understand it does that because VRP can do "fancy" things and create ASSERT_EXPRs that do not

Re: [PATCH, GCC/ARM 2/2, ping] Allow combination of aprofile and rmprofile multilibs

Now that stage1 is open, ping? Best regards, Thomas On 03/01/17 17:23, Thomas Preudhomme wrote: Ping? Best regards, Thomas On 06/12/16 11:35, Thomas Preudhomme wrote: Ping? *** gcc/ChangeLog *** 2016-10-03 Thomas Preud'homme * config.gcc: Allow

[Patch, fortran] PR70071

While trying to clean up my working copy, I found that the trivial patch for the ICE-on-invalid as described in the PR regtests cleanly for 7-release on i686-pc-linux-gnu. Here's the cleaned-up version (diffs attached). 2017-05-04 Harald Anlauf PR fortran/70071

[PATCH 1/2] C++ template type diff printing

This patch kit implements two new options to make it easier to read diagnostics involving mismatched template types: -fdiagnostics-show-template-tree and -fno-elide-type. It adds two new formatting codes: %H and %I which are equivalent to %qT, but are to be used together for type comparisons

Re: [PATCH] Output DIEs for outlined OpenMP functions in correct lexical scope

Ahem... I forgot to note that: I have bootstrapped and regression tested my patch on x86_64-pc-linux-gnu. Kevin On Thu, 4 May 2017 17:45:51 -0700 Kevin Buettner wrote: > Consider the following OpenMP program: > > void foo (int a1) {} > > int > main (void) >

Re: [PATCH] prevent -Wno-system-headers from suppressing -Wstringop-overflow (PR 79214)

On 05/04/2017 03:09 PM, Martin Sebor wrote: On 05/04/2017 01:17 PM, Jeff Law wrote: On 01/25/2017 02:12 PM, Martin Sebor wrote: While putting together examples for the GCC 7 changes document I noticed that a few of the buffer overflow warnings issued by -Wstringop-overflow are defeated by

Re: [PATCH] Allow building GCC with PTX offloading even without CUDA being installed (gcc and nvptx-tools patches)

Hi! On Wed, 3 May 2017 11:00:14 +0200, Jakub Jelinek wrote: > On Sat, Jan 21, 2017 at 03:50:43PM +0100, Thomas Schwinge wrote: > > > In order to configure gcc to load libcuda.so.1 dynamically, > > > one has to either configure it --without-cuda-driver, or without > > >

Re: [PATCH][ARM] Update max_cond_insns settings

Richard Earnshaw wrote: > -  5, /* Max cond insns.  */ > +  2, /* Max cond insns.  */ > This parameter is also used for A32 code.  Is that really the right > number there as well? Yes, this parameter has always been

Re: [PATCH] Fix -fopt-info documentation in invoke.texi

On Thu, 2017-05-04 at 12:24 +0200, Richard Biener wrote: > > > > OK to checkin? > Ok for trunk and branches. > > Richard. I just realized there is a problem/inconsistency with my patch. The ChangeLog says I am changing invoke.texi but the change is actually to optinfo.texi. It looks like

Re: PR80613

On 05/04/2017 10:00 AM, Prathamesh Kulkarni wrote: Hi, As mentioned in PR, the issue is that cddce1 marks the call to __builtin_strdup as necessary: marking necessary through .MEM_6 stmt p_7 = __builtin_strdup (); and since p_7 doesn't get added to worklist in propagate_necessity() because it's

Re: [PATCH GCC8][17/33]Treat complex cand step as invriant expression

On Wed, May 3, 2017 at 2:43 PM, Richard Biener wrote: > On Tue, Apr 18, 2017 at 12:46 PM, Bin Cheng wrote: >> Hi, >> We generally need to compute cand step in loop preheader and use it in loop >> body. >> Unless it's an SSA_NAME of constant

[C++ PATCH] fix constrait diag

Changing '%qE %S' to '%' is missing a % and ICES constraints/req4. Fixed thusly. -- Nathan Sidwell 2017-05-04 Nathan Sidwell * constraint.cc (diagnose_check_constraint): Fix %E thinko. Index: constraint.cc ===

Re: PR80613

On 05/04/2017 11:52 AM, Martin Sebor wrote: On 05/04/2017 10:00 AM, Prathamesh Kulkarni wrote: Hi, As mentioned in PR, the issue is that cddce1 marks the call to __builtin_strdup as necessary: marking necessary through .MEM_6 stmt p_7 = __builtin_strdup (); and since p_7 doesn't get added to

Re: Handle data dependence relations with different bases

Richard Biener writes: > On Thu, May 4, 2017 at 2:12 PM, Richard Biener > wrote: >> On Wed, May 3, 2017 at 10:00 AM, Richard Sandiford >> wrote: >>> This patch tries to calculate conservatively-correct

Re: [PATCH, rs6000] Avoid vectorizing versioned copy loops with vectorization factor 2

...only without the typo in the ChangeLog below... > On May 3, 2017, at 2:43 PM, Bill Schmidt wrote: > > Hi, > > We recently became aware of some poor code generation as a result of > unprofitable (for POWER) loop vectorization. When a loop is simply copying >

[PATCH OBVIOUS]Remove unused structure field inv_expr

Hi, This patch removed unused field inv_expr in struct cost_pair left over by previous refactoring. Build on x86_64. Applying as obvious. Thanks, bin 2017-05-04 Bin Cheng * tree-ssa-loop-ivopts.c (struct cost_pair): Remove field inv_expr which is not used

Re: [PATCH 5/7] clean up quoting problems - c-family (PR 80280 et al.)

On 05/03/2017 09:56 AM, Joseph Myers wrote: On Tue, 2 May 2017, Martin Sebor wrote: + inform (loc, "in the expansion of concept %qE %qS", check, sub); Are you sure about this (two consecutive quoted strings, open quote of %qS following closing quote of %qE) or should it be a single

[PATCH] Fix-it hints for -Wimplicit-fallthrough

As of r247522, fix-it-hints can suggest the insertion of new lines. This patch updates -Wimplicit-fallthrough to provide suggestions with fix-it hints, showing the user where to insert "break;" or fallthrough attributes. For example: test.c: In function 'set_x': test.c:15:9: warning: this

[PATCH 2/2] Use %H and %I throughout C++ frontend.

This is the second half of the kit, which uses %H and %I throughout the C++ frontend whenever describing type mismatches between a pair of %qT. gcc/cp/ChangeLog: * call.c (print_conversion_rejection): Replace pairs of %qT with %H and %I in various places.

[PATCH] Output DIEs for outlined OpenMP functions in correct lexical scope

Consider the following OpenMP program: void foo (int a1) {} int main (void) { static int s1 = -41; int i1 = 11, i2; for (i2 = 1; i2 <= 2; i2++) { int pass = i2; #pragma omp parallel num_threads (2) firstprivate (i1) {

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