fenv.h builtins

Hello, this is now the complete list of C99 fenv.h functions. I tried to be rather conservative, only fegetround is pure, and functions that "raise an exception" (in the fenv sense, not the C++ one) do not get nothrow,leaf. We can always change that afterwards. I am not convinced there is

Re: [PATCH][Testsuite] Use user defined memmove in gcc.c-torture/execute/builtins/memops-asm-lib.c

Hi Martin, On 23/06/17 16:27, Martin Sebor wrote: On 06/23/2017 03:19 AM, Renlin Li wrote: Hi all, After the change r249278. bcopy is folded into memmove. And in newlib aarch64 memmove implementation, it will call memcpy in certain conditions. The memcpy defined in memops-asm-lib.c will abort

Re: [committed] Fix -Werror=class-memaccess failures in jit testsuite (PR jit/81144)

On 06/20/2017 06:54 PM, David Malcolm wrote: On Tue, 2017-06-20 at 17:15 -0600, Martin Sebor wrote: On 06/20/2017 03:25 PM, David Malcolm wrote: This patch fixes a couple of failures of the form: error: 'void* memset(void*, int, size_t)' clearing an object of non-trivial type 'struct

Re: C/C++ PATCH to add __typeof_noqual (PR c/65455, c/39985)

On Fri, 23 Jun 2017, Marek Polacek wrote: > You'll also see that I dropped all qualifiers for __auto_type. But I actually > couldn't trigger the > init_type = c_build_qualified_type (init_type, TYPE_UNQUALIFIED); > line in c_parser_declaration_or_fndef (even when running the whole testsuite) >

Re: [PATCH GCC][2/6]Compute available register for each register classes

On 05/12/2017 05:27 AM, Bin Cheng wrote: > Hi, > Currently available/clobber registers are computed only for GENERAL_REGS, this > patch extends it for all reg pressure classes. It also updates existing uses > in various places. > > Bootstrap and test on x86_64 and AArch64. Is it OK? > >

Re: [PATCH GCC][1/6]Compute type mode and register pressure class mapping

On 05/12/2017 05:27 AM, Bin Cheng wrote: > Hi, > This will be a patch series implementing an interface which estimates register > pressure on tree ssa and uses the information in predictive common > optimization. > This the first patch computing map from type modes to register pressure >

Re: [PATCH GCC][4/6]Simple patch skips single element component

On 05/12/2017 05:28 AM, Bin Cheng wrote: > Hi, > This is a simple patch discarding simple element components earlier in > predcom. > Bootstrap and test on x86_64 and AArch64, is it OK? > > Thanks, > bin > 2017-05-10 Bin Cheng > > * tree-predcom.c

Re: C/C++ PATCH to add __typeof_noqual (PR c/65455, c/39985)

On Fri, Jun 23, 2017 at 04:46:06PM +0200, Marek Polacek wrote: > +++ gcc/c-family/c-common.c > @@ -433,6 +433,8 @@ const struct c_common_resword c_common_reswords[] = >{ "__transaction_cancel", RID_TRANSACTION_CANCEL, 0 }, >{ "__typeof", RID_TYPEOF, 0 }, >{

Re: [committed] Fix -fstack-check with really big frames on aarch64

On 06/23/2017 05:15 AM, Christophe Lyon wrote: > Hi, > > A minor comment at this stage: this new test fails to compile for > thumb-1 targets: > testsuite/gcc.c-torture/compile/20031023-1.c:27:1: sorry, > unimplemented: -fstack-check=specific for Thumb-1 > > for instance on

Re: [PATCH] Fix PR71815 (SLSR misses PHI opportunities)

Hi, Here's version 2 of the patch to fix the missed SLSR PHI opportunities, addressing Richard's comments. I've repeated regstrap and SPEC testing on powerpc64le-unknown-linux-gnu, again showing the patch as neutral with respect to performance. Is this ok for trunk? Thanks for the review!

Re: [PATCH] Avoid UB in the Ada FE

> Another option would be to change atomic_access_required_p to add > *sync = false; > before the first return, or to initialize bool sync = false; at the > definition. Yes, let's do the initialization at the definition (no need to retest). -- Eric Botcazou

Re: [PATCH, GCC/ARM, Stage 1] Rename FPSCR builtins to correct names

Hi Thomas, On 23/06/17 16:48, Thomas Preudhomme wrote: Hi Kyrill, On 10/04/17 15:01, Kyrill Tkachov wrote: Hi Prakhar, Sorry for the delay, On 22/03/17 10:46, Prakhar Bahuguna wrote: The GCC documentation in section 6.60.8 ARM Floating Point Status and Control Intrinsics states that the

Re: [PATCH] reorganize block/string move/compare expansions out of rs6000.c

On Thu, Jun 22, 2017 at 04:01:54PM -0500, Aaron Sawdey wrote: > This patch moves about 1400 lines of code for various block and string > compare/move/zero expansions out of rs6000.c into a new file  > rs6000-string.c. Segher had asked me to do this before I go adding new > code here. > >

C/C++ PATCH to add __typeof_noqual (PR c/65455, c/39985)

This patch adds a variant of __typeof, called __typeof_noqual. As the name suggests, this variant always drops all qualifiers, not just when the type is atomic. This was discussed several times in the past, see e.g. or

Re: [PATCH] Fix more PR80928 fallout

On 06/23/2017 05:39 AM, Richard Biener wrote: > > SLP induction vectorization runs into the issue that it remembers > pointers to PHI nodes in the SLP tree during analysis. But those > may get invalidated by loop copying (for prologue/epilogue peeling > or versioning) as the low-level CFG helper

Re: [PATCH,rs6000] Add IEEE 128 support for several existing built-in functions

Hi Kelvin, On Wed, Jun 21, 2017 at 04:42:46PM -0600, Kelvin Nilsen wrote: > This patch adds IEEE 128 support to the existing scalar_insert_exp, > scalar_extract_exp, scalar_extract_sig, scalar_test_data_class, and > scalar_test_neg rs6000 built-in functions. Test programs are provided > to

Re: [PATCH][Testsuite] Use user defined memmove in gcc.c-torture/execute/builtins/memops-asm-lib.c

On 06/23/2017 03:19 AM, Renlin Li wrote: > Hi all, > > After the change r249278. bcopy is folded into memmove. And in newlib > aarch64 > memmove implementation, it will call memcpy in certain conditions. > The memcpy defined in memops-asm-lib.c will abort when the test is running. > > In this

Re: [PATCH][Testsuite] Use user defined memmove in gcc.c-torture/execute/builtins/memops-asm-lib.c

On 06/23/2017 03:19 AM, Renlin Li wrote: Hi all, After the change r249278. bcopy is folded into memmove. And in newlib aarch64 memmove implementation, it will call memcpy in certain conditions. The memcpy defined in memops-asm-lib.c will abort when the test is running. In this case, I defined

Re: [PATCH] handling address mode changes inside extract_bit_field

On 06/08/2017 11:07 AM, Jim Wilson wrote: > I've got a testcase to add for this patch. Sorry about the delay, I > took some time off to deal with a medical problem. > > This was tested with and without the extract_bit_field patch. The > testcase fails without the patch and works with the patch.

libgo patch committed: Don't crash if no p in kickoff

In libgo the kickoff function for g0 can be invoked without a p, for example from mcall(exitsyscall0) in exitsyscall after exitsyscall has cleared the p field. The assignment gp.param = nil will invoke a write barrier. If gp.param is not already nil, this will require a p. Avoid the problem for a

Re: [PATCH, GCC/ARM, Stage 1] Rename FPSCR builtins to correct names

Hi Kyrill, On 10/04/17 15:01, Kyrill Tkachov wrote: Hi Prakhar, Sorry for the delay, On 22/03/17 10:46, Prakhar Bahuguna wrote: The GCC documentation in section 6.60.8 ARM Floating Point Status and Control Intrinsics states that the FPSCR register can be read and written to using the

Go patch committed: Add go:notinheap magic comment

This patch to the Go frontend implements go:notinheap as the gc compiler does. A type marked as go:notinheap may not live in the heap, and does not require a write barrier. Struct and array types that incorporate notinheap types are themselves notinheap. Allocating a value of a notinheap type on

Re: [committed] Fix -fstack-check with really big frames on aarch64

On 06/22/2017 11:28 AM, Jakub Jelinek wrote: > On Thu, Jun 22, 2017 at 11:21:15AM -0600, Jeff Law wrote: >> +2017-06-22 Jeff Law >> + >> +* gcc.c-torture/compile/stack-check-1.c: New test. >> + >> 2016-06-22 Richard Biener >> >> *

Re: C/C++ PATCH to add __typeof_noqual (PR c/65455, c/39985)

On Fri, Jun 23, 2017 at 04:48:33PM +0200, Jakub Jelinek wrote: > On Fri, Jun 23, 2017 at 04:46:06PM +0200, Marek Polacek wrote: > > +++ gcc/c-family/c-common.c > > @@ -433,6 +433,8 @@ const struct c_common_resword c_common_reswords[] = > >{ "__transaction_cancel", RID_TRANSACTION_CANCEL, 0 },

Re: [PING][PATCH] Move the check for any_condjump_p from sched-deps to target macros

On 05/10/2017 10:46 PM, Hurugalawadi, Naveen wrote: > Hi, > >>> Doesn't this avoid calling the target hook in cases where it used to >>> call it before? > Yes. Thanks for pointing it out. > >>> Consider a conditional jump inside a parallel that is not a single set. > Please find attached the

Minor update to contrib.texi

Steven contacted me about getting his contribution mentioned. While we no longer use enquire to generate float.h adding an entry for Steven's work seemed reasonable. Installed on the trunk. Jeff diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 327d809a87c..130fa37ad34 100644 ---

Re: [C++ Patch] PR 62315 ("do not print typename in diagnostic if the original code does not have it")

OK. On Fri, Jun 2, 2017 at 4:35 AM, Paolo Carlini wrote: > Hi, > > a while ago Manuel noticed that printing 'typename' in error messages about > missing 'typename' can be confusing. That seems easy to fix, in fact we > already handle correctly a similar situation in

Re: [PATCH, ARM/AArch64] drop aarch32 support for falkor/qdf24xx

On Mon, Jun 12, 2017 at 3:40 AM, James Greenhalgh wrote: > In both the original patch, and the backport, you're modifying the > AArch64 options here. I'd expect the edits to be to the AArch32 options > (these start somewhere around line 15,000). Yes, I screwed this up.

libgo patch committed: Don't require GOROOT

This patch to libgo changes the libgo version of the go tool to not require GOROOT. GOROOT is only required for the gc toolchain, and is not necessary for gccgo. This fixes running the gotools testsuite in a GCC build directory when using a --prefix for which you've never run `make install`.

[PATCH][ARM] Fix static analysis warnings in arm backend

This patch cleans up warning messages due to unused variables and overly complicated loop structures. Okay for trunk? 2017-03-30 Michael Collison PR target/68535 * config/arm/arm.c (gen_ldm_seq): Remove last unnecessary set of base_reg

libgo patch RFC: Test the runtime package with the go tool

Many of the tests of the runtime package require invoking the go tool, and therefore are not run when testing libgo. This patch to gotools/Makefile.am adds an additional test of the runtime package on a native system, this time letting it run the newly built go tool. This provides significantly

Re: [PATCH][ARM] Fix static analysis warnings in arm backend

On 6/23/17, Michael Collison wrote: > This patch cleans up warning messages due to unused variables and overly > complicated loop structures. > > Okay for trunk? > > 2017-03-30 Michael Collison > > PR target/68535 > *

RE: [PATCH][ARM] Fix static analysis warnings in arm backend

Hi Eric, The warnings are listed in the PR here: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68535 Regards, Michael Collison -Original Message- From: Eric Gallager [mailto:eg...@gwmail.gwu.edu] Sent: Friday, June 23, 2017 2:37 PM To: Michael Collison Cc:

Re: [PATCH v3, rs6000] Add vec_reve support

Hi Carl, On Fri, Jun 23, 2017 at 02:59:05PM -0700, Carl Love wrote: > +(define_expand "altivec_vreve2" > + [(set (match_operand:VEC_A 0 "register_operand" "=v") > + (unspec:VEC_A [(match_operand:VEC_A 1 "register_operand" "v")] > + UNSPEC_VREVEV))] > + "TARGET_ALTIVEC" >

libgo patch committed: Complete defer handling in CgocallBackDone

This patch to libgo completes the handling of a cgo-generated defer in CgocallBackDone. When C code calls a Go function, it actually calls a function generated by cgo. That function is written in Go, and, among other things, it calls the real Go function like this: CgocallBack() defer

[PATCH v3, rs6000] Add vec_reve support

GCC maintainers: I have updated the patch per the comments from Segher. The vec_reve builtin does work on Power 7, the test file was fixed to run on Power 7 as well. The updated patch was tested on on powerpc64le-unknown-linux-gnu (Power 8 LE), powerpc64-unknown-linux-gnu(Power 8 BE),

libgo patch committed: Align siginfo argument to waitid

Backport a patch just committed to gc tip. There is a bug report on the golang-dev mailing list (https://groups.google.com/d/msg/golang-dev/sDg-t1_DPw0/-AJmLxgPBQAJ) in which waitid running on MIPS returns EFAULT, and this patch may fix the problem. Bootstrapped and ran Go tests on

Re: [nvptx, PATCH, 1/3] Add generic v2 vector mode support

On 06/06/2017 07:02 AM, Tom de Vries wrote: > Hi, > > this patch adds generic v2 vector mode support for nvptx. > > Tested in nvptx mainkernel mode and x86_64 accelerator mode. > > OK for trunk? > > Thanks, > - Tom > > 0001-Add-generic-v2-vector-mode-support.patch > > > Add generic v2

Re: [PATCH], PR target/80510, Optimize 32-bit offsettable memory references on power7/power8

On Thu, Jun 22, 2017 at 06:54:52PM -0400, Michael Meissner wrote: > This patch implements the necessary move and peephole support for 32-bit ISA > 2.05/2.06 (power7/power8) targets, so that the compiler can optimize: > > load FPR, move FPR, ALTIVEC > move ALTIVEC, FPR

Re: [PATCH] Fix expand_builtin_atomic_fetch_op for pre-op (PR80902)

On Thu, Jun 22, 2017 at 10:59:05PM -0600, Jeff Law wrote: > On 05/28/2017 06:31 AM, Segher Boessenkool wrote: > > __atomic_add_fetch adds a value to some memory, and returns the result. > > If there is no direct support for this, expand_builtin_atomic_fetch_op > > is asked to implement this as

[PATCH/AARCH64] Improve cost of arithmetic instructions with shift/extend on ThunderX2T99

Hi, This patch is similar to what I did for ThunderX where I increase the costs of these instructions slightly to point out there is a slight cost to using them over using the two instructions. OK? Bootstrapped and tested on aarch64-linux-gnu with no regressions. This gave ~2% on SPEC CPU 2006

Re: [PATCH] PR ipa/81185, Improve naming of target_clone cloned function names

On 06/22/2017 07:58 PM, Michael Meissner wrote: > he June 19th, 2017 change from Martin Liska , made the > target_clones support more usable, in that it it changed the external name > from > being the default function to being the ifunc handler. This means that calls > from

Re: [nvptx, PATCH, 2/3 ] Add v2si support

On 06/06/2017 07:05 AM, Tom de Vries wrote: > Hi, > > this patch adds v2si support to the nvptx target. > > Tested in nvptx mainkernel mode and x86_64 accelerator mode. > > OK for trunk? > > Thanks, > - Tom > > > 0002-Add-v2si-support.patch > > > Add v2si support > > 2017-06-06 Tom de

Re: [nvptx, PATCH, 3/3] Add v2di support

On 06/06/2017 07:12 AM, Tom de Vries wrote: > Hi, > > this patch adds v2di support to the nvptx target. This allows us to > generate 128-bit loads and stores. > > Tested in nvptx mainkernel mode and x86_64 accelerator mode. > > OK for trunk? > > Thanks, > - Tom > >

Re: [libcilkrts] Fix 64-bit SPARC/Linux port

From: Eric Botcazou Date: Fri, 23 Jun 2017 19:34:54 +0200 > Since libcilkrts was ported to the SPARC architecture by Rainer, running the > testsuite on SPARC/Linux in 64-bit mode with sufficiently high parallelim has > resulted in an almost guaranteed kernel panic. >

[libcilkrts] Fix 64-bit SPARC/Linux port

Since libcilkrts was ported to the SPARC architecture by Rainer, running the testsuite on SPARC/Linux in 64-bit mode with sufficiently high parallelim has resulted in an almost guaranteed kernel panic. Fixed thusly, tested on SPARC64/Linux and SPARC/Solaris., applied to mainline and 7 branch.

Re: [PATCH, GCC/ARM, Stage 1] Rename FPSCR builtins to correct names

Hi Thomas, On 23 June 2017 at 17:48, Thomas Preudhomme wrote: > Hi Kyrill, > > > On 10/04/17 15:01, Kyrill Tkachov wrote: >> >> Hi Prakhar, >> Sorry for the delay, >> >> On 22/03/17 10:46, Prakhar Bahuguna wrote: >>> >>> The GCC documentation in section 6.60.8 ARM

Re: [PATCH] Fix expand_builtin_atomic_fetch_op for pre-op (PR80902)

On 06/23/2017 11:44 AM, Segher Boessenkool wrote: > On Thu, Jun 22, 2017 at 10:59:05PM -0600, Jeff Law wrote: >> On 05/28/2017 06:31 AM, Segher Boessenkool wrote: >>> __atomic_add_fetch adds a value to some memory, and returns the result. >>> If there is no direct support for this,

C++ PATCH for c++/79056, C++17 ICE with invalid template-id

In this testcase, in C++17 mode after parsing the template-id fails, we try to treat the template-name as a class template deduction placeholder, producing an auto type, and then we try to take its TREE_TYPE when calling cp_parser_check_for_invalid_type_id, which doesn't work because it's a type,

Re: [PR80693] drop value of parallel SETs dropped by combine

On Jun 22, 2017, Segher Boessenkool wrote: > On Thu, Jun 22, 2017 at 03:21:01AM -0300, Alexandre Oliva wrote: >> On Jun 8, 2017, Segher Boessenkool wrote: >> >> > [ I missed this patch the first time around; please cc: me to prevent this

Re: [PATCH] fold a * (a > 0 ? 1 : -1) to abs(a) and related optimizations

Forgot the patch On Fri, Jun 23, 2017 at 8:59 PM, Andrew Pinski wrote: > Hi, > I saw this on llvm's review site (https://reviews.llvm.org/D34579) > and I thought why not add it to GCC. I expanded more than what was > done on the LLVM patch. > > I added the following

[PATCH] fold a * (a > 0 ? 1 : -1) to abs(a) and related optimizations

Hi, I saw this on llvm's review site (https://reviews.llvm.org/D34579) and I thought why not add it to GCC. I expanded more than what was done on the LLVM patch. I added the following optimizations: Transform X * (X > 0 ? 1 : -1) into ABS(X). Transform X * (X >= 0 ? 1 : -1) into ABS(X).

Re: [Neon intrinsics] Literal vector construction through vcombine is poor

On 23/06/17 00:10, Michael Collison wrote: > Richard, > > I reworked the patch and retested on big endian as well as little. The > original code was performing two swaps in the big endian case which works out > to no swaps at all. > > I also updated the ChangeLog per your comments. Okay for

RE: [PATCH] [Aarch64] Variable shift count truncation issues

Fixed the "nitpick" issues pointed out by James. Okay for trunk? 2017-05-22 Kyrylo Tkachov Michael Collison PR target/70119 * config/aarch64/aarch64.md (*aarch64__reg_3_mask1): New pattern.

Re: libgo patch committed: Fix ptrace implementation on MIPS

Hi, On 22/06/17 20:59, Ian Lance Taylor wrote: > James, any thoughts? > > Ian > > On Thu, Jun 22, 2017 at 12:55 AM, Andreas Schwab wrote: >> On Jun 21 2017, Ian Lance Taylor wrote: >> >>> Index: libgo/sysinfo.c >>>

Re: Avoid generating useless range info

On Fri, Jun 23, 2017 at 12:24:25PM +0200, Richard Biener wrote: > > void > > set_nonzero_bits (tree name, const wide_int_ref ) > > { > > gcc_assert (!POINTER_TYPE_P (TREE_TYPE (name))); > > if (SSA_NAME_RANGE_INFO (name) == NULL) > > set_range_info (name, VR_RANGE, > >TYPE_MIN_VALUE

Re: [PATCH] [Aarch64] Variable shift count truncation issues

On Fri, Jun 23, 2017 at 10:27:55AM +0100, Michael Collison wrote: > Fixed the "nitpick" issues pointed out by James. Okay for trunk? > > I have a few comments below, which are closer to nitpicking than structural > > issues with the patch. > > > > With those fixed, this is OK to commit. This

[Patch AArch64 docs] Document the RcPc extension

Hi, Andrew pointed out that I did not document the new architecture extension flag I added the RcPc iextension. This was intentional, as enablihg the rcpc extension does not change GCC code generation, and is just an assembler flag. But for completeness, here is documentation for the new option.

Re: Avoid generating useless range info

On Fri, Jun 23, 2017 at 10:59 AM, Aldy Hernandez wrote: > > > On Fri, Jun 16, 2017 at 4:00 AM, Richard Biener > wrote: >> >> On Wed, Jun 14, 2017 at 6:41 PM, Aldy Hernandez wrote: >> > Hi! >> > >> > As discovered in my range class

Re: [PATCH GCC][11/13]Annotate partition by its parallelism execution type

And the patch. On Fri, Jun 23, 2017 at 11:24 AM, Bin.Cheng wrote: > On Tue, Jun 20, 2017 at 12:34 PM, Richard Biener > wrote: >> On Tue, Jun 20, 2017 at 11:18 AM, Bin.Cheng wrote: >>> On Fri, Jun 16, 2017 at 11:10 AM,

Re: [PATCH GCC][12/13]Workaround reduction statements for distribution

On Tue, Jun 20, 2017 at 12:36 PM, Richard Biener wrote: > On Tue, Jun 20, 2017 at 11:20 AM, Bin.Cheng wrote: >> On Fri, Jun 16, 2017 at 6:15 PM, Bin.Cheng wrote: >>> On Fri, Jun 16, 2017 at 11:21 AM, Richard Biener >>>

Re: [PATCH GCC][11/13]Annotate partition by its parallelism execution type

On Tue, Jun 20, 2017 at 12:34 PM, Richard Biener wrote: > On Tue, Jun 20, 2017 at 11:18 AM, Bin.Cheng wrote: >> On Fri, Jun 16, 2017 at 11:10 AM, Richard Biener >> wrote: >>> On Mon, Jun 12, 2017 at 7:03 PM, Bin

Re: [PATCH GCC][13/13]Distribute loop with loop versioning under runtime alias check

On Tue, Jun 20, 2017 at 10:22 AM, Bin.Cheng wrote: > On Mon, Jun 12, 2017 at 6:03 PM, Bin Cheng wrote: >> Hi, >> This is the main patch rewriting loop distribution in order to handle hmmer. >> It improves loop distribution by versioning loop under

[PATCH][Testsuite] Use user defined memmove in gcc.c-torture/execute/builtins/memops-asm-lib.c

Hi all, After the change r249278. bcopy is folded into memmove. And in newlib aarch64 memmove implementation, it will call memcpy in certain conditions. The memcpy defined in memops-asm-lib.c will abort when the test is running. In this case, I defined a user memmove function which by pass the

[C++ Patch PING] (was: [C++ Patch] PR 62315 ("do not print typename in diagnostic if the original code does not have it"))

Hi, gently pingning this: On 02/06/2017 10:35, Paolo Carlini wrote: Hi, a while ago Manuel noticed that printing 'typename' in error messages about missing 'typename' can be confusing. That seems easy to fix, in fact we already handle correctly a similar situation in grokdeclarator. Tested

Re: [PATCH GCC][01/13]Introduce internal function IFN_LOOP_DIST_ALIAS

On Mon, Jun 12, 2017 at 6:02 PM, Bin Cheng wrote: > Hi, > I was asked by upstream to split the loop distribution patch into small ones. > It is hard because data structure and algorithm are closely coupled together. > Anyway, this is the patch series with smaller patches.

Re: [PATCH GCC][09/13]Simply cost model merges partitions with the same references

On Mon, Jun 19, 2017 at 4:20 PM, Richard Biener wrote: > On Mon, Jun 19, 2017 at 3:40 PM, Bin.Cheng wrote: >> On Wed, Jun 14, 2017 at 2:54 PM, Richard Biener >> wrote: >>> On Mon, Jun 12, 2017 at 7:03 PM, Bin Cheng

Re: [PATCH GCC][10/13]Compute and cache data dependence relation

On Tue, Jun 20, 2017 at 12:32 PM, Richard Biener wrote: > On Tue, Jun 20, 2017 at 11:15 AM, Bin.Cheng wrote: >> On Fri, Jun 16, 2017 at 11:03 AM, Richard Biener >> wrote: >>> On Mon, Jun 12, 2017 at 7:03 PM, Bin

Re: [PATCH GCC][08/13]Refactoring structure partition for distribution

On Mon, Jun 19, 2017 at 4:18 PM, Richard Biener wrote: > On Mon, Jun 19, 2017 at 3:37 PM, Bin.Cheng wrote: >> On Wed, Jun 14, 2017 at 2:47 PM, Richard Biener >> wrote: >>> On Mon, Jun 12, 2017 at 7:03 PM, Bin Cheng

Re: [PATCH 2/3] Make early return predictor more precise.

On 06/22/2017 04:14 PM, Christophe Lyon wrote: > Since this commit (r249450), I have noticed a regression: > FAIL:gcc.dg/tree-ssa/ipa-split-5.c scan-tree-dump optimized "part" > on aarch64/arm > > Christophe Hello. I'm aware of the failure and I fixed that (hopefully) in r249503. Can you

[PATCH] PR c++/81187 fix -Wnoexcept-type entry in manual

PR c++/81187 * doc/invoke.texi (-Wnoexcept-type): Fix name of option, from -Wnoexcept. Committed to trunk as obvious. Will also commit to gcc-7-branch. commit 3c1266fdb7cf6241d9a08109160bf86753d733bd Author: Jonathan Wakely Date: Fri Jun 23 09:13:06

Re: [PATCH 2/3] Make early return predictor more precise.

On 23 June 2017 at 09:03, Martin Liška wrote: > On 06/22/2017 04:14 PM, Christophe Lyon wrote: >> Since this commit (r249450), I have noticed a regression: >> FAIL:gcc.dg/tree-ssa/ipa-split-5.c scan-tree-dump optimized "part" >> on aarch64/arm >> >> Christophe > > Hello. > >

Re: [PATCH] PR ipa/81185, Improve naming of target_clone cloned function names

On 06/23/2017 03:58 AM, Michael Meissner wrote: > he June 19th, 2017 change from Martin Liska , made the > target_clones support more usable, in that it it changed the external name > from > being the default function to being the ifunc handler. This means that calls > from

Re: [PATCH GCC][5/5]Enable tree loop distribution at -O3 and above optimization levels.

On Fri, Jun 23, 2017 at 6:04 AM, Jeff Law wrote: > On 06/07/2017 02:07 AM, Bin.Cheng wrote: >> On Tue, Jun 6, 2017 at 6:47 PM, Jeff Law wrote: >>> On 06/02/2017 05:52 AM, Bin Cheng wrote: Hi, This patch enables -ftree-loop-distribution by default at

ping: [gcc patch] DWARF-5: Define DW_IDX_GNU_static and DW_IDX_GNU_external

http://dwarfstd.org/ShowIssue.php?issue=170527.1 170527.1 Jan Kratochvil DW_IDX_* for static/extern symbols Enhancement Open Section 6.1.1.4.7, pg 147 When a debugger wants to print 'somename' it logically tries to find first 'somename' as an external symbol in all available libraries. Only

[PATHC][x86] Scalar mask and round RTL templates

Hi, This patch adds three extra RTL meta-templates for scalar round and mask. Additionally fixes errors caused by previous mask and round usage in some of the intrinsics that I found. 2017-06-23 Sebastian Peryt gcc/ * config/i386/subst.md (mask_scalar,

Re: Avoid generating useless range info

[one more time, but without sending html which the list refuses :-/] On Fri, Jun 16, 2017 at 4:00 AM, Richard Biener wrote: > On Wed, Jun 14, 2017 at 6:41 PM, Aldy Hernandez wrote: >> Hi! >> >> As discovered in my range class work, we seem to

Re: [committed] Fix -fstack-check with really big frames on aarch64

On 22 June 2017 at 19:21, Jeff Law wrote: > > This time with the test. Just #includes 20031023-1.c with a suitable dg > directive to ensure we compile with -fstack-check. > > I won't be surprised if other targets fail this test. It's a really big > stack frame :-) > > Anyways,

Re: PR81136: ICE from inconsistent DR_MISALIGNMENTs

Richard Biener writes: > On Thu, Jun 22, 2017 at 1:30 PM, Richard Sandiford > wrote: >> The test case triggered this assert in vect_update_misalignment_for_peel: >> >> gcc_assert (DR_MISALIGNMENT (dr) / dr_size == >>

Re: [PATCH GCC][08/13]Refactoring structure partition for distribution

On Fri, Jun 23, 2017 at 12:29 PM, Bin.Cheng wrote: > On Mon, Jun 19, 2017 at 4:18 PM, Richard Biener > wrote: >> On Mon, Jun 19, 2017 at 3:37 PM, Bin.Cheng wrote: >>> On Wed, Jun 14, 2017 at 2:47 PM, Richard Biener >>>

Re: [PATCH GCC][11/13]Annotate partition by its parallelism execution type

On Fri, Jun 23, 2017 at 12:25 PM, Bin.Cheng wrote: > And the patch. > > On Fri, Jun 23, 2017 at 11:24 AM, Bin.Cheng wrote: >> On Tue, Jun 20, 2017 at 12:34 PM, Richard Biener >> wrote: >>> On Tue, Jun 20, 2017 at 11:18

Re: [PATCH GCC][10/13]Compute and cache data dependence relation

On Fri, Jun 23, 2017 at 12:22 PM, Bin.Cheng wrote: > On Tue, Jun 20, 2017 at 12:32 PM, Richard Biener > wrote: >> On Tue, Jun 20, 2017 at 11:15 AM, Bin.Cheng wrote: >>> On Fri, Jun 16, 2017 at 11:03 AM, Richard Biener >>>

Re: [PATCH GCC][09/13]Simply cost model merges partitions with the same references

On Fri, Jun 23, 2017 at 12:19 PM, Bin.Cheng wrote: > On Mon, Jun 19, 2017 at 4:20 PM, Richard Biener > wrote: >> On Mon, Jun 19, 2017 at 3:40 PM, Bin.Cheng wrote: >>> On Wed, Jun 14, 2017 at 2:54 PM, Richard Biener >>>

Re: [PATCH GCC][12/13]Workaround reduction statements for distribution

On Fri, Jun 23, 2017 at 12:26 PM, Bin.Cheng wrote: > On Tue, Jun 20, 2017 at 12:36 PM, Richard Biener > wrote: >> On Tue, Jun 20, 2017 at 11:20 AM, Bin.Cheng wrote: >>> On Fri, Jun 16, 2017 at 6:15 PM, Bin.Cheng

Re: PR81136: ICE from inconsistent DR_MISALIGNMENTs

On Thu, Jun 22, 2017 at 1:30 PM, Richard Sandiford wrote: > The test case triggered this assert in vect_update_misalignment_for_peel: > > gcc_assert (DR_MISALIGNMENT (dr) / dr_size == > DR_MISALIGNMENT (dr_peel) / dr_peel_size); > > We

Re: [PATCH GCC][09/13]Simply cost model merges partitions with the same references

On Fri, Jun 23, 2017 at 11:48 AM, Richard Biener wrote: > On Fri, Jun 23, 2017 at 12:19 PM, Bin.Cheng wrote: >> On Mon, Jun 19, 2017 at 4:20 PM, Richard Biener >> wrote: >>> On Mon, Jun 19, 2017 at 3:40 PM, Bin.Cheng

Re: [PATCH][AArch64] Mark symbols as constant

Andreas Schwab wrote: > > This breaks gcc.target/aarch64/reload-valid-spoff.c with -mabi=ilp32: Indeed, there is a odd ILP32 bug that causes high/lo_sum to be generated in SI mode in expand: (insn 15 14 16 4 (set (reg:SI 125) (high:SI (symbol_ref/u:DI ("*.LC1") [flags 0x2])))

Re: Avoid generating useless range info

On Fri, Jun 23, 2017 at 12:32 PM, Jakub Jelinek wrote: > On Fri, Jun 23, 2017 at 12:24:25PM +0200, Richard Biener wrote: >> > void >> > set_nonzero_bits (tree name, const wide_int_ref ) >> > { >> > gcc_assert (!POINTER_TYPE_P (TREE_TYPE (name))); >> > if (SSA_NAME_RANGE_INFO

Re: [PATCH GCC][5/5]Enable tree loop distribution at -O3 and above optimization levels.

On Fri, Jun 23, 2017 at 10:47 AM, Bin.Cheng wrote: > On Fri, Jun 23, 2017 at 6:04 AM, Jeff Law wrote: >> On 06/07/2017 02:07 AM, Bin.Cheng wrote: >>> On Tue, Jun 6, 2017 at 6:47 PM, Jeff Law wrote: On 06/02/2017 05:52 AM, Bin Cheng

Re: PR81136: ICE from inconsistent DR_MISALIGNMENTs

On Fri, Jun 23, 2017 at 1:19 PM, Richard Biener wrote: > On Thu, Jun 22, 2017 at 1:30 PM, Richard Sandiford > wrote: >> The test case triggered this assert in vect_update_misalignment_for_peel: >> >> gcc_assert (DR_MISALIGNMENT

RE: Add support for use_hazard_barrier_return function attribute

Please find the updated patch below. I hope I've covered everything. I've added the test for inline restriction, could you check if I got all the options correct? Changelog: 2017-06-23 Prachi Godbole gcc/ * config/mips/mips.h (machine_function): New

[PATCH] Fix more PR80928 fallout

SLP induction vectorization runs into the issue that it remembers pointers to PHI nodes in the SLP tree during analysis. But those may get invalidated by loop copying (for prologue/epilogue peeling or versioning) as the low-level CFG helper copy_bbs works in the way of copying individual BBs

Re: [PATCH] Fix PR81175, make gather builtins pure

On Fri, 23 Jun 2017, Marc Glisse wrote: > On Fri, 23 Jun 2017, Richard Biener wrote: > > > The vectorizer is confused about the spurious VDEFs that are caused > > by gather vectorization so the following avoids them by making the > > builtins pure appropriately. > > > > Bootstrap / regtest

Re: [PATCH] Fix PR81175, make gather builtins pure

On Fri, Jun 23, 2017 at 03:22:13PM +0200, Richard Biener wrote: > On Fri, 23 Jun 2017, Marc Glisse wrote: > > > On Fri, 23 Jun 2017, Richard Biener wrote: > > > > > The vectorizer is confused about the spurious VDEFs that are caused > > > by gather vectorization so the following avoids them by

[PATCH] go.test: update MIPS architecture names

Hi, This updates the go architecture names on MIPS in line with the recent changes to libgo. I do not have commit access, so please can someone else commit this for me. Thanks, James 2016-06-23 James Cowgill * go.test/go-test.exp (go-set-goarch): update

[PATCH] Fix PR81175, make gather builtins pure

The vectorizer is confused about the spurious VDEFs that are caused by gather vectorization so the following avoids them by making the builtins pure appropriately. Bootstrap / regtest pending on x86_64-unknown-linux-gnu, ok for trunk and branch? Thanks, Richard. 2017-06-23 Richard Biener

Simple reassoc transforms in match.pd

Hello, here are a few simple transformations, mostly useful for types with undefined overflow where we do not have reassoc. I did not name the testcase reassoc-* to leave that namespace to the realloc pass, and -fno-tree-reassoc is just in case someone ever enhances that pass... Bootstrap

Re: [PATCH] Fix PR81175, make gather builtins pure

On Fri, 23 Jun 2017, Richard Biener wrote: The vectorizer is confused about the spurious VDEFs that are caused by gather vectorization so the following avoids them by making the builtins pure appropriately. Bootstrap / regtest pending on x86_64-unknown-linux-gnu, ok for trunk and branch?

Re: [PATCH] go.test: update MIPS architecture names

On Fri, Jun 23, 2017 at 5:40 AM, James Cowgill wrote: > > This updates the go architecture names on MIPS in line with the recent > changes to libgo. > > I do not have commit access, so please can someone else commit this for > me. > > Thanks, > James > > 2016-06-23

libgo patch committed: Improve handling of panic during deferred function

When a Go panic occurs while processing a deferred function that recovered an earlier panic, we shouldn't report the recovered panic in the panic stack trace. This libgo patch stops doing so by keeping track of the panic that triggered a defer, marking it as aborted if we see the defer again, and

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