On Sat, Oct 11, 2014 at 5:13 AM, Jeff Law wrote:
> On 09/30/14 03:22, Bin Cheng wrote:
>>
>> Hi,
>> many load/store pairs as my old patch. Then I decided to take one step
>> forward to introduce a generic instruction fusion infrastructure in GCC,
>> because in essence, load/store pair is nothing
On Mon, Oct 20, 2014 at 9:06 PM, Maxim Kuvyrkov
wrote:
> Hi,
>
> This patch adds auto-prefetcher modeling to GCC scheduler. The
> auto-prefetcher model is currently enabled only for ARM Cortex-A15, since
> this is the only CPU that I know of to have the hardware auto-prefetcher unit.
That migh
On 20 October 2014 15:38, Jonathan Wakely wrote:
> The templates should also use 'typename' not 'class' but I can make
> that change before committing it so no need for a new patch.
No, no, no! Contributors must be punished, otherwise they will never learn! ;)
Revised patch attached.
diff --git
Hi,
This patch improves model_order_p to use non-reg-pressure version of
rank_for_schedule when it needs to break the tie. At the moment it is
comparing INSN_PRIORITY by itself, and it seems prudent to outsource that to
rank_for_schedule.
Bootstrapped on x86_64-linux-gnu and regtested on arm-
Hi,
This patch adds auto-prefetcher modeling to GCC scheduler. The auto-prefetcher
model is currently enabled only for ARM Cortex-A15, since this is the only CPU
that I know of to have the hardware auto-prefetcher unit.
The documentation on the auto-prefetcher is very sparse, and all I have ar
Hi,
This patch is a simple fix to allow decompose_address to handle SCRATCH'es
during 2nd scheduler pass. This patch is a prerequisite for a scheduler
improvement that relies on decompose_address to parse insns.
Bootstrapped and regtested on x86_64-linux-gnu and regtested on
arm-linux-gnueabih
Hi Ramana,
Hi Marcus,
This patch enables max_issue multipass lookahead scheduling for 2nd scheduler
pass (or, more pedantically, whenever register-pressure scheduling is not in
use).
Multipass lookahead scheduling is being enabled for cores that can issue 2 or
more instructions per cycle, and
Hi,
This patch disables max_issue-based lookahead multipass scheduling when
register-pressure heuristics are active. The two approaches tend to undo each
others decisions and don't play well together.
Currently this patch is a no-op, since no target uses both max_issue and
register-pressure s
Hi,
This patch cleans up (removes) cached_first_cycle_multipass_dfa_lookahead and
cached_issue_rate.
These seem to be an artifact from the scheduler refactoring 10+ years ago.
They assume that dfa_lookahead and issue_rate can change mid-way through
scheduling, which is never the case. All ba
Hi Christophe,
Thank you for reply. The testsuite is useful for me. Hope to see more
progress in your work : - )
>
> On 20 October 2014 14:01, Yangfei (Felix) wrote:
> > Hi,
> >
> > I am trying to improve the AARCH64 NEON intrinsics. It seems that we
> don't enough testcases for this par
On Mon, Oct 20, 2014 at 8:26 PM, Joseph S. Myers
wrote:
> On Mon, 20 Oct 2014, David Edelsohn wrote:
>
>> On Mon, Oct 20, 2014 at 12:59 PM, Maciej W. Rozycki
>> wrote:
>> > Hi,
>> >
>> > I thought http://gcc.gnu.org/ml/gcc-patches/2014-09/msg00242.html would
>> > be folded into PowerPC TARGET_AT
Hi!
I just noticed that a full bootstrap got broken somewhere between
]r216463..r216488]. Most of the patches are purely Ada related, but
maybe some of the remaining contributors recognize it ad hoc, see eg.
http://toolchain.lug-owl.de/buildbot/show_build_details.php?id=364398 :
[...]
/bin/sh ./l
On Mon, 20 Oct 2014, David Edelsohn wrote:
> On Mon, Oct 20, 2014 at 12:59 PM, Maciej W. Rozycki
> wrote:
> > Hi,
> >
> > I thought http://gcc.gnu.org/ml/gcc-patches/2014-09/msg00242.html would
> > be folded into PowerPC TARGET_ATOMIC_ASSIGN_EXPAND_FENV support, but I see
> > r216437 went withou
On Mon, Oct 20, 2014 at 12:59 PM, Maciej W. Rozycki
wrote:
> Hi,
>
> I thought http://gcc.gnu.org/ml/gcc-patches/2014-09/msg00242.html would
> be folded into PowerPC TARGET_ATOMIC_ASSIGN_EXPAND_FENV support, but I see
> r216437 went without it. In that case would someone please review my
> propo
On Mon, 20 Oct 2014, David Malcolm wrote:
> On Fri, 2014-10-17 at 21:52 +, Joseph S. Myers wrote:
> [...snip static linkage discussion...]
>
> > The dump file handling appears to have no I/O error checking (no checking
> > for error on fopen, nothing obvious to prevent fwrite to a NULL m_fil
On Mon, 20 Oct 2014, David Malcolm wrote:
> +Necessary to regenerate @file{jit/docs/_build/texinfo} from the .rst
I'd say @file{.rst}, but otherwise looks OK to me.
--
Joseph S. Myers
jos...@codesourcery.com
On Mon, 20 Oct 2014, Bernd Schmidt wrote:
> These tools currently require GNU extensions - something I probably ought to
> fix if we decide to add them to the gcc build itself.
And as regards library use, I'd expect the sources to start with #includes
of config.h and system.h (and so not include
Ramana Radhakrishnan wrote:
> We already have sched-pressure --param=sched-pressure-algorithm=1 on
> by default in the AArch64 backend from September.
> https://gcc.gnu.org/ml/gcc-patches/2014-09/msg01663.html went in a few
> days back.
>
> So if this patch is on then we are looking at uplifts wi
On Oct 21, 2014, at 10:39 AM, Ramana Radhakrishnan
wrote:
> On Mon, Oct 20, 2014 at 10:17 PM, Richard Sandiford
> wrote:
>> Maxim Kuvyrkov writes:
>>> [Adding ARM maintainers to CC]
>>>
>>> On Oct 21, 2014, at 9:44 AM, Sebastian Pop wrote:
>>>
Hi Maxim,
Maxim Kuvyrkov wrote:
> [Adding ARM maintainers to CC]
>
> On Oct 21, 2014, at 9:44 AM, Sebastian Pop wrote:
>
> > Hi Maxim,
> >
> > Maxim Kuvyrkov wrote:
> >> Thanks, benchmarking results are welcome! AArch64 doesn't use
> >> reg_pressure scheduling by default. Use "-fsched-pressure
> >> --param=sched-pressure-alg
> ChangeLog:
> * doc/invoke.texi (AARCH64/mtune): Document thunderx as an available option
> also.
> * config/aarch64/aarch64-cost-tables.h: New file.
Good idea!
> * config/aarch64/aarch64-cores.def (thunderx): New core.
> * config/aarch64/aarch64-tune.md: Regenerate.
> * config/aarch64/aarch64.c
On Mon, Oct 20, 2014 at 10:17 PM, Richard Sandiford
wrote:
> Maxim Kuvyrkov writes:
>> [Adding ARM maintainers to CC]
>>
>> On Oct 21, 2014, at 9:44 AM, Sebastian Pop wrote:
>>
>>> Hi Maxim,
>>>
>>> Maxim Kuvyrkov wrote:
Thanks, benchmarking results are welcome! AArch64 doesn't use reg_pre
The updated patch attached. Will commit the patch in 2~3 hours if no
objection is received.
Thanks,
Dehao
On Sun, Oct 19, 2014 at 2:58 AM, Jan Hubicka wrote:
>> >> +/* Member functions for string_table. */
>> >> +
>> >> +string_table *
>> >> +string_table::create ()
>> >
>> > Why this is not a
Maxim Kuvyrkov wrote:
> [Adding ARM maintainers to CC]
>
> On Oct 21, 2014, at 9:44 AM, Sebastian Pop wrote:
>
> > Hi Maxim,
> >
> > Maxim Kuvyrkov wrote:
> >> Thanks, benchmarking results are welcome! AArch64 doesn't use reg_pressure
> >> scheduling by default. Use "-fsched-pressure
> >> --p
Maxim Kuvyrkov writes:
> [Adding ARM maintainers to CC]
>
> On Oct 21, 2014, at 9:44 AM, Sebastian Pop wrote:
>
>> Hi Maxim,
>>
>> Maxim Kuvyrkov wrote:
>>> Thanks, benchmarking results are welcome! AArch64 doesn't use reg_pressure
>>> scheduling by default. Use "-fsched-pressure
>>> --param=s
2014-10-20 16:11 GMT+02:00 Manuel López-Ibáñez :
>> 2014-10-18 23:07 GMT+02:00 Krzesimir Nowak :
>>> Hello.
>>>
>>> This is my first patch for GCC. I already started a paperwork for
>>> copyright assignment (sent an email to fsf-records at gnu org) -
>>> waiting for response.
>>>
>>> So, about this
[Adding ARM maintainers to CC]
On Oct 21, 2014, at 9:44 AM, Sebastian Pop wrote:
> Hi Maxim,
>
> Maxim Kuvyrkov wrote:
>> Thanks, benchmarking results are welcome! AArch64 doesn't use reg_pressure
>> scheduling by default. Use "-fsched-pressure
>> --param=sched-pressure-algorithm=2" to enable
ok (for google branch).
David
On Mon, Oct 20, 2014 at 1:44 PM, Sriraman Tallam wrote:
> On Mon, Oct 20, 2014 at 12:59 PM, Xinliang David Li
> wrote:
>> On Mon, Oct 20, 2014 at 11:59 AM, Sriraman Tallam
>> wrote:
>>> On Mon, Oct 20, 2014 at 10:51 AM, Andrew Pinski wrote:
On Mon, Oct 20,
This patch updates how the OpenACC device, self and host clauses are
handled in gfortan. Specifically these clauses now map to
OMP_MAP_FORCE_TO (host) and OMP_MAP_FORCE_FROM (device and self) in a
similar fashion to the c/c++ front ends.
I've also included a minor cleanup to
gfc_trans_oacc_executa
Hi,
This adds simple -mcpu=thunderx support. Right now we use the
schedule model of cortex-a53 but we will submit a schedule model for
ThunderX later on. Note ThunderX is an AARCH64 only processor so I
created a new file to hold the cost tables for it rather than adding
it to aarch-cost-tables.
On Mon, Oct 20, 2014 at 12:59 PM, Xinliang David Li wrote:
> On Mon, Oct 20, 2014 at 11:59 AM, Sriraman Tallam wrote:
>> On Mon, Oct 20, 2014 at 10:51 AM, Andrew Pinski wrote:
>>> On Mon, Oct 20, 2014 at 10:46 AM, Sriraman Tallam
>>> wrote:
On Mon, Oct 20, 2014 at 10:42 AM, Xinliang David
Hi Maxim,
Maxim Kuvyrkov wrote:
> Thanks, benchmarking results are welcome! AArch64 doesn't use reg_pressure
> scheduling by default. Use "-fsched-pressure
> --param=sched-pressure-algorithm=2" to enable same thing as on ARM. I would
> imagine C++ and Fortran floating-point code to be most aff
On Mon, 2014-10-20 at 22:11 +0200, Basile Starynkevitch wrote:
> On Mon, 2014-10-20 at 13:54 -0400, David Malcolm wrote:
> > Committed to branch dmalcolm/jit:
> >
> > pkg-config appears to be controversial, so don't provide a .pc file.
>
>
> I would put it under contrib/; it is controversial, bu
All of the various OpenACC memory maps are now fully supported in GCC.
This patch removes an obsolete sorry message complaining about
DEALLOCATE maps not being implemented.
I've committed this to gomp-4_0-branch.
Cesar
2014-10-20 Cesar Philippidis
gcc/
* gimplify.c (gimplify_scan_omp_clause
Am 20.10.2014 um 22:11 schrieb Basile Starynkevitch:
> On Mon, 2014-10-20 at 13:54 -0400, David Malcolm wrote:
>> Committed to branch dmalcolm/jit:
>>
>> pkg-config appears to be controversial, so don't provide a .pc file.
>
>
> I would put it under contrib/; it is controversial, but some would l
On 10/20/2014 01:18 PM, Jakub Jelinek wrote:
> On Mon, Oct 20, 2014 at 01:12:08PM -0700, Cesar Philippidis wrote:
>> The OpenACC delete clause isn't detected in the c++ front end because
>> the lexer classifies it as a keyword, which it is. This patch makes the
>> openacc pragma parser aware of tha
This patch adds some more checks and the actual implementation (compiler
side and libcaf_single) for CO_REDUCE. It also rejects coindexed
variables elsewhere, in line with the recent J3 changes. I also updated
the API documentation (adding doc for collectives.)
Still unsupported as elsewhere a
On Mon, Oct 20, 2014 at 01:12:08PM -0700, Cesar Philippidis wrote:
> The OpenACC delete clause isn't detected in the c++ front end because
> the lexer classifies it as a keyword, which it is. This patch makes the
> openacc pragma parser aware of that.
>
> I've committed this patch to gomp-4_0-bran
The OpenACC update directive would cause an ICE if there was an error
parsing one of its clauses in the c front end. E.g. #pragma acc update
copy(a(1:10)). This patch fixes that. Also, it declare GOACC_update
inside libgomp_g.h
I've committed this patch to gomp-4_0-branch. A test case will be
prov
The OpenACC delete clause isn't detected in the c++ front end because
the lexer classifies it as a keyword, which it is. This patch makes the
openacc pragma parser aware of that.
I've committed this patch to gomp-4_0-branch. A test case will be
included in a follow up patch along with support for
Hi Richard
An arm testcase that can reproduce this bug is attached.
2014-10-20 Guozhi Wei
PR tree-optimization/63530
gcc.target/arm/pr63530.c: New testcase.
Index: pr63530.c
===
--- pr63530.c (revision 0)
+++ pr
On Mon, 2014-10-20 at 13:54 -0400, David Malcolm wrote:
> Committed to branch dmalcolm/jit:
>
> pkg-config appears to be controversial, so don't provide a .pc file.
I would put it under contrib/; it is controversial, but some would like
to have it.
Cheers.
--
Basile STARYNKEVITCH http
On Mon, Oct 20, 2014 at 11:59 AM, Sriraman Tallam wrote:
> On Mon, Oct 20, 2014 at 10:51 AM, Andrew Pinski wrote:
>> On Mon, Oct 20, 2014 at 10:46 AM, Sriraman Tallam
>> wrote:
>>> On Mon, Oct 20, 2014 at 10:42 AM, Xinliang David Li
>>> wrote:
Why removing the tree_code check?
>>>
>>> Th
On Fri, 2014-10-17 at 21:25 +, Joseph S. Myers wrote:
> Although Sphinx isn't a build dependency, as a dependency for
> regenerating checked-in files I think it should be documented in
> install.texi (like autoconf, gettext, etc.).
Does this look OK? (Committed to branch dmalcolm/jit for no
On Oct 21, 2014, at 8:11 AM, Sebastian Pop wrote:
> Maxim Kuvyrkov wrote:
>> Hi,
>>
>> This patch improves register pressure scheduling (both
>> SCHED_PRESSURE_WEIGHTED and SCHED_PRESSURE_MODEL) to better estimate number
>> of available registers.
>>
>> At the moment the scheduler does not ac
This patch by Chris Manghane passes type information to
compiler-generated heap allocations in gccgo. This gives us precise
type information for much of the gccgo heap, and means that garbage
collection is much more precise and less prone to errors due to
mistaking integer or float values as point
Maxim Kuvyrkov wrote:
> Hi,
>
> This patch improves register pressure scheduling (both
> SCHED_PRESSURE_WEIGHTED and SCHED_PRESSURE_MODEL) to better estimate number
> of available registers.
>
> At the moment the scheduler does not account for spills in the prologues and
> restores in the epil
Maxim Kuvyrkov wrote:
> Hi,
>
> Following previous improvement to scheduler dumps that provided insight into
> which heuristics in rank_for_schedule make most decisions, this patch adds
> print outs that show the deciding reason for an instruction in the ready list
> to be at its particular pla
On Mon, Oct 20, 2014 at 10:51 AM, Andrew Pinski wrote:
> On Mon, Oct 20, 2014 at 10:46 AM, Sriraman Tallam wrote:
>> On Mon, Oct 20, 2014 at 10:42 AM, Xinliang David Li
>> wrote:
>>> Why removing the tree_code check?
>>
>> The actual problem happens because STRING_CSTs (end up in .lrodata)
>> a
On Mon, Oct 20, 2014 at 10:59 AM, Xinliang David Li wrote:
> Perhaps explicitly allowing STRING_CST to go through the large data
> check, instead of removing the var-decl check? Do you see other
> opcodes that need to be handled too?
I do not see any other opcodes explicitly but the code in
ix86_
On Fri, 2014-10-17 at 21:52 +, Joseph S. Myers wrote:
[...snip static linkage discussion...]
> The dump file handling appears to have no I/O error checking (no checking
> for error on fopen, nothing obvious to prevent fwrite to a NULL m_file if
> fopen did have an error, no checking for erro
creates cfg.h, cfganal.h, lcm.h, and loop-unroll.h to house the
prototypes for those .c files.
cfganal.h also gets "struct edge_list" and "class control_dependences"
definitions since that is where all the routines and manipulators are
declared.
loop-unroll.h only exports 2 routines, so ra
This patch to libgo is a copy of a patch I recently made to the master
Go library. This changes the reflect package to allocate memory using
the correct types for interface conversions. The code was incorrectly
allocating an empty interface type to hold a non-empty interface
value. This was work
Perhaps explicitly allowing STRING_CST to go through the large data
check, instead of removing the var-decl check? Do you see other
opcodes that need to be handled too?
David
On Mon, Oct 20, 2014 at 10:46 AM, Sriraman Tallam wrote:
> On Mon, Oct 20, 2014 at 10:42 AM, Xinliang David Li
> wrote:
Committed to branch dmalcolm/jit:
pkg-config appears to be controversial, so don't provide a .pc file.
gcc/ChangeLog.jit:
* Makefile.in (pkgconfigdir): Drop this.
(installdirs): Likewise.
* configure.ac (gcc_version): Don't AC_SUBST this.
* configure: Regenerate.
On Mon, Oct 20, 2014 at 10:46 AM, Sriraman Tallam wrote:
> On Mon, Oct 20, 2014 at 10:42 AM, Xinliang David Li
> wrote:
>> Why removing the tree_code check?
>
> The actual problem happens because STRING_CSTs (end up in .lrodata)
> are not set a far address as they dont match the VAR_DECL check h
On Mon, Oct 20, 2014 at 10:42 AM, Xinliang David Li wrote:
> Why removing the tree_code check?
The actual problem happens because STRING_CSTs (end up in .lrodata)
are not set a far address as they dont match the VAR_DECL check here.
Futher, "ix86_in_large_data_p" call has the TREE_CODE check to
Why removing the tree_code check?
David
On Mon, Oct 20, 2014 at 10:35 AM, Sriraman Tallam wrote:
> Hi,
>
>This patch is under review for trunk GCC :
> https://gcc.gnu.org/ml/gcc-patches/2014-10/msg01638.html.
>
> In the mean time, is this ok for google/gcc-4_9 branch? Without
> this, -m
Hi,
This patch is under review for trunk GCC :
https://gcc.gnu.org/ml/gcc-patches/2014-10/msg01638.html.
In the mean time, is this ok for google/gcc-4_9 branch? Without
this, -mcmodel=medium is unusable if .lrodata goes beyond the 2G
boundary.
Thanks
Sri
Index: testsuite/gcc.dg/pr63538.c
This patch adds support for the mips target in gold.
OK to commit?
-cary
2014-10-20 Cary Coutant
* configure (--enable-gold): Add mips*-*-*.
* configure.ac: Regenerate.
Index: configure
===
--- configure (re
finish_this_expr needs to be prepared for lambda_expr_this_capture to
return NULL_TREE.
Tested x86_64-pc-linux-gnu, applying to trunk.
commit c631290819f1ab3754041c46d351745953fb8319
Author: Jason Merrill
Date: Mon Oct 20 09:56:35 2014 -0400
PR c++/63601
* lambda.c (current_nonlamb
Bootstrapped and tested.
Thanks!
--
Regards,
Tim Shen
commit 95c73ab6280c1f8182d018ee29a44230965dd4ef
Author: timshen
Date: Sun Oct 19 15:14:55 2014 -0700
PR libstdc++/63497
include/bits/regex_executor.h (_Executor::_M_word_boundary): Remove
const qualifier.
> But, given the preference of a number of others for fipa-ra, could you live
> with that?
Yes, IMO that's too vague a name but still better than the existing one. :-)
--
Eric Botcazou
Hi,
I thought http://gcc.gnu.org/ml/gcc-patches/2014-09/msg00242.html would
be folded into PowerPC TARGET_ATOMIC_ASSIGN_EXPAND_FENV support, but I see
r216437 went without it. In that case would someone please review my
proposal as a separate change?
Thanks,
Maciej
On Mon, Oct 20, 2014 at 5:19 PM, Ilya Tocar wrote:
>> >
>> > The patch is OK with the above improvement.
>> >
>> >
>>
>> Will commit version below, if no objections in 24 hours.
>>
>>
> Sorry,
> I've missed palignr, which should also have v64qi version,
> and lost return in expand_vec_perm_palignr
On Mon, Oct 20, 2014 at 1:32 AM, Richard Biener
wrote:
> On Mon, Oct 20, 2014 at 12:02 AM, Xinliang David Li
> wrote:
>> On Sat, Oct 18, 2014 at 4:19 PM, Xinliang David Li
>> wrote:
>>> On Sat, Oct 18, 2014 at 3:27 PM, Jan Hubicka wrote:
> The difference in instrumentation runtime is huge
Ping.
On 02 Oct 17:38, Ilya Tocar wrote:
> Ping.
> On 15 Aug 16:26, Ilya Tocar wrote:
> > Ping.
> >
> > On 29 Jul 18:45, Ilya Tocar wrote:
> > > Hi,
> > >
> > > As discussed here in https://gcc.gnu.org/ml/gcc/2014-01/msg00189.html
> > > Gcc should complain about pragma omp declare target without
Same in collect2.
On 09 Oct 15:40, Ilya Tocar wrote:
> Ping.
>
> On 29 Sep 18:02, Ilya Tocar wrote:
> > Hi,
> >
> > Currently if call to atexit (lto_wrapper_cleanup) fails we
> > won't report error as we haven't initialized error-reporting
> > infrastructure. This patch moves this call after dia
Fixing issues reported by users.
2014-10-20 Andrew Sutton
Fixing user-reported issues and regressions
* gcc/cp/parser.c (cp_parser_template_declaration_after_exp):
Only pop access checks on failed parsing.
* gcc/cp/pt.cpp (type_dependent_expr_p): Always treat a
> 2014-10-08 Andrew Pinski
>
> * config/mips/mips-cpus.def (octeon3): New cpu.
> * config/mips/mips.c (mips_rtx_cost_data): Add octeon3.
> (mips_print_operand ): Fix a bug as the mode
> of the comparison no longer matches mode of the operands.
> (mips_issue_rate): Handle PRO
> >
> > The patch is OK with the above improvement.
> >
> >
>
> Will commit version below, if no objections in 24 hours.
>
>
Sorry,
I've missed palignr, which should also have v64qi version,
and lost return in expand_vec_perm_palignr case
(this caused avx512f-vec-unpack test failures).
Patch be
On 20 October 2014 14:01, Yangfei (Felix) wrote:
> Hi,
>
> I am trying to improve the AARCH64 NEON intrinsics. It seems that we don't
> enough testcases for this part in GCC testsuite.
> How do you guys test your patch on this part? Any suggestions? Thanks.
>
Hello,
I have written a testsuit
On Mon, Oct 20, 2014 at 3:41 PM, Jakub Jelinek wrote:
> On Mon, Oct 20, 2014 at 05:30:36PM +0400, Kirill Yukhin wrote:
>> > Unfortunately this caused PR63600. The problem is that VI_AVX2
>> > mode iterator includes V2DI and for AVX2 also V4DI, but for pre-ssse3
>> > ix86_expand_sse2_abs doesn't h
This is a "bonus" optional patch which adds ar, ranlib, as and ld to the
ptx port. This is not proper binutils; ar and ranlib are just linked to
the host versions, and the other two tools have the following functions:
* nvptx-as is required to convert the compiler output to actual valid
ptx a
This patch handles correctly constructs of the forms F (T) where F denotes
a possibly overloaded function that can be invoked without actual parameters,
and T denotes a discrete type. The construct is parsed as an indexed component
but must be rewritten and analyzed as a slice of a parameterless ca
These are the main target files for the ptx port. t-nvptx is empty for
now but will grow some content with follow up patches.
Bernd
* configure.ac: Allow configuring lto for nvptx.
* configure: Regenerate.
gcc/
* config/nvptx/nvptx.c: New file.
* config/nvptx/nvptx.h: New file.
* confi
We skip the late compilation passes on ptx, but there's one piece we do
need - fixing up the function so that we get return insns in the right
places. This patch just makes thread_prologue_and_epilogue_insns
callable from the reorg pass.
Bernd
gcc/
* function.c (thread_prologue_and_epilogue
When an object declaration as an indefinite type, the actual subtype of the
object is constructed from the expression itself. If the type is an unchecked
union such a subtype cannot be constructed because discriminants cannot be
retrieved from the expression. In this case, rewrite declaration as a
ptx assembly requires that declarations are written for undefined
variables. This adds that functionality.
Bernd
gcc/
* target.def (assemble_undefined_decl): New hooks.
* hooks.c (hook_void_FILEptr_constcharptr_const_tree): New function.
* hooks.h (hook_void_FILEptr_constcharptr_const_tree
In ptx assembly we need to decorate call insns with the arguments that
are being passed. We also need to know the exact function type. This is
kind of hard to do with the existing infrastructure since things like
function_arg are called at other times rather than just when emitting a
call, so t
On ptx, we'll be using pseudos to pass function args as well, and
there's one assert that needs to be toned town to make that work.
Bernd
gcc/
* expr.c (use_reg_mode): Just return for pseudo registers.
Index: gcc/expr.
This patch improves the error recovery for an errant comma or semicolon
after one condition in an expression when more conditions follow, as
shown in this example:
1. procedure BadANDTHEN (X : Integer) is
2. begin
3.if X > 10
4. and then X mod 4 = 2;
As shown by this example, the recognition of misspelled aspects is
improved:
1. package UnrecogAs with Prelaborate is
|
>>> "Prelaborate" is not a valid aspect identifier
>>> possible misspelling of "Preelaborate"
2.type R is tagged nul
ptx assembly follows rather different rules than what's typical
elsewhere. We need a new hook to add a " };" string when we are finished
outputting a variable with an initializer.
Bernd
gcc/
* target.def (decl_end): New hook.
* varasm.c (assemble_variable_contents, assemble_constant_conten
This stops most of the post-regalloc passes to be run if the target
doesn't want register allocation. I'd previously moved them all out of
postreload to the toplevel, but Jakub (I think) pointed out that the
idea is not to run them to avoid crashes if reload fails e.g. for an
invalid asm. So I'
The No_Tagged_Streams pragma (and aspect) provides a method for
selectively inhibiting the generation of stream routines for
tagged types. It can be used either in a form naming a specific
tagged type, or in a sequence of declarations to apply to all
subsequent declarations.
The following tests sh
Even when returning a structure by passing an invisible reference, gcc
still likes to set the return register to the address of the struct.
This is undesirable on ptx where things like the return register have to
be declared, and the function really returns void at ptx level. I've
added a targe
Since it's a virtual target, I've chosen not to run register allocation.
This is one of the patches necessary to make that work, it primarily
adds a target hook to disable it and fixes some of the fallout.
Bernd
gcc/
* target.def (no_register_allocation): New data hook.
* doc/tm.texi.in: A
This change makes it so that instantiations of generic subprograms marked as
inline are considered for inter-unit inlining. This was not previously the
case because of a technical limitation that was too broadly enforced (unlike
the associated comment which was more accurate) and excluded instanti
ptx doesn't have indirect jumps, so CODE_FOR_indirect_jump may not be
defined. Add a sorry.
Bernd
gcc/
* optabs.c (emit_indirect_jump): Test HAVE_indirect_jump and emit a
sorry if necessary.
Index: gcc/optabs.c
===
Since it's a virtual target, I've chosen not to run register allocation.
This is one of the patches necessary to make that work, it primarily
adds a target hook to disable it and fixes some of the fallout.
Bernd
This is a patch kit that adds the nvptx port to gcc. It contains
preliminary patches to add needed functionality, the target files, and
one somewhat optional patch with additional target tools. There'll be
more patch series, one for the testsuite, and one to make the offload
functionality work
> 2014-10-18 23:07 GMT+02:00 Krzesimir Nowak :
>> Hello.
>>
>> This is my first patch for GCC. I already started a paperwork for
>> copyright assignment (sent an email to fsf-records at gnu org) -
>> waiting for response.
>>
>> So, about this patch - it basically removes column printing from "In
>>
Typically an indexing aspect is specified on the private view of a tagged
type. In the unusual case where there is an incomplete view and the aspect
specification appears on the full view, the aspect specification must be
analyzed on the full view rather than the incomplete one, to prevent freezing
When expanding a limited aggregate into individual assignments, we create a
transient scope if the type of a component requires it. This must not be done
if the context is an initialization procedure, because the target of the
assignment must be visible outside of the block, and stack cleanup will
Richard,
Thanks for your answer!
In current implementation phi node conversion assume that one of
incoming edge to bb containing given phi has at least one non-critical
edge and choose it to insert predicated code. But if we choose
critical edge we need to determine insert point and insertion
dir
On Mon, Oct 20, 2014 at 05:41:25PM +0400, Kirill Yukhin wrote:
> Hello,
> This patch adds (almost) all built-ins needed by
> AVX-512VL,BW,DQ intrinsics.
>
> Main questionable hunk is:
>
> diff --git a/gcc/tree-core.h b/gcc/tree-core.h
> index b69312b..a639487 100644
> --- a/gcc/tree-core.h
> +++
On Mon, Oct 20, 2014 at 05:30:36PM +0400, Kirill Yukhin wrote:
> > Unfortunately this caused PR63600. The problem is that VI_AVX2
> > mode iterator includes V2DI and for AVX2 also V4DI, but for pre-ssse3
> > ix86_expand_sse2_abs doesn't handle V2DI (and can't easily, we don't have
> > PSRAQ instru
Hello,
On 20 Oct 14:36, Jakub Jelinek wrote:
> On Tue, Oct 14, 2014 at 11:18:28AM +0400, Kirill Yukhin wrote:
> > * config/i386/sse.md (define_mode_iterator VI_AVX2): Extend
> > to support AVX-512BW.
> > (define_mode_iterator VI124_AVX2_48_AVX512F): Remove.
> > (define_expand "3"):
When folding all stmts we can end up canonicalizing operand order
correctly which breaks at least the following two testcases.
Fixed by making their expected outcome more robust.
Tested on x86_64-unknown-linux-gnu, applied.
Richard.
2014-10-20 Richard Biener
* gcc.dg/tree-ssa/slsr-
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