Re: [PATCH 01/02] PR/62314: add ability to add fixit-hints

On 11/10/2015 05:35 PM, David Malcolm wrote: + /* Nasty workaround to convince the linker to add + rich_location::add_fixit_insert + rich_location::add_fixit_remove + rich_location::add_fixit_replace + to cc1 for use by diagnostic_plugin_test_show_locus, + before anything

Re: [Patch AArch64] Switch constant pools to separate rodata sections.

On Tue, Nov 10, 2015 at 4:39 PM, Alan Lawrence wrote: > On 04/11/15 14:26, Ramana Radhakrishnan wrote: >> >> >> True and I've just been reading more of the backend - We could now start >> using blocks for constant pools as well. So let's do that. >> >> How does something

[PATCH 01/02] PR/62314: add ability to add fixit-hints

This patch adds the ability to add "fix-it hints" to a rich_location, which will be displayed when the corresponding diagnostic is printed. It does not actually add any fix-it hints (that comes in the second patch), but it adds test coverage of the machinery and printing, by using the existing

[PATCH 02/02] C FE: add fix-it hint for . vs ->

This is the most trivial example of a real fix-it example I could think of: if the user writes ptr.field rather than ptr->field. gcc/c/ChangeLog: * c-typeck.c (build_component_ref): Special-case POINTER_TYPE when generating a "not a structure of union" error message, and

Re: [RFC][PATCH] Preferred rename register in regrename pass

On 10 November 2015 at 12:41, Robert Suchanek wrote: > Hi Christophe, > >> Hi, >> >> Since you committed this (r230087 if I'm correct), I can see that GCC >> fails to build >> ligfortran for target arm-none-linuxgnueabi --with-cpu=cortex-a9. > ... >> >> Can you have a

RE: [PATCH 1/2][ARC] Add support for ARCv2 CPUs

> If you can name a pre-existing testcase to trigger the assert, the patch is > approved for separate check-in. The patch solves the gcc.dg/pr29921-2.c error, visible for ARC700 architecture. I will prepare a new patch for this error. Thank you for the review, Claudiu

Re: [hsa 7/12] Disabling the vectorizer for GPU kernels/functions

On Tue, 10 Nov 2015, Martin Jambor wrote: > On Fri, Nov 06, 2015 at 09:38:21AM +0100, Richard Biener wrote: > > On Thu, 5 Nov 2015, Martin Jambor wrote: > > > > > Hi, > > > > > > in the previous email I wrote we need to "change behavior" of a few > > > optimization passes. One was the

Re: [AArch64] Move iterators from atomics.md to iterators.md

On Mon, Nov 02, 2015 at 11:44:02AM +, Matthew Wahab wrote: > Hello > > One of the review comments for the v8.1 atomics patches was that the > iterators and unspec declarations should be moved out of the atomics.md > file (https://gcc.gnu.org/ml/gcc-patches/2015-09/msg01375.html). > > The

Re: [PATCH 01/02] PR/62314: add ability to add fixit-hints

On Tue, 2015-11-10 at 17:26 +0100, Bernd Schmidt wrote: > On 11/10/2015 05:35 PM, David Malcolm wrote: > > + /* Nasty workaround to convince the linker to add > > + rich_location::add_fixit_insert > > + rich_location::add_fixit_remove > > + rich_location::add_fixit_replace > > +

Re: [PATCH] Simple optimization for MASK_STORE.

2015-11-10 17:46 GMT+03:00 Richard Biener : > On Tue, Nov 10, 2015 at 1:48 PM, Ilya Enkovich wrote: >> 2015-11-10 15:33 GMT+03:00 Richard Biener : >>> On Fri, Nov 6, 2015 at 2:28 PM, Yuri Rumyantsev

Re: [PR64164] drop copyrename, integrate into expand

On 05/11/15 05:08, Alexandre Oliva wrote: [PR67753] fix copy of PARALLEL entry_parm to CONCAT target_reg for gcc/ChangeLog PR rtl-optimization/67753 PR rtl-optimization/64164 * function.c (assign_parm_setup_block): Avoid allocating a stack slot if we don't have

Re: [Patch AArch64] Switch constant pools to separate rodata sections.

On 10/11/15 16:39, Alan Lawrence wrote: Since r229878, I've been seeing FAIL: gcc.dg/attr-weakref-1.c (test for excess errors) UNRESOLVED: gcc.dg/attr-weakref-1.c compilation failed to produce executable (both previously passing) on aarch64-none-elf, aarch64_be-none-elf, and

Re: [RFC] Combine vectorized loops with its scalar remainder.

On Tue, Nov 10, 2015 at 2:02 PM, Ilya Enkovich wrote: > 2015-11-10 15:30 GMT+03:00 Richard Biener : >> On Tue, Nov 3, 2015 at 1:08 PM, Yuri Rumyantsev wrote: >>> Richard, >>> >>> It looks like misunderstanding - we assume

[PATCH] libcpp: add examples to source_location description

This is a followup to: [PATCH 10/10] Compress short ranges into source_location which adds some worked examples of what a source_location/location_t can encode. Successfully bootstrapped on x86_64-pc-linux-gnu (although it only touches a comment). OK for trunk? libcpp/ChangeLog: *

[C/C++ PATCH] Reject declarators with huge arrays (PR c/68107, c++/68266)

While both C and C++ FEs are able to reject e.g. int a[__SIZE_MAX__ / sizeof(int)]; they are accepting code such as int (*a)[__SIZE_MAX__ / sizeof(int)]; As Joseph pointed out, any construction of a non-VLA type whose size is half or more of the address space should receive a compile-time error.

[patch] libstdc++/68190 Fix return type of heterogeneous find for sets

This converts the return type of heterogeneous find members to the correct set iterator type. Tested powerpc64le-linux, committed to trunk. Will commit to the gcc-5-branch too. commit d84e13dd8a7d47016bdfc5a9f45d8658a9d16ed9 Author: Jonathan Wakely Date: Tue Nov 10

Re: [Patch AArch64] Switch constant pools to separate rodata sections.

On 04/11/15 14:26, Ramana Radhakrishnan wrote: True and I've just been reading more of the backend - We could now start using blocks for constant pools as well. So let's do that. How does something like this look ? Tested on aarch64-none-elf - no regressions. 2015-11-04 Ramana

Re: [PATCH] Simple optimization for MASK_STORE.

On Nov 10, 2015, at 6:56 AM, Ilya Enkovich wrote: > 2015-11-10 17:46 GMT+03:00 Richard Biener : >> On Tue, Nov 10, 2015 at 1:48 PM, Ilya Enkovich >> wrote: >>> 2015-11-10 15:33 GMT+03:00 Richard Biener

Re: [PATCH] Make BB vectorizer work on sub-BBs

On 10 November 2015 at 14:02, Richard Biener wrote: > On Tue, 10 Nov 2015, Christophe Lyon wrote: > >> On 6 November 2015 at 12:11, Kyrill Tkachov wrote: >> > Hi Richard, >> > >> > >> > On 06/11/15 11:09, Richard Biener wrote: >> >> >> >> On Fri, 6 Nov

Re: [gomp4] Random omp-low.c backporting

Hi Nathan! On Tue, 10 Nov 2015 09:19:50 -0500, Nathan Sidwell wrote: > I've committed this to backport a bunch of random bits from trunk to gomp4, > and > thereby reduce divergence. Yeah, I had some of these on my list, too. > --- omp-low.c (revision 230080) > +++ omp-low.c

Re: [hsa 7/12] Disabling the vectorizer for GPU kernels/functions

On Fri, Nov 06, 2015 at 09:38:21AM +0100, Richard Biener wrote: > On Thu, 5 Nov 2015, Martin Jambor wrote: > > > Hi, > > > > in the previous email I wrote we need to "change behavior" of a few > > optimization passes. One was the flattening of GPU functions and the > > other two are in the

Re: [PATCH 1/2] Fix invalid left shift of negative value.

On Nov 10, 2015, at 3:13 AM, Dominik Vogt wrote: > On Tue, Nov 10, 2015 at 12:11:23PM +0100, Dominik Vogt wrote: >> The following series of patches fixes all occurences of >> left-shifting negative constants in C code which is undefined by >> the C standard. The patches

Re: [PATCH 3a/4][AArch64] Add attribute for compatibility with ARM pipeline models

On Tue, Nov 10, 2015 at 6:01 PM, Ramana Radhakrishnan wrote: > On Tue, Nov 10, 2015 at 5:50 PM, Evandro Menezes > wrote: >>2015-11-10 Evandro Menezes >> >>gcc/ >> >>* config/aarch64/aarch64.md

Re: [PATCH], Add power9 support to GCC, patch #6 (IEEE 128-bit hardware support)

On Tue, Nov 10, 2015 at 12:41:07AM +, Joseph Myers wrote: > I don't see any conversions between KFmode and TImode (in either > direction, signed or unsigned) here - I suppose there are no instructions > for that? No in power9 there is no instruction that converts 128-bit integer to IEEE

Re: [PATCH 1/6] Use IFN_SQRT in tree-vect-patterns.c

On Tue, 10 Nov 2015, Richard Biener wrote: > Looks ok but I wonder if this is dead code with > > (for pows (POW) > sqrts (SQRT) > cbrts (CBRT) > (simplify > (pows @0 REAL_CST@1) > (with { > const REAL_VALUE_TYPE *value = TREE_REAL_CST_PTR (@1); > REAL_VALUE_TYPE tmp; >

[PATCH 3a/4][AArch64] Add attribute for compatibility with ARM pipeline models

2015-11-10 Evandro Menezes gcc/ * config/aarch64/aarch64.md (predicated): Copy attribute from "arm.md". This patch duplicates an attribute from arm.md so that the same pipeline model can be used for both AArch32 and AArch64. Bootstrapped on

Re: [PATCH, i386]: Fix gcc.c-torture/compile/pr41634.c FAIL

On Tue, Nov 10, 2015 at 7:00 PM, Richard Henderson wrote: > On 11/10/2015 06:54 PM, Uros Bizjak wrote: >> >> - return "movabs{}\t{%1, %0|%0, %1}"; >> + return "movabs{}\t{%1, %P0|[%P0], %1}"; > > > The thing that's missing from this, that's present in the patch that I

Re: State of support for the ISO C++ Transactional Memory TS and remanining work

On 09/11/15 00:19, Torvald Riegel wrote: Hi, I'd like to summarize the current state of support for the TM TS, and outline the current plan for the work that remains to complete the support. I'm aware we're at the end of stage 1, but I'm confident we can still finish this work and hope to

[PATCH][ARM] PR 68149 Fix ICE in unaligned_loaddi split

Hi all, This ICE in this PR occurs when we're trying to split unaligned_loaddi into two SImode unaligned loads. The problem is in the addressing mode. When reload was picking the addressing mode we accepted an offset of -256 because the mode in the pattern is advertised as DImode and that was

[PATCH, i386]: Fix gcc.c-torture/compile/pr41634.c FAIL

Hello! Recent AS patches introduced the above compilation failure. We have to treat movabs operands in a special way - without %rip and inside square bracket for -masm=intel. Also, the patch removes dead code while at it. 2015-11-10 Uros Bizjak * config/i386/i386.c

Re: [C/C++ PATCH] Reject declarators with huge arrays (PR c/68107, c++/68266)

On Tue, 10 Nov 2015, Marek Polacek wrote: > While both C and C++ FEs are able to reject e.g. > int a[__SIZE_MAX__ / sizeof(int)]; > they are accepting code such as > int (*a)[__SIZE_MAX__ / sizeof(int)]; > > As Joseph pointed out, any construction of a non-VLA type whose size is half > or >

Re: [PATCH 3a/4][AArch64] Add attribute for compatibility with ARM pipeline models

On Tue, Nov 10, 2015 at 5:50 PM, Evandro Menezes wrote: >2015-11-10 Evandro Menezes > >gcc/ > >* config/aarch64/aarch64.md (predicated): Copy attribute from >"arm.md". > > This patch duplicates an attribute from arm.md so

Re: [PATCH], Add power9 support to GCC, patch #8 (add integer multiply/add)

This patch adds support for the MADDLD instruciton, which is a fused multiply/add instruction for integers. At this time, it is for 64-bit multiplies only. Eventually, we will restructure 128-bit multiply so that we can use the 64x64 + 64 high bit varients. I have bootstrapped a compiler with

[PATCH 3b/4][AArch64] Add scheduling model for Exynos M1

2015-11-10 Evandro Menezes gcc/ * config/aarch64/aarch64-cores.def: Use the Exynos M1 sched model. * config/aarch64/aarch64.md: Include "exynos-m1.md". * config/arm/arm-cores.def: Use the Exynos M1 sched model. * config/arm/arm.md:

[PATCH] gcc.c: new macro POST_LINK_SPECS to be able to add additional steps after linking

One may need to execute extra steps after linking program. This is required for example for DJGPP to run stubify.exe on file generated by linker. The only way how to achieve was to use LINK_COMMAND_SPEC. It would be much easier and less error prone to use new macro POST_LINK_SPEC introduced in

Re: State of support for the ISO C++ Transactional Memory TS and remanining work

On Tue, 2015-11-10 at 17:26 +, Szabolcs Nagy wrote: > On 09/11/15 00:19, Torvald Riegel wrote: > > Hi, > > > > I'd like to summarize the current state of support for the TM TS, and > > outline the current plan for the work that remains to complete the > > support. > > > > I'm aware we're at

Re: [C/C++ PATCH] Reject declarators with huge arrays (PR c/68107, c++/68266)

Hi, On 11/10/2015 05:36 PM, Marek Polacek wrote: + + /* Did array size calculations overflow or does the array + cover more than half of the address-space? */ + if (COMPLETE_TYPE_P (type) + && TREE_CODE (TYPE_SIZE_UNIT (type)) ==

Re: [PATCH 1/2] simplify-rtx: Simplify trunc of and of shiftrt

On Tue, Nov 10, 2015 at 12:16:09PM +0100, Bernd Schmidt wrote: > On 11/09/2015 08:33 AM, Segher Boessenkool wrote: > >If we have > > > > (truncate:M1 (and:M2 (lshiftrt:M2 (x:M2) C) C2)) > > > >we can write it instead as > > > > (and:M1 (lshiftrt:M1 (truncate:M1 (x:M2)) C) C2) > > > > > >+

Re: [RFC][PATCH] Preferred rename register in regrename pass

On Tue, Nov 10, 2015 at 05:22:40PM +0100, Christophe Lyon wrote: > On 10 November 2015 at 12:41, Robert Suchanek > wrote: > > Hi Christophe, > > > >> Hi, > >> > >> Since you committed this (r230087 if I'm correct), I can see that GCC > >> fails to build > >> ligfortran

Re: [PATCH, i386]: Fix gcc.c-torture/compile/pr41634.c FAIL

On 11/10/2015 06:54 PM, Uros Bizjak wrote: - return "movabs{}\t{%1, %0|%0, %1}"; + return "movabs{}\t{%1, %P0|[%P0], %1}"; The thing that's missing from this, that's present in the patch that I sent you off-list, is the thing for Intel syntax. Would you prefer to just add that

Re: Enable pointer TBAA for LTO

> > Index: tree.c > > === > > --- tree.c (revision 229968) > > +++ tree.c (working copy) > > @@ -13198,6 +13198,7 @@ gimple_canonical_types_compatible_p (con > >/* If the types have been previously registered and found equal > >

Re: [PATCH, i386]: Fix gcc.c-torture/compile/pr41634.c FAIL

On Tue, Nov 10, 2015 at 7:14 PM, Uros Bizjak wrote: > On Tue, Nov 10, 2015 at 7:00 PM, Richard Henderson wrote: >> On 11/10/2015 06:54 PM, Uros Bizjak wrote: >>> >>> - return "movabs{}\t{%1, %0|%0, %1}"; >>> + return "movabs{}\t{%1, %P0|[%P0], %1}";

Re: [PATCH][ARM][cleanup] Remove uses of CONST_DOUBLE_HIGH/LOW

Hi Ramana, On 10/11/15 14:33, Ramana Radhakrishnan wrote: On Thu, Nov 5, 2015 at 9:32 AM, Kyrill Tkachov wrote: Hi all, This cleanup patch removes handling of CONST_DOUBLE rtxes that carry large integers. These should never be passed down from the midend and the arm

Re: [PATCH 02/02] C FE: add fix-it hint for . vs ->

On Tue, 10 Nov 2015, David Malcolm wrote: > This is the most trivial example of a real fix-it example I could think > of: if the user writes > ptr.field > rather than ptr->field. > > gcc/c/ChangeLog: > * c-typeck.c (build_component_ref): Special-case POINTER_TYPE when >

Re: [PATCH 1/6] Use IFN_SQRT in tree-vect-patterns.c

On November 10, 2015 6:29:36 PM GMT+01:00, Joseph Myers wrote: >On Tue, 10 Nov 2015, Richard Biener wrote: > >> Looks ok but I wonder if this is dead code with >> >> (for pows (POW) >> sqrts (SQRT) >> cbrts (CBRT) >> (simplify >> (pows @0 REAL_CST@1) >>

Re: Replace match.pd DEFINE_MATH_FNs with auto-generated lists

On November 10, 2015 9:13:25 PM GMT+01:00, Richard Sandiford wrote: >Richard Biener writes: >> On Sat, Nov 7, 2015 at 2:23 PM, Richard Sandiford >> wrote: >>> diff --git a/gcc/genmatch.c b/gcc/genmatch.c >>>

libgo patch committed: always use --whole-archive in go tool

This patch changes the Go tool to always use --whole-archive when linking gccgo packages. This fixes cases where a Go package uses cgo to call C code in which the only referenced symbol is a C global variable. This is a backport of https://golang.org/cl/16775 in the master Go sources. This

Re: [patch 4/3] Header file reduction - Tools for contrib - second cut

Andrew, can you go ahead and commit those changes into contrib? I think in a subdirectory would be best so that you can include the README. Make sure the permissions are set correctly. Applying them as a patch kept mucking them up. header-tools or somesuch should be a fine directory name

Re: Replace match.pd DEFINE_MATH_FNs with auto-generated lists

Richard Biener writes: > On Sat, Nov 7, 2015 at 2:23 PM, Richard Sandiford > wrote: >> diff --git a/gcc/genmatch.c b/gcc/genmatch.c >> index cff32b0..7139476 100644 >> --- a/gcc/genmatch.c >> +++ b/gcc/genmatch.c >> @@ -4638,6 +4638,11 @@

[v3 PATCH] LWG 2510, make the default constructors of library tag types explicit.

Tested on Linux-X64. 2015-11-10 Ville Voutilainen LWG 2510, make the default constructors of library tag types explicit. * include/bits/mutex.h (defer_lock_t, try_lock_t, adopt_lock_t): Add an explicit default constructor. *

Re: [PATCH, applied], Add power9 support to GCC, patch #9 (config.gcc)

I applied this patch as obvious. I missed submitting it in my original patch for the power9 support (it was in the sandbox I was testing power9 support on). 2015-11-10 Michael Meissner * config.gcc (powerpc*-*-*, rs6000*-*-*): Add power9 to hosts that

Re: [RFC] [PATCH V2]: RE: [RFC] [Patch] Relax tree-if-conv.c trap assumptions.

On November 10, 2015 1:02:57 PM GMT+01:00, Richard Biener wrote: >On Sat, Nov 7, 2015 at 12:41 PM, Kumar, Venkataramanan > wrote: >> Hi Richard, >> >> I have now implemented storing of DR and references using hash maps. >> Please find

Re: [C/C++ PATCH] Reject declarators with huge arrays (PR c/68107, c++/68266)

On 11/10/2015 09:36 AM, Marek Polacek wrote: While both C and C++ FEs are able to reject e.g. int a[__SIZE_MAX__ / sizeof(int)]; they are accepting code such as int (*a)[__SIZE_MAX__ / sizeof(int)]; As Joseph pointed out, any construction of a non-VLA type whose size is half or more of the

[PATCH] Fix minor fallout from output_address changes

The ft32 and moxie ports failed to build after the recent output_address changes. Fixed thusly and committed to the trunk after verifying the moxie and ft32 ports in config-list.mk build again. Jeff commit b408dd85568c5d0c0a9673810280a8438753b60f Author: law

Re: [PATCH] libcpp: add examples to source_location description

On 11/10/2015 09:44 AM, David Malcolm wrote: This is a followup to: [PATCH 10/10] Compress short ranges into source_location which adds some worked examples of what a source_location/location_t can encode. Successfully bootstrapped on x86_64-pc-linux-gnu (although it only touches a comment).

[gomp4] Fix some broken tests

I've committed this to gomp4. In preparing the reworked firstprivate patch changes for gomp4's gimplify.c I discovered these testcases were passing by accident, and lacked a data clause. nathan 2015-11-10 Nathan Sidwell *

[PATCH, rs6000] Remove redundant logic from rs6000_secondary_reload_direct_move

Hi, While investigating another issue, I observed some repeated logic in rs6000_secondary_reload_direct_move (). This patch takes it out. No functional change intended, and quite straightforward, so I'll plan to commit shortly if no concerns are raised. Bootstrapped and tested on

Re: [PATCH 1/2] simplify-rtx: Simplify trunc of and of shiftrt

On 11/10/2015 06:44 PM, Segher Boessenkool wrote: Yes I know. All the rest of the code around is it like this though. Do you want this written in a saner way? I won't object to leaving it as-is for now, but in the future it would be good to keep this in mind. I'm not entirely sure what

Re: [PATCH][combine][RFC] Don't transform sign and zero extends inside mults

On Mon, Nov 09, 2015 at 03:51:32AM -0600, Segher Boessenkool wrote: > > >From the original patch submission, it looks that this patch would > > also benefit x86_32. > > Yes, that is what I thought too. > > > Regarding the above code size increase - do you perhaps have a > > testcase, to see

Re: [PATCH v4] SH FDPIC backend support

On Tue, Oct 27, 2015 at 11:01:39PM +0900, Oleg Endo wrote: > On Mon, 2015-10-26 at 22:47 -0400, Rich Felker wrote: > > On Sun, Oct 25, 2015 at 11:28:51PM +0900, Oleg Endo wrote: > > > On Fri, 2015-10-23 at 02:32 -0400, Rich Felker wrote: > > > > Here's my updated version of the FDPIC patch with

Re: [gomp4] Random omp-low.c backporting

On 11/10/15 11:28, Thomas Schwinge wrote: Hi Nathan! On Tue, 10 Nov 2015 09:19:50 -0500, Nathan Sidwell wrote: I've committed this to backport a bunch of random bits from trunk to gomp4, and thereby reduce divergence. Yeah, I had some of these on my list, too. ---

Re: [PATCH] gcc.c: new macro POST_LINK_SPECS to be able to add additional steps after linking

On 11/10/2015 11:16 AM, Andris Pavenis wrote: One may need to execute extra steps after linking program. This is required for example for DJGPP to run stubify.exe on file generated by linker. The only way how to achieve was to use LINK_COMMAND_SPEC. It would be much easier and less error prone

Re: Short-cut generation of simple built-in functions

Richard Biener writes: > On Sat, Nov 7, 2015 at 2:31 PM, Richard Sandiford > wrote: >> This patch short-circuits the builtins.c expansion code for a particular >> gimple call if: >> >> - the function has an associated internal function >> -

Re: libgo patch committed: Update to Go 1.5 release

On Sun, Nov 8, 2015 at 9:21 AM, Rainer Orth wrote: > > There were two remaining problems: > > * Before Solaris 12, sendfile only lives in libsendfile. This lead to > link failures in gotools. > > * Solaris 12 introduced a couple more types that use _in6_addr_t,

Re: [PATCH], Add power9 support to GCC, patch #10 (SFmode/DFmode d-form addressing)

This patch d-form addressing to float/double scalars for the PowerPC that was added in ISA 3.0 (power9). This patch does not yet turn on D-form addressing as default. It is likely that patch #11, which will add limited d-form addressing to vector registers will enable it by default. I have

[ptx] partitioning optimization

I've committed this patch to trunk. It implements a partitioning optimization for a loop partitioned over both vector and worker axes. We can elide the inner vector partitioning state propagation, if there are no intervening instructions in the worker-partitioned outer loop other than the

Re: [PATCH], Add power9 support to GCC, patch #10 (SFmode/DFmode d-form addressing)

Arghh, forgot the the patch once again. [gcc] 2015-11-10 Michael Meissner * config/rs6000/constraints.md (wb constraint): New constraint for ISA 3.0 d-form scalar addressing. * config/rs6000/rs6000.c (mode_supports_vmx_dform): Add

Re: [ptx] partitioning optimization

> I've been unable to introduce a testcase for this. The difficulty is we want > to check an rtl dump from the acceleration compiler, and there doesn't > appear to be existing machinery for that in the testsuite. Perhaps > something to be added later? I haven't tried it, but doesn't /* {

RE: [RFC][PATCH] Preferred rename register in regrename pass

Hi all, > > Now that 'make check' has had enough time to run, I can see several > > regressions in the configurations where GCC still builds. > > For more details: > > http://people.linaro.org/~christophe.lyon/cross-validation/gcc/trunk/230087/report-build-info.html > > > > This also causes

Re: RFC: Experimental use of Sphinx for GCC documentation

On Mon, 9 Nov 2015, Sandra Loosemore wrote: > If we're going to switch documentation formats, I'd rather we used DocBook. > I've had to use "restructured text" before and found it really awkward. I should perhaps note that the Sphinx extensions to reST are a lot better documented than the ZWiki

[Patch, MIPS] Remove definition of TARGET_PROMOTE_PROTOTYPES

This patch removes the definition of TARGET_PROMOTE_PROTOTYPES from MIPS, where it was defined as true, so that it now defaults to false. Currently MIPS does prototype promotion in the caller and the callee and this patch removes the TARGET_PROMOTE_PROTOTYPES macro definition so that the

Re: [PATCH], Add power9 support to GCC, patch #10 (SFmode/DFmode d-form addressing)

On Tue, Nov 10, 2015 at 04:56:15PM -0500, Michael Meissner wrote: > This patch d-form addressing to float/double scalars for the PowerPC that was > added in ISA 3.0 (power9). This patch does not yet turn on D-form addressing > as default. It is likely that patch #11, which will add limited

Re: [PR64164] drop copyrename, integrate into expand

On Nov 10, 2015, Alan Lawrence wrote: > FAIL: gcc.target/aarch64/aapcs64/func-ret-4.c execution, -O2 Ugh, sorry. I even checked that testcase by hand before submitting the patch, because I knew it took the paths I was changing, but I didn't realize the stack store and

Re: [RFC][PATCH] Preferred rename register in regrename pass

On 11/10/2015 11:33 PM, Robert Suchanek wrote: The reason behind the failures is that the terminated_this_insn had a different number of consecutive registers (and mode) to the input operand in a move currently being considered for tying. In the fix, I allow tying only if there is matching

Re: [C/C++ PATCH] Reject declarators with huge arrays (PR c/68107, c++/68266)

On 11/10/2015 09:36 AM, Marek Polacek wrote: While both C and C++ FEs are able to reject e.g. int a[__SIZE_MAX__ / sizeof(int)]; they are accepting code such as int (*a)[__SIZE_MAX__ / sizeof(int)]; As Joseph pointed out, any construction of a non-VLA type whose size is half or more of the

Re: RFC: Experimental use of Sphinx for GCC documentation

On Mon, 2015-11-09 at 16:37 -0700, Sandra Loosemore wrote: > On 11/08/2015 06:55 AM, David Malcolm wrote: > > I've been experimenting with using Sphinx [1] for GCC's documentation. > > > > [snip] > > > > The primary advantages of .rst/sphinx over .texi/texinfo I see are in > > the generated HTML:

Re: [gomp4] Fix some broken tests

On 11/10/2015 12:35 PM, Nathan Sidwell wrote: > I've committed this to gomp4. In preparing the reworked firstprivate > patch changes for gomp4's gimplify.c I discovered these testcases were > passing by accident, and lacked a data clause. It used to be if a reduction was on a parallel

Re: [PR64164] drop copyrename, integrate into expand

On 11/10/2015 03:58 PM, Alexandre Oliva wrote: On Nov 10, 2015, Alan Lawrence wrote: FAIL: gcc.target/aarch64/aapcs64/func-ret-4.c execution, -O2 Ugh, sorry. I even checked that testcase by hand before submitting the patch, because I knew it took the paths I was

RE: [RFC][PATCH] Preferred rename register in regrename pass

Hi, > > Bernd, do you think that this check would be sufficient and safe? > > I'm not sure what would be better: check the mode, nregs plus perhaps > > consider tying only if nregs == 1. > > Hmm, but shouldn't the regno still be the same? Or is this a case where > we have a multi-word chain like

Re: [PATCH PR52272]Be smart when adding iv candidates

On Tue, Nov 10, 2015 at 9:26 AM, Bin.Cheng wrote: > On Mon, Nov 9, 2015 at 11:24 PM, Bernd Schmidt wrote: >> On 11/08/2015 10:11 AM, Richard Biener wrote: >>> >>> On November 8, 2015 3:58:57 AM GMT+01:00, "Bin.Cheng" >>> wrote:

Re: [hsa 9/12] Small alloc-pool fix

On 11/06/2015 10:57 AM, Richard Biener wrote: > On Fri, 6 Nov 2015, Martin Liška wrote: > >> On 11/06/2015 10:00 AM, Richard Biener wrote: >>> On Thu, 5 Nov 2015, Martin Jambor wrote: >>> Hi, we use C++ new operators based on alloc-pools a lot in the subsequent patches and

Re: [PATCH, VECTOR ABI] Add __attribute__((__simd__)) to GCC.

Hi Jakub, On 29 Oct 09:54, Jakub Jelinek wrote: > On Wed, Oct 28, 2015 at 12:16:04PM +0300, Kirill Yukhin wrote: > > Bootstrapped. Regtested. Is it ok for trunk? > > > > > > gcc/ > > * omp-low.c (pass_omp_simd_clone::gate): If target allows - call > > without additional

Re: [patch] Fix PR middle-end/68251

> Tested on x86_64-suse-linux, OK for the mainline? I'll install the Fortran > testcase once it is reduced because it takes a while to compile ATM. Here it is, as reduced by Joost, installed on the mainline. 2015-11-10 Eric Botcazou * gfortran.dg/pr68251.f90:

[PATCH] Fix PR56118

The following fixes PR56118 by adjusting the cost model handling of basic-block vectorization to favor the vectorized version in case estimated cost is the same as the estimated cost of the scalar version. This makes sense because we over-estimate the vectorized cost in several places.

Re: Use combined_fn in tree-vrp.c

On Tue, Nov 10, 2015 at 1:09 AM, Bernd Schmidt wrote: > On 11/07/2015 01:46 PM, Richard Sandiford wrote: >> >> @@ -3814,8 +3817,8 @@ extract_range_basic (value_range *vr, gimple *stmt) >> break; >> /* Both __builtin_ffs* and __builtin_popcount return >>

Re: [hsa 9/12] Small alloc-pool fix

On Tue, Nov 10, 2015 at 9:47 AM, Martin Liška wrote: > On 11/06/2015 10:57 AM, Richard Biener wrote: >> On Fri, 6 Nov 2015, Martin Liška wrote: >> >>> On 11/06/2015 10:00 AM, Richard Biener wrote: On Thu, 5 Nov 2015, Martin Jambor wrote: > Hi, > > we use C++

[PATCH] vect_slp_analyze_node_dependences TLC

Some TLC also preparing for further enhancements. Bootstrapped and tested on x86_64-unknown-linux-gnu, applied. Richard. 2015-11-10 Richard Biener * tree-vect-data-refs.c (vect_slp_analyze_node_dependences): Handle memory using/clobbering stmts without a

Re: RFC: Incomplete Draft Patches to Correct Errors in Loop Unrolling Frequencies (bugzilla problem 68212)

On 11/10/2015 10:56 AM, Bernhard Reutner-Fischer wrote: On November 9, 2015 6:35:20 PM GMT+01:00, Bernd Schmidt wrote: I think something that starts with bb->loop_father and iterates outwards would be more efficient. flow_bb_inside_loop_p() ? Ah thanks. I knew there

Re: RFC: Incomplete Draft Patches to Correct Errors in Loop Unrolling Frequencies (bugzilla problem 68212)

On November 9, 2015 6:35:20 PM GMT+01:00, Bernd Schmidt wrote: >On 11/07/2015 03:44 PM, Kelvin Nilsen wrote: >> +bool >> +in_loop_p (basic_block block, struct loop *loop_ptr) >> +{ >> + basic_block *bbs = get_loop_body (loop_ptr); >> + bool result = false; >> + >> + for

Re: Extend tree-call-cdce to calls whose result is used

On Mon, Nov 9, 2015 at 10:03 PM, Michael Matz wrote: > Hi, > > On Mon, 9 Nov 2015, Richard Sandiford wrote: > >> +static bool >> +can_use_internal_fn (gcall *call) >> +{ >> + /* Only replace calls that set errno. */ >> + if (!gimple_vdef (call)) >> +return false; > > Oh, I

Re: [PATCH PR52272]Be smart when adding iv candidates

On 11/10/2015 09:25 AM, Bin.Cheng wrote: Thanks for reviewing. I haven't committed it yet, could you please point out which quoted piece is so that I can update patch? Sorry, I thought it was pretty obvious... +{ + return ccand1->hash == ccand2->hash +&& operand_equal_p

[Patch GCC 5/Vect] Partial backport of r228751 (pr68238)

Hi, As requested in the PR, this patch is a partial backport of r228751. I can't claim any responsibility for it, but I did take it through the paces on an aarch64-none-linux-gnu and x86_64-none-linux-gnu bootstrap/ test run and found no issues. Applied as r230092 on gcc-5-branch (pre-approved

Re: [PATCH 1/6] Use IFN_SQRT in tree-vect-patterns.c

On Mon, Nov 9, 2015 at 5:21 PM, Richard Sandiford wrote: > In practice all targets that can vectorise sqrt define the appropriate > sqrt2 optab. The only case where this isn't immediately obvious > is the libmass support in rs6000.c, but Mike Meissner said that it

Re: [gomp4 06/14] omp-low: copy omp_data_o to shared memory on NVPTX

On Tue, Nov 03, 2015 at 05:25:53PM +0300, Alexander Monakov wrote: > Here's an alternative patch that does not depend on exposure of shared-memory > address space, and does not try to use pass_late_lower_omp. It's based on > Bernd's suggestion to transform FYI, I've committed a new testcase to

Re: [hsa 5/12] New HSA-related GCC options

On Mon, 9 Nov 2015, Martin Jambor wrote: > Hi, > > On Fri, Nov 06, 2015 at 09:42:25AM +0100, Richard Biener wrote: > > On Thu, 5 Nov 2015, Martin Jambor wrote: > > > > > Hi, > > > > > > the following small part of the merge deals with new options. It adds > > > four independent things: > > >

Re: RFC: C++ delayed folding merge

On Mon, 9 Nov 2015, Jason Merrill wrote: > On 11/09/2015 02:28 PM, Jason Merrill wrote: > > On 11/09/2015 04:08 AM, Richard Biener wrote: > > > On Mon, 9 Nov 2015, Jason Merrill wrote: > > > > > > > I'm planning to merge the C++ delayed folding branch this week, but I > > > > need to > > > > get

[PATCH][ARM][3/3][v2] Implement negsicc, notsicc optabs

Hi all, This is a slight respin of https://gcc.gnu.org/ml/gcc-patches/2015-09/msg00075.html. This had been ok'd but I've encountered a bug with the *if__move pattern For some reason, after reload operands[1] doesn't end up living in the same register as operands[0] even though it has the

[PATCH] Fix PR68240

Bootstrapped and tested on x86_64-unknown-linux-gnu, applied to trunk. Richard. 2015-11-10 Richard Biener PR tree-optimization/68240 * tree-ssa-sccvn.c (cond_stmts_equal_p): Handle commutative compares properly. (visit_phi): For PHIs with

Re: [PATCH PR52272]Be smart when adding iv candidates

On Tue, Nov 10, 2015 at 6:06 PM, Bernd Schmidt wrote: > On 11/10/2015 09:25 AM, Bin.Cheng wrote: >>> >>> Thanks for reviewing. I haven't committed it yet, could you please >>> point out which quoted piece is so that I can update patch? > > > Sorry, I thought it was pretty

Re: [PATCH 2/6] Make builtin_vectorized_function take a combined_fn

On Mon, Nov 9, 2015 at 5:25 PM, Richard Sandiford wrote: > This patch replaces the fndecl argument to builtin_vectorized_function > with a combined_fn and gets the vectoriser to call it for internal > functions too. The patch also moves vectorisation of

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