Re: [PATCH] loading float member of parameter stored via int registers

2022-12-23 Thread Jiufu Guo via Gcc-patches
HI, Jiufu Guo via Gcc-patches writes: > Hi, > > Richard Biener writes: > >> On Thu, 22 Dec 2022, guojiufu wrote: >> >>> Hi, >>> >>> On 2022-12-21 15:30, Richard Biener wrote: >>> > On Wed, 21 Dec 2022, Jiufu Guo wrote: >&

Re: [PATCH] loading float member of parameter stored via int registers

2022-12-26 Thread Jiufu Guo via Gcc-patches
Hi, Segher Boessenkool writes: > Hi! > > On Fri, Dec 23, 2022 at 08:36:36PM +0800, Jiufu Guo wrote: >> It seems some limitations there. e.g. 1. "subreg:DF on DI register" >> may not work well on pseudo, > > It is perfectly normal: > A hard register may be accessed in various modes throughout

Re: [PATCH] loading float member of parameter stored via int registers

2022-12-26 Thread Jiufu Guo via Gcc-patches
Hi, Segher Boessenkool writes: > On Fri, Dec 23, 2022 at 08:13:48PM +0100, Richard Biener wrote: >> > Am 23.12.2022 um 17:55 schrieb Segher Boessenkool >> > : >> > There are at least six very different kinds of subreg: >> > >> > 0) Lvalue subregs. Most archs have no use for it, and it can be

[PATCH] rs6000: mark tieable between INT and FLOAT

2023-01-06 Thread Jiufu Guo via Gcc-patches
Hi, During discussing/review patches in maillist, we find more modes are tieable, e.g. DI<->DF. With some discussion, I drafted this patch to mark more tieable modes. Bootstrap and regtest pass on ppc64{,le}. Is this ok for trunk? BR, Jeff (Jiufu) gcc/ChangeLog: *

[PATCH] rs6000: Enhance lowpart/highpart DI->SF by mtvsrws/mtvsrd

2023-01-10 Thread Jiufu Guo via Gcc-patches
Hi, As mentioned in PR108338, on p9, we could use mtvsrws to implement the conversion from SI#0 to SF (or lowpart DI to SF). And we find we can also enhance the conversion from highpart DI to SF (as the case in this patch). This patch enhances these conversions accordingly. Bootstrap and

Re: [PATCH] rs6000: Enhance lowpart/highpart DI->SF by mtvsrws/mtvsrd

2023-01-10 Thread Jiufu Guo via Gcc-patches
Hi Segher, Thanks for your help to review! Segher Boessenkool writes: > Hi! > > On Tue, Jan 10, 2023 at 09:45:27PM +0800, Jiufu Guo wrote: >> As mentioned in PR108338, on p9, we could use mtvsrws to implement >> the conversion from SI#0 to SF (or lowpart DI to SF). And we find >> we can also

Re: [PATCH] loading float member of parameter stored via int registers

2023-01-02 Thread Jiufu Guo via Gcc-patches
Hi, Andrew Pinski writes: > On Thu, Dec 29, 2022 at 11:45 PM Segher Boessenkool > wrote: >> >> Hi! >> >> On Fri, Dec 30, 2022 at 10:22:31AM +0800, Jiufu Guo wrote: >> > Considering the limitations of CSE, I try to find other places >> > to handle this issue, and notice DSE can optimize below

[PATCH V2] extract DF/SF/SI/HI/QI subreg from parameter word on stack

2023-01-04 Thread Jiufu Guo via Gcc-patches
Hi, This patch is fixing an issue about parameter accessing if the parameter is struct type and passed through integer registers, and there is floating member is accessed. Like below code: typedef struct DF {double a[4]; long l; } DF; double foo_df (DF arg){return arg.a[3];} On ppc64le, with

[PATCH V4] Use reg mode to move sub blocks for parameters and returns

2023-01-04 Thread Jiufu Guo via Gcc-patches
Hi, When assigning a parameter to a variable, or assigning a variable to return value with struct type, "block move" may be used to expand the assignment if the parameter/return is passing through registers and the parameter/return has BLK mode. For this kind of case, when moving the blocks, it

Re: [PATCH V4 2/2] rs6000: use li;x?oris to build constant

2023-01-03 Thread Jiufu Guo via Gcc-patches
Hi, I would like to have a ping on this patch: https://gcc.gnu.org/pipermail/gcc-patches/2022-December/608292.html BR, Jeff (Jiufu) Jiufu Guo writes: > Hi, > > For constant C: > If '(c & 0xULL) == 0x' or say: > 32(1) || 1(0) || 15(x) || 16(0), we could use

[PATCH V3] rs6000: Load high and low part of 64bit constant independently

2023-01-03 Thread Jiufu Guo via Gcc-patches
Hi, Compare with previous version, this patch updates the comments only. https://gcc.gnu.org/pipermail/gcc-patches/2022-December/608293.html For a complicate 64bit constant, below is one instruction-sequence to build: lis 9,0x800a ori 9,9,0xabcd sldi 9,9,32 oris

Re: [PATCH] loading float member of parameter stored via int registers

2022-12-27 Thread Jiufu Guo via Gcc-patches
Hi, Jiufu Guo via Gcc-patches writes: > Hi, > > Segher Boessenkool writes: > >> On Fri, Dec 23, 2022 at 08:13:48PM +0100, Richard Biener wrote: >>> > Am 23.12.2022 um 17:55 schrieb Segher Boessenkool >>> > : >>> > There are at least six

Re: [PATCH] loading float member of parameter stored via int registers

2022-12-29 Thread Jiufu Guo via Gcc-patches
Hi, Jiufu Guo via Gcc-patches writes: > Hi, > > Jiufu Guo via Gcc-patches writes: > >> Hi, >> >> Segher Boessenkool writes: >> >>> On Fri, Dec 23, 2022 at 08:13:48PM +0100, Richard Biener wrote: >>>> > Am 23.12.2022 um 17:55 schrie

Re: [PATCH 2/3]rs6000: NFC use sext_hwi to replace ((v&0xf..f)^0x80..0) - 0x80..0

2022-12-04 Thread Jiufu Guo via Gcc-patches
Hi Kewen, "Kewen.Lin" writes: > on 2022/12/1 20:16, guojiufu wrote: >> On 2022-12-01 15:10, Jiufu Guo via Gcc-patches wrote: >>> Hi Kewen, >>> >>> 在 12/1/22 2:11 PM, Kewen.Lin 写道: >>>> on 2022/12/1 13:35, Jiufu Guo wrote: >>&g

Re: [PATCH 1/3] Use sub mode to move block for struct parameter

2022-12-04 Thread Jiufu Guo via Gcc-patches
Hi, Jiufu Guo writes: > Hi, > > This patch checks an assignment to see if the "from" is about parameter, > and if the parameter may passing through registers, then use the register > mode to move sub-blocks for the assignment. > > Bootstraped and regtested on ppc{,le} and x86_64. > Is this ok

Re: [PATCH V3] Use reg mode to move sub blocks for parameters and returns

2022-12-08 Thread Jiufu Guo via Gcc-patches
Hi Segher, Thanks a lot for your review! Segher Boessenkool writes: > Hi! > > On Wed, Dec 07, 2022 at 08:00:08PM +0800, Jiufu Guo wrote: >> When assigning a parameter to a variable, or assigning a variable to >> return value with struct type, "block move" are used to expand >> the assignment.

Re: [PATCH 3/3]rs6000: NFC no need copy_rtx in rs6000_emit_set_long_const and rs6000_emit_set_const

2022-12-09 Thread Jiufu Guo via Gcc-patches
Jiufu Guo via Gcc-patches writes: > Hi Kewen, > > 在 12/1/22 11:31 AM, Kewen.Lin 写道: >> Hi Jeff, >> >> on 2022/12/1 09:36, Jiufu Guo wrote: >>> Hi, >>> >>> Function rs6000_emit_set_const/rs6000_emit_set_long_const are only invoked >

[PATCH V4 1/2] rs6000: use li;x?oris to build constant

2022-12-11 Thread Jiufu Guo via Gcc-patches
Hi, For constant C: If '(c & 0x8000ULL) == 0x8000ULL' or say: 32(1) || 16(x) || 1(1) || 15(x), using "li; xoris" would be ok. If '(c & 0x80008000ULL) == 0x8000ULL' or say: 32(0) || 1(1) || 15(x) || 1(0) || 15(x), we could use "li; oris" to build constant 'C'.

[PATCH V4 2/2] rs6000: use li;x?oris to build constant

2022-12-11 Thread Jiufu Guo via Gcc-patches
Hi, For constant C: If '(c & 0xULL) == 0x' or say: 32(1) || 1(0) || 15(x) || 16(0), we could use "lis; xoris" to build. Here N(M) means N continuous bit M, x for M means it is ok for either 1 or 0; '||' means concatenation. This patch update

[PATCH V2] rs6000: Load high and low part of 64bit constant independently

2022-12-11 Thread Jiufu Guo via Gcc-patches
Hi, Compare with previous patch, this patch updates accoding to comments; fixes conflicts with trunk, and recheck bootstrap https://gcc.gnu.org/pipermail/gcc-patches/2022-November/607333.html For a complicate 64bit constant, blow is one instruction-sequence to build: lis 9,0x800a

[PATCH V3] Use reg mode to move sub blocks for parameters and returns

2022-12-07 Thread Jiufu Guo via Gcc-patches
Hi, When assigning a parameter to a variable, or assigning a variable to return value with struct type, "block move" are used to expand the assignment. It would be better to use the register mode according to the target/ABI to move the blocks if the parameter/return is passed through registers.

Re: [PATCH V7] rs6000: Optimize cmp on rotated 16bits constant

2022-12-19 Thread Jiufu Guo via Gcc-patches
Hi Segher, Thanks for your review, and helpful comments! Segher Boessenkool writes: > Hi! > > Mostlt nitpicking left: > > On Mon, Dec 19, 2022 at 10:06:45PM +0800, Jiufu Guo wrote: >> When checking eq/ne with a constant which has only 16bits, it can be >> optimized to check the rotated data.

Re: [PATCH V4 1/2] rs6000: use li;x?oris to build constant

2022-12-19 Thread Jiufu Guo via Gcc-patches
Hi, Segher Boessenkool writes: > Hi! > > On Mon, Dec 12, 2022 at 09:38:28AM +0800, Jiufu Guo wrote: >> PR target/106708 >> >> gcc/ChangeLog: >> >> * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Add using >> "li; x?oris" to build constant. >> >>

[PATCH V7] rs6000: Optimize cmp on rotated 16bits constant

2022-12-19 Thread Jiufu Guo via Gcc-patches
Hi, When checking eq/ne with a constant which has only 16bits, it can be optimized to check the rotated data. By this, the constant building is optimized. As the example in PR103743: For "in == 0x8000LL", this patch generates: rotldi 3,3,1 ; cmpldi 0,3,1 instead of:

Re: [PATCH V6] rs6000: Optimize cmp on rotated 16bits constant

2022-12-19 Thread Jiufu Guo via Gcc-patches
Hi, Segher Boessenkool writes: > On Wed, Dec 14, 2022 at 04:26:54PM +0800, Jiufu Guo wrote: >> Segher Boessenkool writes: >> > On Mon, Aug 29, 2022 at 11:42:16AM +0800, Jiufu Guo wrote: >> >> li %r9,-1 >> >> rldicr %r9,%r9,0,0 >> >> cmpd %cr0,%r3,%r9 >> > >> > FWIW, I

Re: [PATCH V4 1/2] rs6000: use li;x?oris to build constant

2022-12-14 Thread Jiufu Guo via Gcc-patches
Hi, "Kewen.Lin" writes: > Hi Jeff, > > on 2022/12/12 09:38, Jiufu Guo via Gcc-patches wrote: >> Hi, >> >> For constant C: >> If '(c & 0x8000ULL) == 0x8000ULL' or say: >> 32(1) || 16(x) || 1(1) |

Re: [PATCH V6] rs6000: Optimize cmp on rotated 16bits constant

2022-12-14 Thread Jiufu Guo via Gcc-patches
Hi, Jiufu Guo via Gcc-patches writes: > Hi, > > Segher Boessenkool writes: > >> Hi! >> >> Sorry for the tardiness. >> >> On Mon, Aug 29, 2022 at 11:42:16AM +0800, Jiufu Guo wrote: >>> When checking eq/ne with a constant which has only 16bits

[PATCH] loading float member of parameter stored via int registers

2022-12-20 Thread Jiufu Guo via Gcc-patches
Hi, This patch is fixing an issue about parameter accessing if the parameter is struct type and passed through integer registers, and there is floating member is accessed. Like below code: typedef struct DF {double a[4]; long l; } DF; double foo_df (DF arg){return arg.a[3];} On ppc64le, with

Re: [PATCH 3/3] Testcases for move sub blocks on param and ret

2022-12-05 Thread Jiufu Guo via Gcc-patches
Hi Segher, Thanks for your comments! Segher Boessenkool writes: > Hi! > > Some comments on the testcases: > > On Tue, Nov 29, 2022 at 09:45:07PM +0800, Jiufu Guo wrote: >> --- /dev/null >> +++ b/gcc/testsuite/gcc.target/powerpc/pr65421-1.c >> @@ -0,0 +1,25 @@ >> +/* PR target/65421 */ >> +/* {

Re: [PATCH V2] Use subscalar mode to move struct block for parameter

2022-12-05 Thread Jiufu Guo via Gcc-patches
Hi, Jeff Law writes: > On 11/28/22 20:53, Jiufu Guo wrote: > >>> >>> Right, but the number of registers is target dependent, so I don't see >>> how using "8" or any number of that matter is correct here. >> I understand. And even for the same struct type, using how many >> registers to pass a

Re: [PATCH V3] Use reg mode to move sub blocks for parameters and returns

2022-12-08 Thread Jiufu Guo via Gcc-patches
Hi Segher, Thanks a lot for your helpful comments! Segher Boessenkool writes: > On Thu, Dec 08, 2022 at 09:17:38PM +0800, Jiufu Guo wrote: >> Segher Boessenkool writes: >> > On Wed, Dec 07, 2022 at 08:00:08PM +0800, Jiufu Guo wrote: >> >> typedef struct SA {double a[3];} A; >> >> A ret_arg_pt

Re: [PATCH 2/3]rs6000: NFC use sext_hwi to replace ((v&0xf..f)^0x80..0) - 0x80..0

2022-12-08 Thread Jiufu Guo via Gcc-patches
Hi, Jiufu Guo via Gcc-patches writes: > Hi Kewen, > > "Kewen.Lin" writes: >> on 2022/12/1 20:16, guojiufu wrote: >>> On 2022-12-01 15:10, Jiufu Guo via Gcc-patches wrote: >>>> Hi Kewen, cut... >>> From 8aa8e1234b6ec34473434951a3a617

Ping^5: [PATCH V6] rs6000: Optimize cmp on rotated 16bits constant

2022-12-12 Thread Jiufu Guo via Gcc-patches
Hi, I would like to ping this: https://gcc.gnu.org/pipermail/gcc-patches/2022-August/600475.html BR, Jeff (Jiufu) Jiufu Guo via Gcc-patches writes: > Hi, > > Gentle ping: > https://gcc.gnu.org/pipermail/gcc-patches/2022-August/600475.html > > BR, > Jeff(Jiufu) > >

Re: [PATCH V6] rs6000: Optimize cmp on rotated 16bits constant

2022-12-14 Thread Jiufu Guo via Gcc-patches
Hi, Segher Boessenkool writes: > Hi! > > Sorry for the tardiness. > > On Mon, Aug 29, 2022 at 11:42:16AM +0800, Jiufu Guo wrote: >> When checking eq/ne with a constant which has only 16bits, it can be >> optimized to check the rotated data. By this, the constant building >> is optimized. >>

[PATCH V2] Update block move for struct param or returns

2022-11-24 Thread Jiufu Guo via Gcc-patches
Hi, When assigning a parameter to a variable, or assigning a variable to return value with struct type, "block move" are used to expand the assignment. It would be better to use the register mode according to the target/ABI to move the blocks. And then this would raise more opportunities for

Re: [PATCH V2] Use subscalar mode to move struct block for parameter

2022-11-20 Thread Jiufu Guo via Gcc-patches
Jiufu Guo writes: > Hi, > > As mentioned in the previous version patch: > https://gcc.gnu.org/pipermail/gcc-patches/2022-October/604646.html > The suboptimal code is generated for "assigning from parameter" or > "assigning to return value". > This patch enhances the assignment from parameters

Re: [PATCH V2] rs6000: Support to build constants by li/lis+oris/xoris

2022-11-25 Thread Jiufu Guo via Gcc-patches
Hi Kewen, Thanks a lot for your insight comments! "Kewen.Lin" writes: > Hi Jeff, > > Sorry for the late reply. > > on 2022/10/26 19:40, Jiufu Guo wrote: >> Hi, >> >> PR106708 constaint some constants which can be support by li/lis + >> oris/xoris. > typo? Oh, typo! > >

Re: [PATCH V2] Use subscalar mode to move struct block for parameter

2022-11-25 Thread Jiufu Guo via Gcc-patches
Jiufu Guo via Gcc-patches writes: > Hi Richard, > > Thanks a lot for your comments! > > Richard Biener writes: > >> On Wed, 23 Nov 2022, Jiufu Guo wrote: >> >>> Hi Jeff, >>> >>> Thanks a lot for your comments! >> >> Sorry f

Re: [PATCH]rs6000: Load high and low part of 64bit constant independently

2022-11-25 Thread Jiufu Guo via Gcc-patches
Jiufu Guo via Gcc-patches writes: > Hi Kewen, > > Thanks for your review on this patch! > > "Kewen.Lin" writes: > >> Hi Jeff, >> >> Sorry for the late review. >> >> on 2022/9/15 16:30, Jiufu Guo wrote: >>> Hi, >>

Re: [PATCH]rs6000: Load high and low part of 64bit constant independently

2022-11-25 Thread Jiufu Guo via Gcc-patches
Hi Kewen, Thanks for your review on this patch! "Kewen.Lin" writes: > Hi Jeff, > > Sorry for the late review. > > on 2022/9/15 16:30, Jiufu Guo wrote: >> Hi, >> >> For a complicate 64bit constant, blow is one instruction-sequence to >> build: >> lis 9,0x800a >> ori 9,9,0xabcd >>

Re: [PATCH V2] rs6000: Support to build constants by li/lis+oris/xoris

2022-11-29 Thread Jiufu Guo via Gcc-patches
Hi Segher, Thanks for your review! Segher Boessenkool writes: > On Mon, Nov 28, 2022 at 11:37:34AM +0800, Jiufu Guo wrote: >> Segher Boessenkool writes: >> > On Fri, Nov 25, 2022 at 04:11:49PM +0800, Kewen.Lin wrote: >> >> on 2022/10/26 19:40, Jiufu Guo wrote: >> >> for "li/lis + oris/xoris",

Re: [PATCH V2] Use subscalar mode to move struct block for parameter

2022-11-28 Thread Jiufu Guo via Gcc-patches
Hi Jeff, Thanks a lot for your comments! Jeff Law writes: > On 11/22/22 19:58, Jiufu Guo wrote: >> Hi Jeff, >> >> Thanks a lot for your comments! >> >> Jeff Law writes: >> >>> On 11/20/22 20:07, Jiufu Guo wrote: Jiufu Guo writes: > Hi, > > As mentioned in the previous

Re: [PATCH V2] rs6000: Support to build constants by li/lis+oris/xoris

2022-11-29 Thread Jiufu Guo via Gcc-patches
Hi Segher, Thanks for your comment! Segher Boessenkool writes: > On Mon, Nov 28, 2022 at 03:51:59PM +0800, Jiufu Guo wrote: >> Jiufu Guo via Gcc-patches writes: >> > Segher Boessenkool writes: >> >>> > + else >> >>>

[PATCH 1/3] Use sub mode to move block for struct parameter

2022-11-29 Thread Jiufu Guo via Gcc-patches
Hi, This patch checks an assignment to see if the "from" is about parameter, and if the parameter may passing through registers, then use the register mode to move sub-blocks for the assignment. Bootstraped and regtested on ppc{,le} and x86_64. Is this ok for trunk? BR, Jeff (Jiufu)

[PATCH V3] Use sub-mode to move block on struct param and ret

2022-11-29 Thread Jiufu Guo via Gcc-patches
Hi, When assigning a parameter to a variable, or assigning a variable to return value with struct type, "block move" are used to expand the assignment. It would be better to use the register mode according to the target/ABI to move the blocks. And then this would raise more opportunities for

[PATCH 2/3] Use sub mode to move block for struct returns

2022-11-29 Thread Jiufu Guo via Gcc-patches
Hi, This patch checks an assignment to see if it is copy block to a return variable, and if the function return through registers, then use the register mode to move sub-blocks for the assignment. Bootstraped and regtested on ppc{,le} and x86_64. Is this ok for trunk? BR, Jeff (Jiufu)

[PATCH 3/3] Testcases for move sub blocks on param and ret

2022-11-29 Thread Jiufu Guo via Gcc-patches
Hi, This patch is just add test cases, and tested on ppc64{,le}. With previous patches on this serial passed, Bootstrap and regtest passed on ppc64{,le} and x86_64. Is this ok for trunk? BR, Jeff (Jiufu) PR target/65421 gcc/testsuite/ChangeLog: *

[PATCH] NFC: use more readable pattern to clean high 32 bits

2022-11-29 Thread Jiufu Guo via Gcc-patches
Hi, This patch is just using a more readable pattern for "rldicl x,x,0,32" to clean high 32bits. Old pattern looks like: r118:DI=zero_extend(r120:DI#0) new pattern looks like: r118:DI=r120:DI&0x Bootstrap and regtest pass on ppc64{,le}. Is this ok for trunk? BR, Jeff (Jiufu)

Re: [PATCH V2] rs6000: Support to build constants by li/lis+oris/xoris

2022-11-29 Thread Jiufu Guo via Gcc-patches
Thanks for your comment! Date: Wed, 30 Nov 2022 12:30:02 +0800 Message-ID: <7ebkopxdx1@pike.rch.stglabs.ibm.com> Segher Boessenkool writes: >> > + else if ((ud4 == 0x && ud3 == 0x) >> > + && ((ud1 & 0x8000) || (ud1 == 0 && !(ud2 & 0x8000 >> > +{ >> > + temp =

[PATCH V2] Use subscalar mode to move struct block for parameter

2022-11-16 Thread Jiufu Guo via Gcc-patches
Hi, As mentioned in the previous version patch: https://gcc.gnu.org/pipermail/gcc-patches/2022-October/604646.html The suboptimal code is generated for "assigning from parameter" or "assigning to return value". This patch enhances the assignment from parameters like the below cases: /case1.c

Re: [PATCH V2] rs6000: Support to build constants by li/lis+oris/xoris

2022-11-27 Thread Jiufu Guo via Gcc-patches
Hi Segher! Thanks a lot for your comments! Segher Boessenkool writes: > Hi guys, > > On Fri, Nov 25, 2022 at 04:11:49PM +0800, Kewen.Lin wrote: >> on 2022/10/26 19:40, Jiufu Guo wrote: >> for "li/lis + oris/xoris", I interpreted it into four combinations: >> >>li + oris, lis + oris, li +

Re: [PATCH]rs6000: Load high and low part of 64bit constant independently

2022-11-27 Thread Jiufu Guo via Gcc-patches
Hi Kewen/Segher, Thanks a lot for your review! I updated the patch accordingly as below for message/code/testcase: For a complicate 64bit constant, blow is one instruction-sequence to build: lis 9,0x800a ori 9,9,0xabcd sldi 9,9,32 oris 9,9,0xc167 ori

Re: [PATCH V2] rs6000: Support to build constants by li/lis+oris/xoris

2022-11-27 Thread Jiufu Guo via Gcc-patches
Jiufu Guo via Gcc-patches writes: > Hi Segher! > > Thanks a lot for your comments! > > Segher Boessenkool writes: > >> Hi guys, >> >> On Fri, Nov 25, 2022 at 04:11:49PM +0800, Kewen.Lin wrote: >>> on 2022/10/26 19:40, Jiufu Guo wrote: >>>

Re: [PATCH 2/3]rs6000: NFC use sext_hwi to replace ((v&0xf..f)^0x80..0) - 0x80..0

2022-11-30 Thread Jiufu Guo via Gcc-patches
Hi Kewen, Thanks for your quick and insight review! 在 12/1/22 1:17 PM, Kewen.Lin 写道: > Hi Jeff, > > on 2022/12/1 09:36, Jiufu Guo wrote: >> Hi, >> >> This patch just uses sext_hwi to replace the expression like: >> ((value & 0xf..f) ^ 0x80..0) - 0x80..0 for rs6000.cc and rs6000.md. >> >>

Re: [PATCH V2] rs6000: Support to build constants by li/lis+oris/xoris

2022-12-01 Thread Jiufu Guo via Gcc-patches
Hi Segher, 在 11/28/22 10:18 PM, Segher Boessenkool 写道: > On Mon, Nov 28, 2022 at 11:37:34AM +0800, Jiufu Guo wrote: >> Segher Boessenkool writes: >>> On Fri, Nov 25, 2022 at 04:11:49PM +0800, Kewen.Lin wrote: on 2022/10/26 19:40, Jiufu Guo wrote: for "li/lis + oris/xoris", I

Re: [PATCH 2/3]rs6000: NFC use sext_hwi to replace ((v&0xf..f)^0x80..0) - 0x80..0

2022-11-30 Thread Jiufu Guo via Gcc-patches
Hi Kewen, 在 12/1/22 1:30 PM, Kewen.Lin 写道: > on 2022/12/1 13:17, Kewen.Lin via Gcc-patches wrote: >> Hi Jeff, >> >> on 2022/12/1 09:36, Jiufu Guo wrote: >>> Hi, >>> >>> This patch just uses sext_hwi to replace the expression like: >>> ((value & 0xf..f) ^ 0x80..0) - 0x80..0 for rs6000.cc and

Re: [PATCH 2/3]rs6000: NFC use sext_hwi to replace ((v&0xf..f)^0x80..0) - 0x80..0

2022-11-30 Thread Jiufu Guo via Gcc-patches
Hi Kewen, 在 12/1/22 2:11 PM, Kewen.Lin 写道: > on 2022/12/1 13:35, Jiufu Guo wrote: >> Hi Kewen, >> >> Thanks for your quick and insight review! >> >> 在 12/1/22 1:17 PM, Kewen.Lin 写道: >>> Hi Jeff, >>> >>> on 2022/12/1 09:36, Jiufu Guo wrote: Hi, This patch just uses sext_hwi to

[PATCH 1/2] rs6000: use lis;xoris to build constant

2022-12-01 Thread Jiufu Guo via Gcc-patches
Hi, For constant C: If '(c & 0xULL) == 0x' or say: 32(1) || 1(0) || 15(x) || 16(0), we could use "lis; xoris" to build. Here N(M) means N continuous bit M, x for M means it is ok for either 1 or 0; '||' means concatenation. This patch update

[PATCH 2/2] rs6000: use li;x?oris to build constant

2022-12-01 Thread Jiufu Guo via Gcc-patches
Hi, For constant C: If '(c & 0x8000ULL) == 0x8000ULL' or say: 32(1) || 16(x) || 1(1) || 15(x), using "li; xoris" would be ok. If '(c & 0x80008000ULL) == 0x8000ULL' or say: 32(0) || 1(1) || 15(x) || 1(0) || 15(x), we could use "li; oris" to build constant 'C'.

Re: [PATCH V2] rs6000: Support to build constants by li/lis+oris/xoris

2022-11-30 Thread Jiufu Guo via Gcc-patches
Date: Thu, 01 Dec 2022 09:51:32 +0800 In-Reply-To: <20221125144309.gg25...@gate.crashing.org> (Segher Boessenkool's message of "Fri, 25 Nov 2022 08:43:09 -0600") Message-ID: <7ewn7bx55n@pike.rch.stglabs.ibm.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/25.2 (gnu/linux) Segher

Re: [PATCH 3/3]rs6000: NFC no need copy_rtx in rs6000_emit_set_long_const and rs6000_emit_set_const

2022-11-30 Thread Jiufu Guo via Gcc-patches
Hi Kewen, 在 12/1/22 11:31 AM, Kewen.Lin 写道: > Hi Jeff, > > on 2022/12/1 09:36, Jiufu Guo wrote: >> Hi, >> >> Function rs6000_emit_set_const/rs6000_emit_set_long_const are only invoked >> from >> two "define_split"s where the target operand is limited to gpc_reg_operand or >> int_reg_operand,

[PATCH 3/3]rs6000: NFC no need copy_rtx in rs6000_emit_set_long_const and rs6000_emit_set_const

2022-11-30 Thread Jiufu Guo via Gcc-patches
Hi, Function rs6000_emit_set_const/rs6000_emit_set_long_const are only invoked from two "define_split"s where the target operand is limited to gpc_reg_operand or int_reg_operand, then the operand must be REG_P. And in rs6000_emit_set_const/rs6000_emit_set_long_const, to create temp rtx, it is

[PATCH 2/3]rs6000: NFC use sext_hwi to replace ((v&0xf..f)^0x80..0) - 0x80..0

2022-11-30 Thread Jiufu Guo via Gcc-patches
Hi, This patch just uses sext_hwi to replace the expression like: ((value & 0xf..f) ^ 0x80..0) - 0x80..0 for rs6000.cc and rs6000.md. Bootstrap & regtest pass on ppc64{,le}. Is this ok for trunk? BR, Jeff (Jiufu) gcc/ChangeLog: * config/rs6000/rs6000.cc (num_insns_constant_gpr): Use

[PATCH 1/3]rs6000: NFC use more readable pattern to clean high 32 bits

2022-11-30 Thread Jiufu Guo via Gcc-patches
Hi, This patch is just using a more readable pattern for "rldicl x,x,0,32" to clean high 32bits. Old pattern looks like: r118:DI=zero_extend(r120:DI#0) new pattern looks like: r118:DI=r120:DI&0x Bootstrap and regtest pass on ppc64{,le}. Is this ok for trunk? BR, Jeff (Jiufu)

Re: [PATCH V2] rs6000: Support to build constants by li/lis+oris/xoris

2022-11-30 Thread Jiufu Guo via Gcc-patches
.2 (gnu/linux) Segher Boessenkool writes: > On Mon, Nov 28, 2022 at 03:51:59PM +0800, Jiufu Guo wrote: >> Jiufu Guo via Gcc-patches writes: >> > Segher Boessenkool writes: >> >>> > + else >> >>> > + { >> >>> > +

Ping^4: [PATCH V6] rs6000: Optimize cmp on rotated 16bits constant

2022-12-01 Thread Jiufu Guo via Gcc-patches
Hi, Gentle ping: https://gcc.gnu.org/pipermail/gcc-patches/2022-August/600475.html BR, Jeff(Jiufu) Jiufu Guo via Gcc-patches writes: > Hi, > > Gentle ping this: > https://gcc.gnu.org/pipermail/gcc-patches/2022-August/600475.html > > BR, > Jeff (Jiufu) > > > Jiu

Re: [PATCH V2] Use subscalar mode to move struct block for parameter

2022-11-22 Thread Jiufu Guo via Gcc-patches
Hi Jeff, Thanks a lot for your comments! Jeff Law writes: > On 11/20/22 20:07, Jiufu Guo wrote: >> Jiufu Guo writes: >> >>> Hi, >>> >>> As mentioned in the previous version patch: >>> https://gcc.gnu.org/pipermail/gcc-patches/2022-October/604646.html >>> The suboptimal code is generated for

Re: [PATCH V2] Use subscalar mode to move struct block for parameter

2022-11-24 Thread Jiufu Guo via Gcc-patches
Hi Richard, Thanks a lot for your comments! Richard Biener writes: > On Wed, 23 Nov 2022, Jiufu Guo wrote: > >> Hi Jeff, >> >> Thanks a lot for your comments! > > Sorry for the late response ... > >> Jeff Law writes: >> >> > On 11/20/22 20:07, Jiufu Guo wrote: >> >> Jiufu Guo writes: >>

Re: [PATCH V2] Update block move for struct param or returns

2022-11-24 Thread Jiufu Guo via Gcc-patches
Based on the discussions in previous mails: https://gcc.gnu.org/pipermail/gcc-patches/2022-November/607139.html https://gcc.gnu.org/pipermail/gcc-patches/2022-November/607197.html I will update the patch accordingly, and then submit a new version. BR, Jeff (Jiufu) Jiufu Guo writes: > Hi, >

Re: [PATCH]rs6000: Load high and low part of 64bit constant independently

2022-11-27 Thread Jiufu Guo via Gcc-patches
Hi Segher! Thanks for your helpful comments! Segher Boessenkool writes: > Hi! > > On Fri, Nov 25, 2022 at 09:21:21PM +0800, Jiufu Guo wrote: >> "Kewen.Lin" writes: >> > on 2022/9/15 16:30, Jiufu Guo wrote: >> >> For a complicate 64bit constant, blow is one instruction-sequence to >> >>

Ping^3: [PATCH V6] rs6000: Optimize cmp on rotated 16bits constant

2022-11-08 Thread Jiufu Guo via Gcc-patches
Hi, Gentle ping this: https://gcc.gnu.org/pipermail/gcc-patches/2022-August/600475.html BR, Jeff (Jiufu) Jiufu Guo via Gcc-patches writes: > Gentle ping: > https://gcc.gnu.org/pipermail/gcc-patches/2022-August/600475.html > > BR, > Jeff (Jiufu) > > Jiufu Guo vi

Ping: [PATCH] rs6000: Enable const_anchor for 'addi'

2022-11-08 Thread Jiufu Guo via Gcc-patches
Hi, I would like to have a ping for this patch: https://gcc.gnu.org/pipermail/gcc-patches/2022-October/603530.html BR, Jeff(Jiufu) Jiufu Guo writes: > Hi, > > There is a functionality as const_anchor in cse.cc. This const_anchor > supports to generate new constants through adding small

Ping: [PATCH V2] rs6000: Support to build constants by li/lis+oris/xoris

2022-11-08 Thread Jiufu Guo via Gcc-patches
Hi, Gentle ping: https://gcc.gnu.org/pipermail/gcc-patches/2022-October/604415.html BR, Jeff(Jiufu) Jiufu Guo writes: > Hi, > > PR106708 constaint some constants which can be support by li/lis + oris/xoris. > > For constant C: > if '(c & 0x80008000ULL) == 0x8000ULL' or say: >

Re: [RFC] propgation leap over memory copy for struct

2022-11-08 Thread Jiufu Guo via Gcc-patches
Jiufu Guo via Gcc-patches writes: > Richard Biener writes: > >> On Tue, 1 Nov 2022, Jiufu Guo wrote: >> >>> Segher Boessenkool writes: >>> >>> > On Mon, Oct 31, 2022 at 04:13:38PM -0600, Jeff Law wrote: >>> >> On 10/30/22 20:42, J

Re: [RFC] propgation leap over memory copy for struct

2022-11-09 Thread Jiufu Guo via Gcc-patches
Hi, Richard Biener writes: > On Mon, Oct 31, 2022 at 11:14 PM Jeff Law via Gcc-patches > wrote: >> >> >> On 10/30/22 20:42, Jiufu Guo via Gcc-patches wrote: >> > Hi, >> > >> > We know that for struct variable assignment, memory copy may be us

[PATCH] Using sub-scalars mode to move struct block

2022-11-11 Thread Jiufu Guo via Gcc-patches
Hi, When assigning a struct parameter to another variable, or loading a memory block to a struct var (especially for return value), Now, "block move" would be used during expand the assignment. And the "block move" may use a type/mode different from the mode which is accessing the var. e.g. on

Re: [RFC] propgation leap over memory copy for struct

2022-11-07 Thread Jiufu Guo via Gcc-patches
Richard Biener writes: > On Tue, 1 Nov 2022, Jiufu Guo wrote: > >> Segher Boessenkool writes: >> >> > On Mon, Oct 31, 2022 at 04:13:38PM -0600, Jeff Law wrote: >> >> On 10/30/22 20:42, Jiufu Guo via Gcc-patches wrote: >> >> >We know that f

Re: [RFC] propgation leap over memory copy for struct

2022-10-31 Thread Jiufu Guo via Gcc-patches
Segher Boessenkool writes: > Hi! > > On Mon, Oct 31, 2022 at 10:42:35AM +0800, Jiufu Guo wrote: >> #define FN 4 >> typedef struct { double a[FN]; } A; >> >> A foo (const A *a) { return *a; } >> A bar (const A a) { return a; } >> /// >> >> If FN<=2; the size of "A" fits into TImode, then

Re: [RFC] propgation leap over memory copy for struct

2022-10-31 Thread Jiufu Guo via Gcc-patches
Segher Boessenkool writes: > On Mon, Oct 31, 2022 at 04:13:38PM -0600, Jeff Law wrote: >> On 10/30/22 20:42, Jiufu Guo via Gcc-patches wrote: >> >We know that for struct variable assignment, memory copy may be used. >> >And for memcpy, we may load and store more by

Re: [RFC] propgation leap over memory copy for struct

2022-10-31 Thread Jiufu Guo via Gcc-patches
Jeff Law writes: > On 10/30/22 20:42, Jiufu Guo via Gcc-patches wrote: >> Hi, >> >> We know that for struct variable assignment, memory copy may be used. >> And for memcpy, we may load and store more bytes as possible at one time. >> While it may be not be

Re: [PATCH] Using sub-scalars mode to move struct block

2022-11-14 Thread Jiufu Guo via Gcc-patches
Hi! Thanks for your helpful comments/sugguestions! Richard Biener writes: > On Mon, 14 Nov 2022, Jiufu Guo wrote: > >> >> Hi! >> Thanks so much for your review! >> >> Richard Biener writes: >> >> > On Fri, 11 Nov 2022, Jiufu Guo wrote: >> > >> >> Hi, >> >> >> >> When assigning a struct

Re: [PATCH] Using sub-scalars mode to move struct block

2022-11-13 Thread Jiufu Guo via Gcc-patches
Hi! Thanks so much for your review! Richard Biener writes: > On Fri, 11 Nov 2022, Jiufu Guo wrote: > >> Hi, >> >> When assigning a struct parameter to another variable, or loading a >> memory block to a struct var (especially for return value), >> Now, "block move" would be used during

[PATCH V3] extract DF/SF/SI/HI/QI subreg from parameter word on stack

2023-03-16 Thread Jiufu Guo via Gcc-patches
Hi, This patch is fixing an issue about parameter accessing if the parameter is struct type and passed through integer registers, and there is floating member is accessed. Like below code: typedef struct DF {double a[4]; long l; } DF; double foo_df (DF arg){return arg.a[3];} On ppc64le, with

[PATCH V5] Use reg mode to move sub blocks for parameters and returns

2023-03-16 Thread Jiufu Guo via Gcc-patches
Hi, When assigning a parameter to a variable, or assigning a variable to return value with struct type, and the parameter/return is passed through registers. For this kind of case, it would be better to use the nature mode of the registers to move the content for the assignment. As the example

Re: [PATCH V3] rs6000: Load high and low part of 64bit constant independently

2023-02-20 Thread Jiufu Guo via Gcc-patches
Hi, I would like to ping this patch: https://gcc.gnu.org/pipermail/gcc-patches/2023-January/609373.html BR, Jeff (Jiufu) Jiufu Guo writes: > Hi, > > Compare with previous version, this patch updates the comments only. > https://gcc.gnu.org/pipermail/gcc-patches/2022-December/608293.html > >

Ping^^ [PATCH V4 2/2] rs6000: use li;x?oris to build constant

2023-02-20 Thread Jiufu Guo via Gcc-patches
Hi, Gentle ping: https://gcc.gnu.org/pipermail/gcc-patches/2022-December/608292.html BR, Jeff (Jiufu) Jiufu Guo via Gcc-patches writes: > Hi, > > I would like to have a ping on this patch: > https://gcc.gnu.org/pipermail/gcc-patches/2022-December/608292.html > > &

Re: [PATCH 0/4] rs6000: build constant via li/lis;rldicX

2023-02-20 Thread Jiufu Guo via Gcc-patches
Hi, Gental ping these patches: https://gcc.gnu.org/pipermail/gcc-patches/2023-February/611286.html BR, Jeff (Jiufu) Jiufu Guo writes: > Hi, > > For a given constant, it would be profitable if we can use 2 insns to build. > This patch enables more constants building through 2 insns: one is

Re: [PATCH] rs6000: mark tieable between INT and FLOAT

2023-02-20 Thread Jiufu Guo via Gcc-patches
Hi, Gently Ping: https://gcc.gnu.org/pipermail/gcc-patches/2023-January/609504.html BR, Jeff (Jiufu) Jiufu Guo writes: > Hi, > > During discussing/review patches in maillist, we find more modes are > tieable, e.g. DI<->DF. With some discussion, I drafted this patch > to mark more tieable

Ping: [PATCH V2] extract DF/SF/SI/HI/QI subreg from parameter word on stack

2023-03-02 Thread Jiufu Guo via Gcc-patches
Hi, Gentle ping: https://gcc.gnu.org/pipermail/gcc-patches/2023-January/609396.html Thanks for comments and suggestions! I'm thinking that we may use these patches to fix some of the issues on parm and returns. Sorry for the late ping for this patch to ask if this is acceptable. BR, Jeff

Ping: [PATCH V4] Use reg mode to move sub blocks for parameters and returns

2023-03-02 Thread Jiufu Guo via Gcc-patches
Hi, Ping this patch: https://gcc.gnu.org/pipermail/gcc-patches/2023-January/609394.html Thanks for any comments and suggestions! BR, Jeff (Jiufu) Jiufu Guo writes: > Hi, > > When assigning a parameter to a variable, or assigning a variable to > return value with struct type, "block move"

[PATCH] rs6000: Enhance lowpart/highpart DI->SF by mtvsrws/mtvsrd

2023-02-16 Thread Jiufu Guo via Gcc-patches
Hi, Compare with previous version: https://gcc.gnu.org/pipermail/gcc-patches/2023-February/611823.html This patch does not define new insn for mtvsrws, but use exit one. As mentioned in PR108338, on p9, we could use mtvsrws to implement the bitcast from SI#0 to SF (or lowpart DI to SF). For

[PATCH] use subreg for movsf_from_si and remove UNSPEC_SF_FROM_SI

2023-02-24 Thread Jiufu Guo via Gcc-patches
Hi, In patch https://gcc.gnu.org/pipermail/gcc-patches/2023-February/612168.html, we improved the bictcast from lowpart/highpart of DI to SF by using mtvsrws or mtvsrd. As investigating this functionality, we may improve the related code by using bitcast subreg from SI to SF, and avoid

Re: [PATCH] testsuite: filter out warning noise for CWE-1341 test

2023-04-12 Thread Jiufu Guo via Gcc-patches
Add more reviewers. :) Jiufu Guo writes: > Hi, > > The case file-CWE-1341-example.c checkes [CWE-1341](`double-fclose`). > While on some systems, besides [CWE-1341], a message of [CWE-415] is > also reported. On those systems, attribute `malloc` may be attached on > fopen: > ``` > # 258

[PATCH] PR testsuite/106879 FAIL: gcc.dg/vect/bb-slp-layout-19.c on powerpc64

2023-04-18 Thread Jiufu Guo via Gcc-patches
Hi, On P7, option -mno-allow-movmisalign is added during testing, which prevents slp happen on the case. Like Like PR65484 and PR87306, this patch use vect_hw_misalig to guard the case on powerpc targets. Tested on ppc64{le,} and x86_64. Is this ok for trunk? BR, Jeff (Jiufu)

Re: [PATCH] rs6000: mark tieable between INT and FLOAT

2023-04-25 Thread Jiufu Guo via Gcc-patches
Hi, I would ping this patch for stage1: https://gcc.gnu.org/pipermail/gcc-patches/2023-January/609504.html BR, Jeff (Jiufu) Jiufu Guo via Gcc-patches writes: > Hi, > > Gently Ping: > https://gcc.gnu.org/pipermail/gcc-patches/2023-January/609504.html > > BR, > Jeff (J

Ping^^^ [PATCH V4 2/2] rs6000: use li;x?oris to build constant

2023-04-25 Thread Jiufu Guo via Gcc-patches
Hi, I would like to have a gentle ping for this. https://gcc.gnu.org/pipermail/gcc-patches/2022-December/608292.html BR, Jeff (Jiufu) Jiufu Guo via Gcc-patches writes: > Hi, > > Gentle ping: > https://gcc.gnu.org/pipermail/gcc-patches/2022-December/608292.html > >

ping: [PATCH] rs6000: Enable const_anchor for 'addi'

2023-04-25 Thread Jiufu Guo via Gcc-patches
Hi, I'm thinking that we may enable this patch for stage1, so ping it. https://gcc.gnu.org/pipermail/gcc-patches/2022-October/603530.html BR, Jeff (Jiufu) Jiufu Guo writes: > Hi, > > There is a functionality as const_anchor in cse.cc. This const_anchor > supports to generate new constants

ping: [PATCH V2] rs6000: Add new patterns rlwinm with mask

2023-04-25 Thread Jiufu Guo via Gcc-patches
Hi, I would like to ping this for comments. https://gcc.gnu.org/pipermail/gcc-patches/2023-February/611821.html In this patch, "subreg:DI (x:SI)" is used. I' thinking that this may be a concern, while it maybe acceptable for current code. BR, Jeff (Jiufu) Jiufu Guo writes: > Hi, > > Compare

ping: [PATCH V2] rs6000: Enhance lowpart/highpart DI->SF by mtvsrws/mtvsrd

2023-04-25 Thread Jiufu Guo via Gcc-patches
Hi I would like to ping this patch for stage1: https://gcc.gnu.org/pipermail/gcc-patches/2023-February/612168.html BR, Jeff (Jiufu) Jiufu Guo writes: > Hi, > > Compare with previous version: > https://gcc.gnu.org/pipermail/gcc-patches/2023-January/609654.html > This patch does not use UNSPEC

Ping^^ [PATCH 0/4] rs6000: build constant via li/lis;rldicX

2023-04-25 Thread Jiufu Guo via Gcc-patches
/gcc-patches/2023-February/611289.html [4/4] https://gcc.gnu.org/pipermail/gcc-patches/2023-February/611290.html Any sugguestions for the code functionality/style or to make it easy for review, please point out, thanks in advance! BR, Jeff (Jiufu) Jiufu Guo via Gcc-patches writes: >

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