Hello,
I would like to announce creation of a dedicated branch gomp4-offload to speed
up review of FE-independent offload-related features.
This branch includes:
- set of necessary patches from gomp4 branch
- set of patches which we were developed internally and were unable to
share
Hello,
I would like to announce creation of a dedicated branch gomp4-offload to speed
up review of FE-independent offload-related features.
This branch includes:
- set of necessary patches from gomp4 branch
- set of patches which we were developed internally and were unable to
share
On 02 Jul 12:45, Kirill Yukhin wrote:
Hello,
Pls disregard this mail and use previous one. Sorry.
--
Thanks, K
Hello Tobias
On 02 Jul 14:11, Tobias Burnus wrote:
Kirill Yukhin wrote:
This branch should be capable to perform offload to Intel targets (Xeon PHI)
Which Xeon PHI does it support? Knights Corner, Knights Landing, both?
Currently liboffloadmic supports KNC. Future update will add support
On 02 Jul 15:06, Tobias Burnus wrote:
Hmm, I had hoped that the work would include the forward porting of HJ's
patches from
https://software.intel.com/en-us/articles/intel-manycore-platform-software-stack-mpss
to the current trunk. In my understanding, that's all what is needed, isn't
it?
Hello Marc,
On 28 Jun 12:42, Marc Glisse wrote:
It would enable a number of optimizations, like constant
propagation, FMA contraction, etc. It would also allow us to remove
several builtins.
This should be main motivation for replacing built-ins.
But this approach IMHO should only be used for
Hello Marc.
On 04 Jul 21:11, Marc Glisse wrote:
On Thu, 3 Jul 2014, Kirill Yukhin wrote:
like combining 2 shuffles unless the result is the identity. And
expanding shuffles that can be done in a single instruction works
well.
But I am happy not doing them yet. To be very specific, could you
Hello,
We recently checked into gomp4-offload branch fix allowing bootstrap to pass
as well as fix for disabling multilib for liboffloadmic (64-bit only).
--
Thanks, K
Hello,
We've fixed build infrastructure to allow both host- and accel-compilers to live
in the same directory.
We've also got rid off some [necessary for build] environment variables.
Unfortunately currently it’s impossible to run make check-target-libgomp
from the build dir, since both accel-
Hello,
Unfortunately currently it’s impossible to run make check-target-libgomp
from the build dir, since both accel- and host-compilers need to be installed
into the same dir, otherwise host’s gcc will not find accel’s mkoffload.
We found workaround to allow make check-target-libgomp.
So,
Hello,
I'd like to announce, that I've created a branch containing initial support of
new Intel ISA extensions called AVX-512{VL,BW,DQ}. It was published here [1]
Name is: avx512-vlbwdq.
We'll start review for main trunk soon.
[1] -
Hello,
We've slightly improved mkoffload.
Branch was rebased.
--
Thanks, K
Hello,
Branch was rebased on trunk.
It contains fixes for several issues in the build system.
Now 'configure' can be called using relative path.
Also some options are now unnecessary, updated manual is posted
on wiki: https://gcc.gnu.org/wiki/Offloading in How to try offloading enabled
GCC.
--
Hello,
Patch below introduces mention of avx-512vlbwdq SVN
branch in htdocs/svn.html
Same prefix for e-mail (w/ avx-512) put intentionally.
Is it ok to install?
--
Thanks, K
===
RCS file: /cvs/gcc/wwwdocs/htdocs/svn.html,v
Hello,
With this patch we'd like to start merge process of avx-512vlbwdq
branch into main trunk.
This patch introduces new switch `-mavx512dq'
Bootstrapped.
Is it ok for trunk?
* common/config/i386/i386-common.c
(OPTION_MASK_ISA_AVX512DQ_SET): Define.
Hello Marc,
On 26 Jul 19:34, Marc Glisse wrote:
I did some AVX and AVX512F intrinsics, and it still passes the
testsuite (on my old pre-AVX x86_64-linux-gnu).
I've performed testing of your patch using functional simulator of
AVX*. And see no regressions as well.
--
Thanks, K
Hello Marc, Uroš,
On 10 Nov 21:33, Uros Bizjak wrote:
On Sun, Nov 9, 2014 at 5:26 PM, Marc Glisse marc.gli...@inria.fr wrote:
Hello,
and == for integer vectors of size 128. I was surprised not to find
_mm_cmplt_epi64 anywhere. Note that I can do the same for size 256, but not
512,
On 11 Nov 10:28, Marc Glisse wrote:
On Tue, 11 Nov 2014, Kirill Yukhin wrote:
Hello Marc, Uroš,
On 10 Nov 21:33, Uros Bizjak wrote:
On Sun, Nov 9, 2014 at 5:26 PM, Marc Glisse marc.gli...@inria.fr wrote:
Hello,
and == for integer vectors of size 128. I was surprised not to find
Hello Richard,
On 12 Nov 10:23, Richard Biener wrote:
On Wed, 5 Nov 2014, Ilya Verbin wrote:
Yes please.
Please make sure that regular LTO bootstrap still works - LTO is
only tested lightly in the testsuite.
Current main trunk fails to bootstrap w/ `bootstrap-lto':
git/gcc/configure
On 12 Nov 15:09, Richard Biener wrote:
On Wed, 12 Nov 2014, Kirill Yukhin wrote:
Hello Richard,
On 12 Nov 10:23, Richard Biener wrote:
On Wed, 5 Nov 2014, Ilya Verbin wrote:
Yes please.
Please make sure that regular LTO bootstrap still works - LTO is
only tested lightly
Hello,
Patch in the bottom extends blend/cmp/brodcast
insn patterns.
Bootstrapped.
AVX-512* tests on top of patch-set all pass
under simulator.
Is it ok for trunk?
gcc/
* config/i386/sse.md
(define_insn avx512f_blendmmode): Delete.
(define_insn
Hello,
Patch in the bottom adds support for vpmul[u]dq insn
patterns.
Bootstrapped.
AVX-512* tests on top of patch-set all pass
under simulator.
Is it ok for trunk?
gcc/
* config/i386/sse.md
(define_expand vec_widen_umult_even_v8simask_name): Add masking.
(define_insn
Hello,
Patch in the bottom adds support for vptest[n]m, ucmp, cmpeq.
Bootstrapped.
AVX-512* tests on top of patch-set all pass
under simulator.
Is it ok for trunk?
gcc/
* config/i386/i386.c
(ix86_expand_args_builtin): Handle CODE_FOR_avx512vl_cmpv4di3_mask,
Hello,
This tiny patch extends 128bit ashrv expander.
Bootstrapped.
AVX-512* tests on top of patch-set all pass
under simulator.
Is it ok for trunk?
gcc/
* config/i386/sse.md
(define_mode_iterator VI128_128 [V16QI V8HI V2DI]): Delete.
(define_expand vashrmode3mask_name):
Hello,
This patch extends andnot and any_logic insn
patterns.
Bootstrapped.
AVX-512* tests on top of patch-set all pass
under simulator.
Is it ok for trunk?
gcc/
* config/i386/sse.md
(define_insn sse_andnotVF_128_256:mode3mask_name): Add masking,
use VF_128_256 mode
Hello,
This patch introduces patterns for vpmaddubsw and vdbpsadbw
insn.
Bootstrapped.
AVX-512* tests on top of patch-set all pass
under simulator.
Is it ok for trunk?
gcc/
* config/i386/sse.md
(define_c_enum unspec): Add UNSPEC_DBPSADBW, UNSPEC_PMADDUBSW512.
Hello Uroš,
On 29 Sep 09:54, Uros Bizjak wrote:
+(define_expand vashrv2di3mask_name
+ [(set (match_operand:V2DI 0 register_operand)
+ (ashiftrt:V2DI
+ (match_operand:V2DI 1 register_operand)
+ (match_operand:V2DI 2 nonimmediate_operand)))]
+ TARGET_XOP ||
Hello Uroš,
On 29 Sep 10:00, Uros Bizjak wrote:
+ /* There is no vandnp[sd] in avx512f. Use vpandn[qd]. */
+ if (!TARGET_AVX512DQ)
All other patterns also have mask_applied condition here. Is
the above condition correct?
I think this is correct since in this pattern we use AVX-512
Hello Uroš,
On 29 Sep 10:08, Uros Bizjak wrote:
On Fri, Sep 26, 2014 at 4:09 PM, Kirill Yukhin kirill.yuk...@gmail.com
wrote:
+(define_insn avx512bw_pmaddubsw512modemask_name
+ [(set (match_operand:VI2_AVX512VL 0 register_operand =v)
+ (unspec:VI2_AVX512VL
Hello Jakub,
On 03 Oct 16:39, Jakub Jelinek wrote:
--- gcc/config/i386/sse.md.jj 2014-09-26 10:33:18.0 +0200
+++ gcc/config/i386/sse.md2014-10-03 15:03:44.170446452 +0200
@@ -10386,7 +10386,8 @@ (define_mode_iterator VEC_PERM_CONST
(V8SI TARGET_AVX) (V4DI TARGET_AVX)
Hello,
This patch extends permutations for AVX-512*.
Comments are welcome!
Bootstrapped.
AVX-512* tests on top of patch-set all pass
under simulator.
Is it ok for trunk?
gcc/
* config/i386/i386.c
(ix86_expand_vec_perm_vpermi2): Handle V64QImode, V8HImode, V16HImode,
Hello Jakub,
On 07 Oct 21:40, Jakub Jelinek wrote:
On Tue, Oct 07, 2014 at 10:12:22PM +0400, Ilya Verbin wrote:
OT, from the various IRC discussions with Kirill on IRC, it seems you or
your colleges typed pretty much all target related tests from OpenMP 4.0.1
examples, can those be also
On 08 Oct 23:02, Petr Murzin wrote:
Hi,
I have measured performance impact on Haswell platform according to this
input:
https://gcc.gnu.org/ml/gcc-patches/2014-06/msg00978.html
Same in plain text:
For `-O2':
TestPrevious Current Ratio(%)
400.perlbench 46.2000 46.2000 +0%
Hello,
This patch adds rest of vpack instruction patterns.
Bootstrapped.
gcc.target/i386.exp tests on top of patch-set show no regressions.
under simulator.
Is it ok for trunk?
gcc/
* config/i386/sse.md
(define_insn sse2_avx2_packsswbmask_name): Add masking.
(define_insn
Hello,
This tiny patch extend mulmode insn pattern to support
masking.
Bootstrapped.
AVX-512* tests on top of patch-set all pass
under simulator.
Is it ok for trunk?
gcc/
* config/i386/sse.md
(define_expand mulmode3mask_name): Add masking.
--
Thanks, K
diff --git
Hello,
This patch extends vpalignr insn patterns.
It also introduces dedicated `masked' version of pattern
w/o substing.
Bootstrapped.
AVX-512* tests on top of patch-set all pass
under simulator.
Is it ok for trunk?
gcc/
* config/i386/sse.md
(define_mode_iterator SSESCALARMODE):
Hello,
This tiny patch updates constraints in vec_dup insn
pattern.
Bootstrapped.
AVX-512* tests on top of patch-set all pass
under simulator.
Is it ok for trunk?
gcc/
* config/i386/sse.md
(define_insn vec_dupmode): Update constraints.
--
Thanks, K
diff --git
Hello,
This patch extends vpmullw, vpacksdw and pmaddwd
insn patterns.
Bootstrapped.
AVX-512* tests on top of patch-set all pass
under simulator.
Is it ok for trunk?
gcc/
* config/i386/sse.md
(define_c_enum unspec): Add UNSPEC_PMADDWD512.
(define_mode_iterator VI2_AVX2):
On 09 Oct 15:07, Kirill Yukhin wrote:
+(define_insn *mulmode3mask_name
+ [(set (match_operand:VI2_AVX2 0 register_operand =x,v)
+ (mult:VI2_AVX2 (match_operand:VI2_AVX2 1 nonimmediate_operand %0,v)
+(match_operand:VI2_AVX2 2 nonimmediate_operand
xm,vm
Hello,
This patch adds support for vpmulhrsw insn.
Bootstrapped.
AVX-512* tests on top of patch-set all pass
under simulator.
Is it ok for trunk?
gcc/
* config/i386/sse.md
(define_insn avx512bw_umulhrswv32hi3mask_name): New.
(define_expand ssse3_avx2_pmulhrswmode3_mask):
Hello,
This patch further extends maxmin patterns.
Bootstrapped.
AVX-512* tests on top of patch-set all pass
under simulator.
Is it ok for trunk?
gcc/
* config/i386/sse.md
(define_insn *codemode3_finitemask_nameround_saeonly_name):
Fix pattern conditions order.
Hello,
This obvious patch removes redundant iterator attribute
Bootstrapped.
Is it ok for trunk?
gcc/
* config/i386/sse.md (define_mode_attr avx2_avx512f): Remove.
--
Thanks, K
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index a833cd9..cf415c3 100644
---
Hello,
This patch extends VI mode iterator.
Bootstrapped.
AVX-512* tests on top of patch-set all pass
under simulator.
Is it ok for trunk?
gcc/
* config/i386/i386.c
(ix86_expand_vector_logical_operator): Handle V16SF and V8DF modes.
* config/i386/sse.md
Hello,
This patch extends pattern for reducation maxmin autogen.
Bootstrapped.
AVX-512* tests on top of patch-set all pass
under simulator.
Is it ok for trunk?
gcc/
* config/i386/sse.md
(define_mode_iterator REDUC_SMINMAX_MODE): Add V64QI and V32HI modes.
--
Thanks, K
diff
Hello,
Bootstrapped.
AVX-512* tests on top of patch-set all pass
under simulator.
Is it ok for trunk?
gcc/
* config/i386/i386.c
(emit_reduc_half): Handle V64QI and V32HI mode.
* config/i386/sse.md
(define_mode_iterator VI_AVX512BW): New.
(define_expand
Hello,
This patch extends vec_init-related routines/patterns.
Bootstrapped.
AVX-512* tests on top of patch-set all pass
under simulator.
Is it ok for trunk?
gcc/
* config/i386/i386.c
(ix86_expand_vector_init_duplicate): Handle V64QI and V32HI modes,
update V8HI, V16QI,
Hello,
This patch extends autogeneration of SI-2-SF
conversions.
Bootstrapped.
AVX-512* tests on top of patch-set all pass
under simulator.
Is it ok for trunk?
gcc/
* config/i386/i386.c
(ix86_expand_vector_convert_uns_vsivsf): Handle V16SI mode and
TARGET_AVX512VL.
--
Hello,
This patch extends movcc/vcond autogen.
Bootstrapped.
AVX-512* tests on top of patch-set all pass
under simulator.
Is it ok for trunk?
gcc/
* config/i386/i386.c
(ix86_expand_sse_movcc): Handle V64QI and V32HI mode.
(ix86_expand_int_vcond): Ditto.
--
Thanks, K
Hello folks,
On 09 Oct 14:57, Uros Bizjak wrote:
On Thu, Oct 9, 2014 at 2:28 PM, Marc Glisse marc.gli...@inria.fr wrote:
On Thu, 9 Oct 2014, Uros Bizjak wrote:
OK, let's go in the proposed way, more detailed:
- we begin with +-*/ of float/double vectors. IMO, this would result
in a
Hello Uroš,
It seems like I missed to post uppdated patch.
On 25 Sep 20:11, Uros Bizjak wrote:
I'd rather go with the second approach, it is less confusing from the
maintainer POV. All other patterns with masking use some consistent
template, so I'd suggest using the same approach for
Hello Uroš,
On 09 Oct 18:05, Uros Bizjak wrote:
On Thu, Oct 9, 2014 at 5:01 PM, Kirill Yukhin kirill.yuk...@gmail.com wrote:
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 7c34431..8a7853e 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -18811,6
Hello,
This patch extends insertion hook.
AVX-512* tests on top of patch-set all pass
under simulator.
gcc/
* config/i386/i386.c
(ix86_expand_vector_set): Handle V8DF, V8DI, V16SF, V16SI, V32HI, V64QI
modes.
--
Thanks, K
diff --git a/gcc/config/i386/i386.c
Hello,
This patch extends expand_mul_widen_hilo to 512-bit QI,SI,HI modes.
Bootstrapped and regtested
gcc/
* config/i386/i386.c
(ix86_expand_mul_widen_hilo): Handle V32HI, V16SI, V64QI modes.
Is it ok for trunk?
--
Thanks, K
diff --git a/gcc/config/i386/i386.c
Hello,
This patch extends expand_sse2_mulvxdi3.
Bootstrapped.
AVX-512* tests on top of patch-set all pass
under simulator.
Is it ok for trunk?
gcc/
* config/i386/i386.c (ix86_expand_sse2_mulvxdi3): Extend
expand_sse2_mulvxdi3.
--
Thanks, K
diff --git a/gcc/config/i386/i386.c
Hello Jakub,
On 15 Oct 18:23, Jakub Jelinek wrote:
On Thu, Oct 09, 2014 at 04:13:25PM +0400, Kirill Yukhin wrote:
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -39821,6 +39823,9 @@ ix86_expand_vector_init_duplicate (bool mmx_ok,
enum machine_mode mode,
goto widen
Hello Uroš,
On 16 Oct 14:29, Uros Bizjak wrote:
+ if (mode == V4DImode)
+ emit_insn (gen_avx512dq_mulv4di3 (op0, op1, op2));
+ else if (mode == V2DImode)
+ emit_insn (gen_avx512dq_mulv4di3 (op0, op1, op2));
Should this be v2di ?
Right, copy-and-paste
Hello,
This is fix for bootstrap failure.
Is it OK?
gcc/
* config/i386/i386.c (ix86_expand_sse2_mulvxdi3): Refactor
conditions to fix bootstrap.
--
Thanks, K
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 7040200..3ddaf3d 100644
--- a/gcc/config/i386/i386.c
Hello,
On 20 Oct 14:36, Jakub Jelinek wrote:
On Tue, Oct 14, 2014 at 11:18:28AM +0400, Kirill Yukhin wrote:
* config/i386/sse.md (define_mode_iterator VI_AVX2): Extend
to support AVX-512BW.
(define_mode_iterator VI124_AVX2_48_AVX512F): Remove.
(define_expand
2a5c128e75b4f18189d62b0e159de73272c41cf9
Author: Kirill Yukhin kirill.yuk...@intel.com
Date: Thu Mar 27 13:04:15 2014 +0400
AVX-512. Fix initialization of AVX-512 shuffle tests.
---
gcc/testsuite/gcc.target/i386/avx512f-vshuff32x4-2.c | 2 +-
gcc/testsuite/gcc.target/i386/avx512f-vshuff64x2-2.c | 2 +-
gcc
Hello Ulrich,
On 21 Mar 06:41, Ulrich Drepper wrote:
From personal experience I find it
very frustrating if a gcc release doesn't have the complete set of
intrinsics since then you have to provide your own implementations in
code which doesn't assume the latest compiler.
I think I should
Hello guys,
On 28 Mar 20:10, Uros Bizjak wrote:
Hello!
Here are more intrinsics that are missing. I know that gcc currently
generates horrible code for most of them but I think it's more important
to have the API in place, albeit non-optimal. Maybe this entices some
one to add the
Thanks! Sorry, missed that!
K
On Thu, Apr 17, 2014 at 2:13 PM, Jakub Jelinek ja...@redhat.com wrote:
On Wed, Jul 03, 2013 at 08:14:25AM +0200, Uros Bizjak wrote:
On Tue, Jul 2, 2013 at 10:32 AM, Kirill Yukhin kirill.yuk...@gmail.com
wrote:
Bootstrap passing. Updated tests passing on BMI
Hello,
On 19 May 09:58, H.J. Lu wrote:
On Mon, May 19, 2014 at 9:45 AM, Uros Bizjak ubiz...@gmail.com wrote:
On Mon, May 19, 2014 at 6:42 PM, H.J. Lu hjl.to...@gmail.com wrote:
Uros,
I am looking into libreoffice size and the data alignment seems to make
huge
difference. Data section
Hello,
On 20 May 08:24, H.J. Lu wrote:
ABI alignment should be sufficient for correctness. Bigger alignments
are supposed to give better performance. Can you try this patch on
HSW and SLM to see if it has any impact on performance?
Here is perf. data of your patch.
Only HSW so far
HSW, 64
Hello Ian, Uroš,
On 30 May 09:19, Uros Bizjak wrote:
Hello!
This error is because _mm_pause is defined in the scope of #pragma GCC
target(sse). But _mm_pause, which simply generates the pause
instruction, does not require SSE support. The pause instruction has
nothing really to do
On 30 May 13:45, Jakub Jelinek wrote:
On Fri, May 30, 2014 at 03:41:22PM +0400, Kirill Yukhin wrote:
That is definetely a bug and I see no compatibility issues in the fix.
The only nit I see: maybe it'd be better to put this cpuid-less intrinsic
into immintin.h? xmmintrin.h serves
Hello Uroš,
On 08 Jun 11:26, Uros Bizjak wrote:
On Tue, May 27, 2014 at 12:28 PM, Petr Murzin petrmurz...@gmail.com wrote:
Hi,
I've fixed tests for AVX512, so they could be compiled with -Werror
-Wall. Please have a look.
From a quick look, this looks OK.
Thanks, checked into trunk.
Could
Hello,
I think its time to remove `XPASS' from corresponding tests.
On 03 Jan 22:11, Jakub Jelinek wrote:
Hi!
On Fri, Jan 03, 2014 at 08:58:30PM +0100, Toon Moene wrote:
I don't doubt that would work, what I'm interested in, is (cat verintlin.f):
Well, you need gather loads for that and
Hello,
This patch adds news about AVX-512 to GCC main page
and entry to 4.9's changes.html.
Is it ok?
PS: I am not native speaker, any corrections are welcome!
--
Thanks, K
Index: htdocs/index.html
===
RCS file:
Hello,
I’ve noticed that _mm512_permutexvar_epi[64|32] intrinsics
have wrong arguments order. As per [1] first argument is index.
For vmpermps/vpermpd intrinsics are fine, but I’ve changed tests
to call CALC with same arg order as intrinsic. here is the same
problem (wrong argument order) with
and extending existing ones,
+ new intrinsics, and basic autovectorization.
+ Code was contributed by Sergey Guriev, Alexander Ivchenko,
+ Maxim Kuznetsov, Sergey Lega, Anna Tikhonova, Ilya Tocar,
+ Andrey Turetskiy, Ilya Verbin, Kirill Yukhin and
+ Michael Zolotukhin of Intel
Hello Uroš,
On 13 Feb 18:25, Uros Bizjak wrote:
On Thu, Feb 13, 2014 at 1:55 PM, Uros Bizjak ubiz...@gmail.com wrote:
Please don't change srcp pattern, it should be defined similar to
vrcpss (aka sse_vmrcpv4sf). You need to switch operand order
elsewhere.
No, you are correct.
Hello Uroš,
On 17 Feb 13:41, Uros Bizjak wrote:
On Mon, Feb 17, 2014 at 1:26 PM, Kirill Yukhin kirill.yuk...@gmail.com
wrote:
Please don't change srcp pattern, it should be defined similar to
vrcpss (aka sse_vmrcpv4sf). You need to switch operand order
elsewhere.
No, you
Hello,
This is relatively obvious patch which eliminates comparision
of inifinities for exp2 AVX-512 test and properly comparing floats
for avx512f-sqrtps-2.c.
Tests pass.
Is it ok for trunk?
gcc/testsuite/
* gcc.target/i386/avx512er-vexp2ps-2.c: Decrease exponent
argument to
Hello Uroš,
On 28 Feb 13:55, Uros Bizjak wrote:
On Fri, Feb 28, 2014 at 1:14 PM, Kirill Yukhin kirill.yuk...@gmail.com
wrote:
Hello,
This is relatively obvious patch which eliminates comparision
of inifinities for exp2 AVX-512 test and properly comparing floats
for avx512f-sqrtps-2.c
Hello Uroš,
On 04 Mar 01:13, Uros Bizjak wrote:
On Tue, Mar 4, 2014 at 12:31 AM, Uros Bizjak ubiz...@gmail.com wrote:
They are all:
FAIL: gcc.target/i386/avx512pf-vscatterpf0dpd-1.c (test for excess errors)
Excess errors:
/ssd/uros/gcc-build/gcc/include/avx512pfintrin.h:108:3: error:
): Add
ymm and zmm register names.
testsuite/
* gcc.target/i386/avx-additional-reg-names.c: New.
* gcc.target/i386/avx512f-additional-reg-names.c: Ditto.
--
Thanks, K
commit c3884af93c105115bc1e4d02fa824d24420c5bbf
Author: Kirill Yukhin kirill.yuk...@intel.com
Date: Mon Mar
On 17 Mar 17:52, Uros Bizjak wrote:
On Mon, Mar 17, 2014 at 4:12 PM, H.J. Lu hjl.to...@gmail.com wrote:
Is it ok for trunk?
Do we need to backport it to 4.8?
It does, but the situation is the same as with %eax vs. %rax names.
So, I think the patch is OK for mainline, and similar patch
On 17 Mar 10:16, H.J. Lu wrote:
BTW, in glibc, there are
asm volatile (vmovdqa64 %0, %%zmm0 : : x (zmm) : xmm0 );
Maybe. But I belive that this is much more clear to have instead:
asm volatile (vmovdqa64 %0, %%zmm0 : : x (zmm) : zmm0 );
--
Thanks, K
Hello Ulrich,
On 19 Mar 22:41, Ulrich Drepper wrote:
Another set of functions missing are those to set all elements of a
512-bit vector to the same float or double value. I think the patch
below uses the optimal code sequence for that. The patch requires the
previous patch introducing
Hello Ulrich,
On 21 Mar 06:41, Ulrich Drepper wrote:
This is a tested version of the patch I sent before. I'm using the
type var = var
trick for the initialization so far even those this is not ideal as I
have shown in one of the emails before. If anyone could work on a real
Hello,
On 21 Oct 11:17, Richard Biener wrote:
On Mon, Oct 20, 2014 at 3:50 PM, Jakub Jelinek ja...@redhat.com wrote:
On Mon, Oct 20, 2014 at 05:41:25PM +0400, Kirill Yukhin wrote:
Hello,
This patch adds (almost) all built-ins needed by
AVX-512VL,BW,DQ intrinsics.
Main questionable
On 21 Oct 16:20, Jakub Jelinek wrote:
On Tue, Oct 21, 2014 at 06:08:15PM +0400, Kirill Yukhin wrote:
--- a/gcc/tree.h
+++ b/gcc/tree.h
@@ -2334,6 +2334,10 @@ extern void decl_value_expr_insert (tree, tree);
#define DECL_COMDAT(NODE) \
(DECL_WITH_VIS_CHECK (NODE
On 21 Oct 18:47, Kirill Yukhin wrote:
On 21 Oct 16:20, Jakub Jelinek wrote:
On Tue, Oct 21, 2014 at 06:08:15PM +0400, Kirill Yukhin wrote:
--- a/gcc/tree.h
+++ b/gcc/tree.h
@@ -2334,6 +2334,10 @@ extern void decl_value_expr_insert (tree, tree);
#define DECL_COMDAT(NODE
Hello,
Patch was separated into two parts: tree-core.h changes and target
changes.
On 21 Oct 16:20, Jakub Jelinek wrote:
On Tue, Oct 21, 2014 at 06:08:15PM +0400, Kirill Yukhin wrote:
--- a/gcc/tree.h
+++ b/gcc/tree.h
@@ -2334,6 +2334,10 @@ extern void decl_value_expr_insert (tree, tree
Hello,
On 22 Oct 10:09, Richard Biener wrote:
On Tue, Oct 21, 2014 at 5:08 PM, Kirill Yukhin kirill.yuk...@gmail.com
wrote:
On 21 Oct 18:47, Kirill Yukhin wrote:
On 21 Oct 16:20, Jakub Jelinek wrote:
On Tue, Oct 21, 2014 at 06:08:15PM +0400, Kirill Yukhin wrote:
--- a/gcc/tree.h
Hello,
This patch introduces built-ins for gather insns.
Bootstrapped.
AVX-512* tests on top of patch-set all pass
under simulator.
Is it ok for trunk?
gcc/
* config/i386/i386.c (ix86_builtins): Add IX86_BUILTIN_GATHER3ALTSIV4DF,
IX86_BUILTIN_GATHER3ALTDIV8SF,
Hello,
This patch adds built-ins for scatter insns.
Bootstrapped.
AVX-512* tests on top of patch-set all pass
under simulator.
Is it ok for trunk?
gcc/
* config/i386/i386.c
(ix86_init_mmx_sse_builtins):
Define __builtin_ia32_gather3siv2df, __builtin_ia32_gather3siv4df,
Hello,
This tiny patch adds couple of missing immediate checks.
Bootstrapped.
AVX-512* tests on top of patch-set all pass
under simulator.
Is it ok for trunk?
gcc/
* config/i386/i386.c (ix86_expand_args_builtin): Handle
avx_vpermilv4df_mask, avx_shufpd256_mask,
Hello,
This patch extends sse-* and avx-* tests
which checks immediates/options.
Bootstrapped.
AVX-512* tests on top of patch-set all pass
under simulator.
Is it ok for trunk?
gcc/
* testsuite/g++.dg/other/i386-2.C: Add new options.
* testsuite/g++.dg/other/i386-3.C: Ditto.
Hello,
This patch introduces necessary AVX-512* intrinsics headers.
Bootstrapped.
AVX-512* tests on top of patch-set all pass
under simulator.
Is it ok for trunk?
gcc/
* config/i386/avx512bwintrin.h: New.
* config/i386/avx512dqintrin.h: Ditto.
*
Hello,
This patch adds tests for new intrinsics.
Bootstrapped.
AVX-512* tests on top of patch-set all pass
under simulator.
Is it ok for trunk?
gcc/
* testsuite/gcc.target/i386/avx512bw-check.h: New.
* testsuite/gcc.target/i386/avx512bw-kunpckdq-1.c: Ditto.
*
Hello,
This patch introduces rest of intrinsics (compare).
Bootstrapped.
AVX-512* tests on top of patch-set all pass
under simulator.
Is it ok for trunk?
gcc/
* config/i386/avx512bwintrin.h: Add new intrinsics.
* config/i386/avx512vlbwintrin.h: Ditto.
*
Hello,
This patch fixes kmov* insn generation
and adds memory alternative to `movqi_internal'
pattern
Reg-test included.
Bootstrapped.
AVX-512* tests on top of patch-set all pass
under simulator.
Is it ok for trunk?
gcc/
* config/i386/i386.md (movhi_internal): Always detect mskmov.
On 22 Oct 16:48, Kirill Yukhin wrote:
Hello,
This patch adds tests for new intrinsics.
Bootstrapped.
AVX-512* tests on top of patch-set all pass
under simulator.
Is it ok for trunk?
gcc/
* testsuite/gcc.target/i386/avx512bw-check.h: New.
Please, disregard testsuite/gcc.target
On 22 Oct 16:37, Kirill Yukhin wrote:
gcc/
* testsuite/g++.dg/other/i386-2.C: Add new options.
Please, disregard testsuite/gcc.target in overall ChangeLog entry.
--
Thanks, K
On 22 Oct 16:51, Kirill Yukhin wrote:
gcc/
* testsuite/gcc.target/i386/avx512bw-vpcmpequb-1.c: New.
Please, disregard testsuite/ in overall ChangeLog entry.
--
Thanks, K
Hello Richard, Jan,
On 16 Oct 13:22, Jakub Jelinek wrote:
On Thu, Oct 16, 2014 at 03:17:36PM +0400, Ilya Verbin wrote:
The rest LGTM, but please run it through LTO review (Richard/Honza) too.
Ping?
--
Thanks, k
Jakub
Hello Richard, Jan,
On 08 Oct 11:23, Jakub Jelinek wrote:
On Tue, Sep 30, 2014 at 06:53:20PM +0400, Ilya Verbin wrote:
Bootstrapped and regtested on top of patch 2. Is it OK for trunk?
LGTM, with the requested var/section renames.
Would like if Honza and/or Richard had a look at the
On 30 Oct 09:32, Uros Bizjak wrote:
On Thu, Oct 30, 2014 at 8:50 AM, Jan Beulich jbeul...@suse.com wrote:
gcc/testsuite:
2014-10-30 Jan Beulich jbeul...@suse.com
* gcc.target/i386/i386.exp: Extend option set to test
vect-args.c with to include -mavx, -mavx2, and
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