clobbers to epilogue_insns is not trivial, and probably not a
good idea for stage3. The patch works around the problem by disabling
fuse-caller-save in Thumb1 mode.
Build and reg-tested on arm-none-eabi.
OK for stage3?
Thanks,
- Tom
2014-11-20 Tom de Vries t...@codesourcery.com
PR rtl
work for both svn and git checkouts.
Diego,
this patch implements both:
- it uses the ~/.mklog file proposed by Peter
- in absence of a ~/.mklog file, it uses git config, also when not in a git
repository
OK?
Thanks,
- Tom
2014-11-20 Tom de Vries t...@codesourcery.com
Peter Bergner berg
On 20-11-14 17:43, Segher Boessenkool wrote:
On Thu, Nov 20, 2014 at 05:22:20PM +0100, Tom de Vries wrote:
+my $conf = $ENV{HOME}/.mklog;
+if (-f $conf) {
+open (CONF, $conf)
+ or die Could not open file '$conf' for reading: $!\n;
+while (CONF) {
+ if (m/^\s*NAME\s*=\s
actually does something.
Committed as trivial.
Thanks,
- Tom
2014-11-21 Tom de Vries t...@codesourcery.com
* gcc.dg/store-motion-fgcse-sm.c: New test.
---
gcc/testsuite/gcc.dg/store-motion-fgcse-sm.c | 32
1 file changed, 32 insertions(+)
create mode 100644 gcc
On 15-11-14 18:19, Tom de Vries wrote:
On 15-11-14 13:14, Tom de Vries wrote:
Hi,
I'm submitting a patch series with initial support for the oacc kernels
directive.
The patch series uses pass_parallelize_loops to implement parallelization of
loops in the oacc kernels region.
The patch series
On 17-11-14 11:13, Richard Biener wrote:
On Sat, 15 Nov 2014, Tom de Vries wrote:
On 15-11-14 13:14, Tom de Vries wrote:
Hi,
I'm submitting a patch series with initial support for the oacc kernels
directive.
The patch series uses pass_parallelize_loops to implement parallelization
On 24-11-14 12:28, Tom de Vries wrote:
On 17-11-14 11:13, Richard Biener wrote:
On Sat, 15 Nov 2014, Tom de Vries wrote:
On 15-11-14 13:14, Tom de Vries wrote:
Hi,
I'm submitting a patch series with initial support for the oacc kernels
directive.
The patch series uses
On 14-11-14 13:18, Jonathan Wakely wrote:
This adds system_error support to iostreams, including the required
base class changes to std::ios_base::failure. The abi_tag is used to
make it a distinct type. This changes the type of I/O exceptions
thrown by the library but exceptions are very
On 24-11-14 18:12, Jonathan Wakely wrote:
On 24/11/14 17:48 +0100, Tom de Vries wrote:
On 14-11-14 13:18, Jonathan Wakely wrote:
This adds system_error support to iostreams, including the required
base class changes to std::ios_base::failure. The abi_tag is used to
make it a distinct type
On 24-11-14 13:12, Richard Biener wrote:
On Mon, 24 Nov 2014, Tom de Vries wrote:
On 24-11-14 12:28, Tom de Vries wrote:
On 17-11-14 11:13, Richard Biener wrote:
On Sat, 15 Nov 2014, Tom de Vries wrote:
On 15-11-14 13:14, Tom de Vries wrote:
Hi,
I'm submitting a patch series with initial
?
Thanks,
- Tom
2014-11-23 Tom de Vries t...@codesourcery.com
* tree-cfg.c (verify_sese): New function.
(move_sese_region_to_fn): Call verify_sese.
* tree-cfg.h (verify_sese): Declare.
---
gcc/tree-cfg.c | 55 +++
gcc/tree-cfg.h | 1 +
2 files
On 24-11-14 11:56, Tom de Vries wrote:
On 15-11-14 18:19, Tom de Vries wrote:
On 15-11-14 13:14, Tom de Vries wrote:
Hi,
I'm submitting a patch series with initial support for the oacc kernels
directive.
The patch series uses pass_parallelize_loops to implement parallelization of
loops
On 15-11-14 18:20, Tom de Vries wrote:
On 15-11-14 13:14, Tom de Vries wrote:
Hi,
I'm submitting a patch series with initial support for the oacc kernels
directive.
The patch series uses pass_parallelize_loops to implement parallelization of
loops in the oacc kernels region.
The patch series
On 15-11-14 18:21, Tom de Vries wrote:
On 15-11-14 13:14, Tom de Vries wrote:
Hi,
I'm submitting a patch series with initial support for the oacc kernels
directive.
The patch series uses pass_parallelize_loops to implement parallelization of
loops in the oacc kernels region.
The patch series
On 15-11-14 18:21, Tom de Vries wrote:
On 15-11-14 13:14, Tom de Vries wrote:
Hi,
I'm submitting a patch series with initial support for the oacc kernels
directive.
The patch series uses pass_parallelize_loops to implement parallelization of
loops in the oacc kernels region.
The patch series
On 15-11-14 18:22, Tom de Vries wrote:
On 15-11-14 13:14, Tom de Vries wrote:
Hi,
I'm submitting a patch series with initial support for the oacc kernels
directive.
The patch series uses pass_parallelize_loops to implement parallelization of
loops in the oacc kernels region.
The patch series
On 15-11-14 18:22, Tom de Vries wrote:
On 15-11-14 13:14, Tom de Vries wrote:
Hi,
I'm submitting a patch series with initial support for the oacc kernels
directive.
The patch series uses pass_parallelize_loops to implement parallelization of
loops in the oacc kernels region.
The patch series
On 15-11-14 18:23, Tom de Vries wrote:
On 15-11-14 13:14, Tom de Vries wrote:
Hi,
I'm submitting a patch series with initial support for the oacc kernels
directive.
The patch series uses pass_parallelize_loops to implement parallelization of
loops in the oacc kernels region.
The patch series
the prettyprinters.exp file is
unsupported, which AFAIU is also required in that case.
Bootstrapped and reg-tested on x86_64.
OK for trunk/stage3?
Thanks,
- Tom
2014-11-25 Tom de Vries t...@codesourcery.com
* testsuite/libstdc++-prettyprinters/prettyprinters.exp: Add missing
dg-finish. Only print
On 25-11-14 10:28, Richard Biener wrote:
On Tue, Nov 25, 2014 at 1:01 AM, Tom de Vries tom_devr...@mentor.com wrote:
Richard,
I ran into a problem with my oacc kernels directive patch series where
tail-merge added another entry into a region that was previously
single-entry-single-exit
On 12-11-14 11:00, Tom de Vries wrote:
Jakub,
this patch fixes a gcc_assert in expand_omp_for_static_chunk.
The assert follows a loop with composite loop condition:
...
vecedge_var_map *head = redirect_edge_var_map_vector (re);
ene = single_succ_edge (entry_bb);
psi
On 08/10/12 11:24, Richard Guenther wrote:
On Sun, Oct 7, 2012 at 12:44 PM, Tom de Vries tom_devr...@mentor.com wrote:
Richard,
attached patch checks that unlinked uses do not contain ssa-names when
renaming.
This assert triggers when compiling (without the fix) the PR54735 example
Tom de Vries t...@codesourcery.com
PR rtl-optimization/61605
* regcprop.c (copyprop_hardreg_forward_1): Add copy_p and noop_p. Don't
notice stores for noops. Don't regard noops as copies.
diff --git a/gcc/regcprop.c b/gcc/regcprop.c
index 3297721..c71de98 100644
--- a/gcc/regcprop.c
+++ b
On 16-10-14 10:14, Richard Biener wrote:
On Thu, Oct 16, 2014 at 9:20 AM, Tom de Vries tom_devr...@mentor.com wrote:
On 08/10/12 11:24, Richard Guenther wrote:
On Sun, Oct 7, 2012 at 12:44 PM, Tom de Vries tom_devr...@mentor.com wrote:
Richard,
attached patch checks that unlinked uses do
On 16-10-14 14:20, Richard Biener wrote:
Richard,
I've implemented the changes listed above, and also made the message a bit
more verbose:
...
kernels-2.c: In function ‘main’:
kernels-2.c:41:5: error: statement uses released SSA name
for (COUNTERTYPE ii = 0; ii N; ii++)
^
# .MEM_57
On 11-10-14 12:46, Eric Botcazou wrote:
So, I hate the name of the option, and the documentation seems wrong to me.
It doesn’t use the caller saved registers for allocation, it uses the call
clobbered registers for allocation. Or, one could say it uses the callee
saved registers for allocation.
On 16-10-14 23:46, Eric Botcazou wrote:
Having said that, in my mind, what is confusing about the name
-fuse-caller-save, is that in fact the caller-save registers are already
used in register allocation. It's just that they're used across calls
without the need to save them, but
On 17-10-14 21:24, Eric Botcazou wrote:
Let's look at the effect of the option (after the recent fix for PR61605) on
gcc.target/i386/fuse-calller-save.c:
...
foo:
.LFB1:
.cfi_startproc
- pushq %rbx
- .cfi_def_cfa_offset 16
- .cfi_offset 3, -16
- movl
On 16-01-14 09:13, Richard Sandiford wrote:
Tom de Vries tom_devr...@mentor.com writes:
* The set of registers which are clobbered during a call by things like the plt
- these are not picked up by the use-caller-save optimization. We need the
hook to inform the compiler about
On 15-01-14 17:53, Tom de Vries wrote:
Eric,
This patch adds scanning of clobbers in CALL_INSN_FUNCTION_USAGE to
find_all_hard_reg_sets.
For MIPS, calls are split at some point. After the split, one of the resulting
insns may clobber $6. But before the split, that's not explicit in the rtl
On 16/04/14 12:28, Richard Sandiford wrote:
This patch introduces a hook that specifies which registers are implicitly
clobbered by a call, not including the registers that are clobbered in the
called function, and then uses that hook to add those registers to
CALL_INSN_FUNCTION_USAGE.
Vladimir,
All patches for the fuse-caller-save optimization have been ok-ed. The only part
not approved is the MIPS-specific part.
The objection of Richard S. is not so much the patch itself, but more the idea
of the hook fn_other_hard_reg_usage.
For clarity, I'm restating the current hook
On 17-04-14 18:49, Vladimir Makarov wrote:
I see. I guess your proposed solution is ok then.
Vladimir,
Richard,
I've updated the fuse-caller-save patch series to model non-callee call clobbers
in CALL_INSN_FUNCTION_USAGE.
There are 2 new hooks:
1.
On 22-04-14 17:27, Richard Sandiford wrote:
Tom de Vries tom_devr...@mentor.com writes:
2. post_expand_call_insn.
A utility hook to facilitate adding the clobbers to CALL_INSN_FUNCTION_USAGE.
Why is this needed though? Like I say, I think targets should update
CALL_INSN_FUNCTION_USAGE when
On 22-04-14 17:05, Tom de Vries wrote:
I've updated the fuse-caller-save patch series to model non-callee call clobbers
in CALL_INSN_FUNCTION_USAGE.
Vladimir,
This patch adds a hook to indicate whether a target has added the non-callee
call clobbers to CALL_INSN_FUNCTION_USAGE, meaning it's
On 22-04-14 18:18, Richard Sandiford wrote:
Tom de Vries tom_devr...@mentor.com writes:
On 22-04-14 17:27, Richard Sandiford wrote:
Tom de Vries tom_devr...@mentor.com writes:
2. post_expand_call_insn.
A utility hook to facilitate adding the clobbers to CALL_INSN_FUNCTION_USAGE.
Why
.
avoid the very ugly set-inside-use idiom and do:
record_hard_reg_sets (XEXP (op, 0), NULL, pset);
instead of reimplementing it manually.
Updated as attached, I'll retest and commit.
Thanks,
- Tom
2014-01-15 Tom de Vries t...@codesourcery.com
* rtlanal.c (find_all_hard_reg_sets
On 22-04-14 17:05, Tom de Vries wrote:
I've updated the fuse-caller-save patch series to model non-callee call clobbers
in CALL_INSN_FUNCTION_USAGE.
Vladimir,
This is the updated version of the previously approved patch
http://gcc.gnu.org/ml/gcc-patches/2013-03/msg01320.html , updated
On 22-04-14 17:05, Tom de Vries wrote:
I've updated the fuse-caller-save patch series to model non-callee call clobbers
in CALL_INSN_FUNCTION_USAGE.
Eric,
Richard Sandiford mentioned here (
http://gcc.gnu.org/ml/gcc-patches/2014-04/msg00870.html ):
...
Although we really should have
On 22-04-14 17:05, Tom de Vries wrote:
I've updated the fuse-caller-save patch series to model non-callee call clobbers
in CALL_INSN_FUNCTION_USAGE.
Eric,
this patch adds a post_expand_call_insn hook.
The hook is called right after expansion of calls, and allows a target to do
additional
commit shortly, as obvious.
Thanks,
- Tom
2014-04-23 Tom de Vries t...@codesourcery.com
* target-hooks-macros.h: Fix DEFHOOKPOD argument order in comment.
diff --git a/gcc/target-hooks-macros.h b/gcc/target-hooks-macros.h
index 5cf4cb1..901f824 100644
--- a/gcc/target-hooks-macros.h
Obradovic robrado...@mips.com
Tom de Vries t...@codesourcery.com
* target.def (call_fusage_contains_non_callee_clobbers): New DEFHOOKPOD.
* doc/tm.texi.in (@node Stack and Calling): Add Miscellaneous Register
Hooks to @menu.
(@node Miscellaneous Register Hooks
On 22-04-14 17:05, Tom de Vries wrote:
I've updated the fuse-caller-save patch series to model non-callee call clobbers
in CALL_INSN_FUNCTION_USAGE.
Richard,
this patch enables the fuse-caller-save optimization for MIPS.
It adds the $6 clobber in CALL_INSN_FUNCTION_USAGE when required
[4] = gen_reg_rtx (XFmode);
...
operands is declared with size 3, and operands[3,4] accesses are out of bounds.
I've done a minimal build with attached patch, and reran the test-case, which
passes now.
OK if bootstrap succeeds?
Thanks,
- Tom
2014-04-26 Tom de Vries t...@codesourcery.com
On 25-04-14 15:22, Richard Sandiford wrote:
Tom de Vries tom_devr...@mentor.com writes:
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 45256e9..b61cd44 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -7027,11 +7027,17 @@ mips_expand_call (enum
-save patch series, bootstrapped and reg-tested on
x86_64, and build and reg-tested on MIPS.
Eric, non-cgraph part OK for trunk?
Honza, cgraph part OK for trunk?
Thanks,
- Tom
2013-04-29 Radovan Obradovic robrado...@mips.com
Tom de Vries t...@codesourcery.com
* cgraph.h (struct
OK if bootstrap succeeds?
With testing of the bootstrap build of the patch, I ran into the following
regression compared to a reference bootstrap build without the patch:
...
FAIL: g++.dg/tsan/cond_race.C -O2 output pattern test, is ==3087==WARNING:
Program is run with unlimited stack
On 27-04-14 12:27, Richard Sandiford wrote:
Tom de Vries tom_devr...@mentor.com writes:
2014-01-12 Radovan Obradovic robrado...@mips.com
Tom de Vries t...@codesourcery.com
* config/mips/mips-protos.h (mips_emit_call_insn): Declare.
* config/mips/mips.h
On 28-04-14 12:26, Richard Sandiford wrote:
Tom de Vries tom_devr...@mentor.com writes:
On 27-04-14 12:27, Richard Sandiford wrote:
Tom de Vries tom_devr...@mentor.com writes:
mips_emit_call_insn (rtx pattern, rtx orig_addr, rtx addr, bool lazy_p)
{
rtx insn, reg;
- insn
On 28-04-14 12:47, Tom de Vries wrote:
Hmm, is that just because -fcaller-saves is -O2 and above?
For -O1, after adding -fcaller-saves the optimization triggers, and the
test-cases passes.
For -O0, adding -fcaller-saves doesn't make a difference, the optimization
doesn't trigger.
If so
On 24-04-14 17:13, Eric Botcazou wrote:
The hook is called right after expansion of calls, and allows a target to do
additional processing, such as f.i. adding clobbers to
CALL_INSN_FUNCTION_USAGE.
Instead of using the hook, we could add code to the preparation statements
operand of the
On 29-04-14 20:56, Richard Henderson wrote:
I've written this concept patch, which tries to address the same problem, but
in a different (and I hope more generic) way.
It adds a post-emission C-code operand to define_expand.
As an example of how this could be useful, for the define_expand of
On 26-04-14 14:51, Tom de Vries wrote:
Eric,
Honza,
This patch adds analysis in pass_final to track which hard registers are set or
clobbered by the function body, and stores that information in a
struct cgraph_node, to be used in the fuse-caller-save optmization.
This is the updated version
the
collected register usage information, so it seems a good location to do an
early-out. I've left it in for now.
Bootstrapped and reg-tested on x86_64.
non-cgraph part OK for trunk?
Thanks,
- Tom
2014-05-19 Radovan Obradovic robrado...@mips.com
Tom de Vries t...@codesourcery.com
.
OK for trunk ?
Thanks,
- Tom
2014-05-19 Tom de Vries t...@codesourcery.com
* cgraphunit.c (cgraph_add_new_function): Dump message on new function.
(analyze_function): Don't dump function to gimple dump file.
* gimplify.c: Add tree-dump.h include.
(gimplify_function_tree): Dump function
warning that becomes an error
during stage 3.
Bill,
thanks for letting me know.
I've bootstrapped attached patch on x86_64, and committed it.
Thanks,
- Tom
2014-05-29 Tom de Vries t...@codesourcery.com
* final.c (collect_fn_hard_reg_usage): Guard variable declaration
with #ifdef STACK_REGS
.
...
It looks like BLOCK_SYMBOL_CHECK hasn't been updated.
Patch below fixes it for me. OK for trunk if bootstrap on x86_64 succeeds?
Thanks,
- Tom
2014-05-29 Tom de Vries t...@codesourcery.com
* rtl.h (BLOCK_SYMBOL_CHECK): Use SYMBOL_REF_FLAGS.
---
gcc/rtl.h | 2 +-
1 file changed, 1 insertion
.
The only functional difference between the patches is that we no longer add
printing a debug message in lra_assign. Committed (since the difference between
the approved and new patch is trivial).
Thanks,
- Tom
2014-05-30 Tom de Vries t...@codesourcery.com
* lra-int.h (struct lra_reg
to true for i386? Are there clobbers which
need to be added?
If it's safe to set this hook to true, OK for trunk?
Thanks,
- Tom
2014-05-30 Tom de Vries t...@codesourcery.com
* config/i386/i386.c (TARGET_CALL_FUSAGE_CONTAINS_NON_CALLEE_CLOBBERS):
Redefine as true.
* gcc.target/i386/fuse-caller
@@
+/* Testcase for PR target/46219. */
+/* { dg-do compile { xfail { *-*-* } } */
Hi,
I've committed this follow-up patch to add a missing closing brace.
Thanks,
- Tom
2014-05-31 Tom de Vries t...@codesourcery.com
* gcc.target/i386/sibcall-4.c: Add missing closing brace.
diff --git a/gcc
tmp.patch
$ touch tmp.patch
$ ls -la tmp.patch
-rw-rw-r-- 1 vries vries 0 mei 31 09:41 tmp.patch
$ ./contrib/mklog tmp.patch
$ ls -la tmp.patch
-rw-rw-r-- 1 vries vries 59 mei 31 09:41 tmp.patch
...
OK for trunk?
Thanks,
- Tom
2014-05-31 Tom de Vries t...@codesourcery.com
* mklog: Keep permissions
.
Build and tested on aarch64-linux-gnu.
OK for trunk?
Thanks,
- Tom
2014-06-01 Tom de Vries t...@codesourcery.com
* config/aarch64/aarch64-protos.h (aarch64_emit_call_insn): Declare.
* config/aarch64/aarch64.c
(TARGET_CALL_FUSAGE_CONTAINS_NON_CALLEE_CLOBBERS): Redefine as true
On 30-05-14 10:20, Ramana Radhakrishnan wrote:
On Fri, May 30, 2014 at 9:14 AM, Tom de Vries tom_devr...@mentor.com wrote:
Marcus,
when building for aarch64-linux-gnu with --enable-checking=yes,rtl, I run
into the following error:
...
In file included from src/libgcc/libgcc2.c:56:0:
src/libgcc
.
Build and tested on arm-linux-gnueabi.
OK for trunk?
Thanks,
- Tom
2014-06-01 Radovan Obradovic robrado...@mips.com
Tom de Vries t...@codesourcery.com
* config/arm/arm-protos.h (arm_emit_call_insn): Add bool parameter.
* config/arm/arm.c
Andreas,
This patch ensures that INTVAL is only used on a CONST_INT in define_expands
addptrdi3 and addptrsi3. I ran into this issue when building gcc for target s390
with --enable-checking=yes,rtl.
Finished s390 build with patch, and committed as trivial.
Thanks,
- Tom
2014-06-04 Tom de
Richard,
Ping for these patches:
- [PATCH, ARM] Enable fuse-caller-save for ARM
https://gcc.gnu.org/ml/gcc-patches/2014-06/msg8.html
- [PATCH, AARCH64] Enable fuse-caller-save for AARCH64
https://gcc.gnu.org/ml/gcc-patches/2014-06/msg4.html
The patches enable the -fuse-caller-save
Thomas,
This patch marks fopenacc as LTO option.
This allows fopenacc to be passed to lto, which means the openacc builtins are
recognized when reading in the LTO stream. This fixes a number of testcases in
the libgomp testsuite.
ok for gomp-4_0-branch?
Thanks,
- Tom
2014-11-03 Tom de
Tom de Vries t...@codesourcery.com
* testsuite/libgomp.oacc-c++/c++.exp: Set default LIBGOMP_PLUGIN_PATH.
Print used LIBGOMP_PLUGIN_PATH.
* testsuite/libgomp.oacc-c/c.exp: Same.
* testsuite/libgomp.oacc-fortran/fortran.exp: Same.
diff --git a/libgomp/testsuite/libgomp.oacc-c++/c++.exp b
Thomas,
This patch fixes the libgomp-oacc.c/lib-66.c testcase.
It allows the test to run for non-shared mem accelerators, and skips the test
otherwise.
ok for gomp-4_0-branch?
Thanks,
- Tom
2014-11-03 Tom de Vries t...@codesourcery.com
* testsuite/libgomp.oacc-c/lib-66.c: Skip
Thomas,
this patch skips the nvidia accelerator in testing libgomp, if the nvidia
accelerator is not present.
OK for gomp-4_0-branch?
Thanks,
- Tom
2014-11-03 Tom de Vries t...@codesourcery.com
* testsuite/libgomp.oacc-c++/c++.exp: Only use nvidia accelerator if
present.
* testsuite
On 04-11-14 23:34, Tom de Vries wrote:
Thomas,
this patch sets LIBGOMP_PLUGIN_PATH to the .libs dir in the build area, if
LIBGOMP_PLUGIN_PATH has not been defined.
This allows f.i. a gcc build without an accelerator configured, to automatically
pick up the host_nonshm plugin.
Updated
On 04-11-14 23:46, Tom de Vries wrote:
Thomas,
This patch fixes the libgomp-oacc.c/lib-66.c testcase.
It allows the test to run for non-shared mem accelerators, and skips the test
otherwise.
Fixed path in log message (testsuite/libgomp.oacc-c/lib-66.c -
testsuite/libgomp.oacc-c-c++-common
On 01-09-14 18:41, Ulrich Weigand wrote:
Tom de Vries wrote:
* ira-costs.c (ira_tune_allocno_costs): Use
ALLOCNO_CROSSED_CALLS_CLOBBERED_REGS to adjust costs.
In debugging PR 53864 on s390x-linux, I ran into a weird change in behavior
that occurs when the following part
On 03-09-14 20:12, Ulrich Weigand wrote:
Just for my curiosity, why is the second condition (after )
needed in this clause in the first place?
if (ira_hard_reg_set_intersection_p (regno, mode,
+ *crossed_calls_clobber_regs)
+
On 03-09-14 18:58, Tom de Vries wrote:
I've build the patch and ran the fuse-caller-save tests, and I'm currently
bootstrapping and reg-testing it on x86_64.
Vladimir,
This patch fixes a problem (found on s390) in one of the committed
fuse-caller-save patches. s390 is the only user
On 18-09-14 19:46, Diego Novillo wrote:
On Thu, Sep 18, 2014 at 10:56 AM, Yury Gribov y.gri...@samsung.com wrote:
On 08/04/2014 12:14 PM, Tom de Vries wrote:
On 04-08-14 08:45, Yury Gribov wrote:
Thanks! My 2 (actually 4) cents below.
Hi Yuri,
thanks for the review.
+if ($#ARGV
[with CC to gcc-patches]
Original Message
Subject: [PATCH] Fix PR55876 - Make generation of paradoxical subreg in
widen_operand more robust
Date: Mon, 07 Jan 2013 11:13:49 +0100
From: Tom de Vries tom_devr...@mentor.com
To: Richard Henderson r...@redhat.com
CC: Steve Ellcey sell
the patch and a cc1 recompile, I'm able to run pr55890-{1,2,3}.c
successfully.
OK for trunk after I've tested this on mips64?
Thanks,
- Tom
2013-01-09 Tom de Vries t...@codesourcery.com
PR middle-end/55890
* calls.c (expand_call): Check if arg_nr is valid.
Index: gcc/calls.c
On 11/01/13 12:02, Greta Yorsh wrote:
Tom, are you going to apply this patch?
Greta,
While testing I've ran into several issues with timeouts (not related to this
patch) that I needed to address, so it took me a bit, but I started the latest
build test run yesterday evening so I expect to
On 07/01/13 18:48, Richard Henderson wrote:
On 01/07/2013 02:16 AM, Tom de Vries wrote:
- /* If MODE is no wider than a single word, we return a paradoxical
- SUBREG. */
+ /* If MODE is no wider than a single word, we return a
+ lowpart or paradoxical SUBREG
Steven,
On 19/07/12 16:43, Steven Bosscher wrote:
On Thu, Jul 19, 2012 at 3:43 PM, Tom de Vries tom_devr...@mentor.com wrote:
I think you should compare your method to the one described in the
paper, and at least reference the paper if it's somehow similar --
Interesting, thanks. Will do
Obradovic robrado...@mips.com
Tom de Vries t...@codesourcery.com
* hooks.c (hook_void_hard_reg_set_containerp): New function.
* hooks.h (hook_void_hard_reg_set_containerp): Declare.
* target.def (fn_other_hard_reg_usage): New DEFHOOK.
* config/arm/arm.c
.
Bootstrapped and reg-tested by Mikael Pettersson on both x86_64-linux and
sparc64-linux.
OK for trunk?
Thanks,
- Tom
2013-02-04 Tom de Vries t...@codesourcery.com
PR rtl-optimization/56131
* cfgrtl.c (delete_insn): Use NOTE_BASIC_BLOCK instead of BLOCK_FOR_INSN
to get
fixes the problems by:
- using NOTE_BASIC_BLOCK to find the bb of NOTE_INSN_BASIC_BLOCK, and
- explicitly handling the cases that the bb of either the label or the note
is NULL.
I don't think that we need to handle the very last case.
OK.
2013-02-04 Tom de Vries t...@codesourcery.com
On 05/02/13 10:50, Jakub Jelinek wrote:
On Tue, Feb 05, 2013 at 10:41:51AM +0100, Tom de Vries wrote:
On 05/02/13 10:02, Eric Botcazou wrote:
The problem is that in delete_insn, while deleting an undeletable label (in
other words, transforming a label into a INSN_NOTE_DELETED_LABEL):
- we try
On 05/02/13 11:12, Jakub Jelinek wrote:
On Tue, Feb 05, 2013 at 11:01:22AM +0100, Tom de Vries wrote:
I'm not sure I understand your comment.
The BLOCK_FOR_INSN of the note was NULL. The NOTE_BASIC_BLOCK of the note was
correct. Are you saying that the BLOCK_FOR_INSN should not have been NULL
Vladimir,
On 25/01/13 16:36, Vladimir Makarov wrote:
On 01/25/2013 08:05 AM, Tom de Vries wrote:
Vladimir,
this patch adds analysis of register usage of functions for usage by IRA.
The patch:
- adds analysis in pass_final to track which hard registers are set or
clobbered
On 03/04/2011 08:37 AM, Paolo Bonzini wrote:
On 03/03/2011 03:28 PM, Tom de Vries wrote:
reg-tested on x86_64. Better?
Yes, very much so
Great. Thanks for the review.
(talking about patch 6.5; the other one is an
optimization but not essential based on the new comments).
Just one
Hi Zdenek,
I rewrote the patch to remove the use of use_uses_inced_iv.
On 03/14/2011 03:03 PM, Zdenek Dvorak wrote:
Hi,
(since the use_uses_inced_iv test is meaningless).
To me it seems use_uses_inced_iv has meaning:
- it models something: it states whether the comparison is using
the
This patch set fixes PR 43920 - 'Choosing conditional execution over
conditional branches for code size in some cases'.
The patch set was tested on ARM and x86_64. The codesize changes were
benchmarked for ARM Thumb-2. For SPEC2000 and EEMBC CoreMark, a
reduction of 1.1% in the geomean of the
A testcase for the code in arm-size-branch_cost.patch.
Thanks,
- Tom
Index: gcc/testsuite/gcc.target/arm/pr43920-1.c
===
--- gcc/testsuite/gcc.target/arm/pr43920-1.c (revision 0)
+++ gcc/testsuite/gcc.target/arm/pr43920-1.c (revision
The impact of patches 4-9 of the patch set on the example from the bug
report for ARM Thumb-2 -Os is a further size reduction of 7%, from 58 to
54 bytes.
This size reduction is illustrated in this diff of the assembly
(left, without patches, size 58. right, with patches, size 54):
...
push
Currently uses and clobbers are counted as insns in crossjumping, which
can cause undesirable crossjumping. The patch fixes this.
Thanks,
- Tom
Index: gcc/cfgcleanup.c
===
--- gcc/cfgcleanup.c (revision 170556)
+++ gcc/cfgcleanup.c
Inserts use of return register in epilogue threading, to keep
representation consistent, and prevent mismatch in crossjump matching.
Thanks,
- Tom
Index: gcc/function.c
===
--- gcc/function.c (revision 170556)
+++ gcc/function.c
Allows crossjump over fallthru paths.
Thanks,
- Tom
diff -u gcc/cfgcleanup.c gcc/cfgcleanup.c
--- gcc/cfgcleanup.c (working copy)
+++ gcc/cfgcleanup.c (working copy)
@@ -1139,6 +1139,43 @@
}
}
+ /* Walks from I1 in BB1 backward till the next non-debug insn, and returns the
+resulting
Test-case for crossjump-fallthru-ml.patch.
Thanks,
- Tom
Index: gcc/testsuite/gcc.target/arm/pr43920-2.c
===
--- gcc/testsuite/gcc.target/arm/pr43920-2.c (revision 0)
+++ gcc/testsuite/gcc.target/arm/pr43920-2.c (revision 0)
@@ -0,0
Allow crossjumping in both directions. Crossjump was assumed to be
symmetric, and therefore only applied on edges e1,e2 and not on e2,e1.
Now given both the fallthru fix and the regnotes fix, crossjumping is
not symmetrical anymore, and we allow both directions (but not by
testing twice).
Thanks,
Hi Jeff,
On 03/31/2011 08:36 PM, Jeff Law wrote:
On 03/31/11 12:35, Tom de Vries wrote:
Currently uses and clobbers are counted as insns in crossjumping, which
can cause undesirable crossjumping. The patch fixes this.
OK. Please install.
jeff
I don't have an account at sourceware.org
Reposting, with ChangeLog.
2011-04-01 Tom de Vries t...@codesourcery.com
PR target/43920
* config/arm/arm.h (BRANCH_COST): Set to 1 for Thumb-2 when optimizing
for size.
Index: gcc/config/arm/arm.h
===
--- gcc/config/arm/arm.h
Reposting, with ChangeLog.
2011-04-01 Tom de Vries t...@codesourcery.com
PR target/43920
* gcc/testsuite/gcc.target/arm/pr43920-1.c: New test.
Index: gcc/testsuite/gcc.target/arm/pr43920-1.c
===
--- gcc/testsuite/gcc.target/arm
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