Hello!
The mode of address_operand predicate is ignored in ix86_legitimate_address_p.
2012-08-13 Uros Bizjak ubiz...@gmail.com
* config/i386/i386.md (prefetch): Do not assert mode of operand 0.
(*prefetch_sse_mode): Do not set mode of address_operand predicate.
Rename
On Thu, Sep 13, 2012 at 5:52 PM, Jakub Jelinek ja...@redhat.com wrote:
The fma-*.c testcase show that these intrinsics probably mean to preserve
the high elements (other than the lowest) of the first argument of the
fmaintrin.h *_s{s,d} intrinsics in the destination (the HW insn preserve
On Wed, Jul 6, 2011 at 7:34 PM, Ian Lance Taylor i...@google.com wrote:
This seems like a reasonable patch to me, but technically speaking it is
incomplete. Go should have IEEE floating point behaviour by default. I
believe Java is the same. Ideally there would be a target-independent
way
On Wed, Jul 6, 2011 at 10:14 PM, Joseph S. Myers
jos...@codesourcery.com wrote:
This patch removes three unused t-* makefile fragments. (t-pa is
unused because no target uses it explicitly and all PA targets define
nonempty tmake_file; t-$cpu_type is is only used implicitly if
tmake_file is
On Tue, Jul 5, 2011 at 10:12 PM, Ian Lance Taylor i...@google.com wrote:
What remains is a couple of unrelated failures in the testsuite:
Epoll unexpected fd=0
pollServer: unexpected wakeup for fd=0 mode=w
panic: test timed out
../../../gcc-svn/trunk/libgo/testsuite/gotest: line 388: 7123
On Tue, Jul 5, 2011 at 10:12 PM, Ian Lance Taylor i...@google.com wrote:
What remains is a couple of unrelated failures in the testsuite:
../../../gcc-svn/trunk/libgo/testsuite/gotest: line 388: 13945
Segmentation fault ./a.out -test.short -test.timeout=$timeout
$@
FAIL: compress/flate
Hello!
diff --git a/libmudflap/testsuite/libmudflap.c/pass47-frag.c
b/libmudflap/testsuite/libmudflap.c/pass47-frag.c
--- a/libmudflap/testsuite/libmudflap.c/pass47-frag.c
+++ b/libmudflap/testsuite/libmudflap.c/pass47-frag.c
@@ -8,3 +8,5 @@ int main ()
tolower (buf[4]) ==
Hello!
Committed.
Richard.
2011-07-07 Richard Guenther rguent...@suse.de
* gcc.dg/graphite/pr37485.c: Add -floop-block.
Heh, you were faster by a minute!
Uros.
On Thu, Jul 7, 2011 at 2:59 PM, H.J. Lu hjl.to...@gmail.com wrote:
Hi Paolo, DJ, Nathanael, Alexandre, Ralf,
Is the change
.
* configure.ac: Support --enable-x32.
* configure: Regenerated.
diff --git a/gcc/configure.ac b/gcc/configure.ac
index 5f3641b..bddabeb 100644
---
On Fri, Jul 8, 2011 at 1:03 AM, H.J. Lu hjl.to...@gmail.com wrote:
Here is the updated patch. I will wait for Uros's comments.
I attached the wrong file. Here is the updated patch.
--- a/gcc/testsuite/g++.dg/abi/bitfield3.C
+++ b/gcc/testsuite/g++.dg/abi/bitfield3.C
@@ -4,7 +4,7 @@
//
Hello!
gfc_get_corank returns integer value, not bool. This problem was
triggered by --enable-build-with-cxx configured build.
2011-07-09 Uros Bizjak ubiz...@gmail.com
PR fortran/48926
* expr.c (gfc_get_corank): Change return value to int.
* gfortran.h (gfc_get_corank
On Sun, Jul 10, 2011 at 3:34 AM, Richard Henderson r...@redhat.com wrote:
I developed this patch while working on the dwarf2 pass series.
This was before I bypassed the entire problem by removing the
!deep branch prediction paths.
Ideally, we'd do this generically from gimple. Less ideally,
On Sat, Jul 9, 2011 at 11:22 PM, H.J. Lu hongjiu...@intel.com wrote:
This patch turns on 64bit and check models for x32. OK for trunk?
Thanks.
H.J.
---
2011-07-09 H.J. Lu hongjiu...@intel.com
* config/i386/i386.c (ix86_option_override_internal): Turn on
On Sat, Jul 9, 2011 at 11:28 PM, H.J. Lu hongjiu...@intel.com wrote:
X32 psABI requires promoting pointers to Pmode when passing/returning
in registers. OK for trunk?
Thanks.
H.J.
--
2011-07-09 H.J. Lu hongjiu...@intel.com
* config/i386/i386.c (ix86_promote_function_mode):
Hello!
A small cleanup, no functional change. This allows us to assert that
generated code length is less than TRAMPOLINE_SIZE also for 32bit
targets.
2011-07-11 Uros Bizjak ubiz...@gmail.com
* config/i386/i386.c (ix86_trampoline_init): Switch arms of if expr.
Use offset
Hello!
2011-07-11 Harsha Jagasia harsha.jaga...@amd.com
AMD bdver2 Enablement
* config.gcc (i[34567]86-*-linux* | ...): Add bdver2.
(case ${target}): Add bdver2.
* config/i386/driver-i386.c (host_detect_local_cpu): Let
-march=native recognize bdver2
Hello!
Please don't use -m32/-m64 in testcases directly.
You should use
/* { dg-do compile { target { ! ia32 } } } */
for 32bit insns and
/* { dg-do compile { target { ia32 } } } */
for 64bit insns.
Also, there is no need to add -mtune if -march is already specified.
-mtune will follow
On Wed, Jul 13, 2011 at 3:17 PM, H.J. Lu hjl.to...@gmail.com wrote:
PING.
2011-07-10 H.J. Lu hongjiu...@intel.com
* config/i386/i386.c (ix86_promote_function_mode): New.
(TARGET_PROMOTE_FUNCTION_MODE): Likewise.
You have discussed this with rth, the final approval should be
Hello!
Attached patch converts several places where string match or regexp on
$target_triplet is used with istarget. The patch also removes quotes
around target string.
2011-07-13 Uros Bizjak ubiz...@gmail.com
* lib/g++.exp (g++_init): Use istarget. Remove target_triplet global
On Thu, Jul 14, 2011 at 12:09 PM, Rainer Orth
r...@cebitec.uni-bielefeld.de wrote:
Andreas Schwab sch...@redhat.com writes:
Same on ia64:
Configuration mismatch!
Extra parts from gcc directory: crtbegin.o crtbeginS.o crtend.o crtendS.o
Extra parts from libgcc: crtbegin.o crtend.o
On Sun, Jul 10, 2011 at 12:20 AM, H.J. Lu hongjiu...@intel.com wrote:
TARGET_MEM_REF only works on ptr_mode. That means base and index parts
of x86 address operand in x32 mode may be in ptr_mode. This patch
supports 32bit base and index parts in x32 mode. OK for trunk?
Thanks.
H.J.
On Fri, Jul 15, 2011 at 3:03 PM, H.J. Lu hjl.to...@gmail.com wrote:
On Fri, Jul 15, 2011 at 5:49 AM, Uros Bizjak ubiz...@gmail.com wrote:
On Sun, Jul 10, 2011 at 12:20 AM, H.J. Lu hongjiu...@intel.com wrote:
TARGET_MEM_REF only works on ptr_mode. That means base and index parts
of x86
On Fri, Jul 15, 2011 at 5:44 PM, H.J. Lu hjl.to...@gmail.com wrote:
TARGET_MEM_REF only works on ptr_mode. That means base and index parts
of x86 address operand in x32 mode may be in ptr_mode. This patch
supports 32bit base and index parts in x32 mode. OK for trunk?
Thanks.
H.J.
---
On Fri, Jul 15, 2011 at 6:07 PM, H.J. Lu hjl.to...@gmail.com wrote:
If the first form of the address is not OK (it does not represent the
hardware operation), then it should not enter into the insn stream.
This means, that it should be fixed (legitimized) to second form by
appropriate
On Sat, Jul 16, 2011 at 6:47 PM, H.J. Lu hjl.to...@gmail.com wrote:
Yes, this is an example from PR I am referring to. Did you try to
define LEGITIMIZE_RELOAD_ADDRESS? It is supposed to fix this.
They make things even more complex. ix86_simplify_base_index_disp
is called after reload is
142m42.522s
sys7m41.875s
(see PR for details).
2011-07-18 Uros Bizjak ubiz...@gmail.com
PR target/47744
* config/i386/i386.c (ix86_decompose_address): Allow only subregs
of DImode hard registers in PLUS address chains.
Patch was bootstrapped on x86_64-pc-linux-gnu {,-m32
On Mon, Jul 18, 2011 at 8:39 PM, H.J. Lu hongjiu...@intel.com wrote:
TARGET_MEM_REF only works on ptr_mode. This patch allows 32bit address
in x32 mode. OK for trunk?
Do you perhaps have a testcase to help in analyzing the problem?
Uros.
On Mon, Jul 18, 2011 at 8:48 PM, H.J. Lu hjl.to...@gmail.com wrote:
TARGET_MEM_REF only works on ptr_mode. This patch allows 32bit address
in x32 mode. OK for trunk?
Do you perhaps have a testcase to help in analyzing the problem?
See:
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49780
On Mon, Jul 18, 2011 at 10:25 PM, H.J. Lu hjl.to...@gmail.com wrote:
TARGET_MEM_REF only works on ptr_mode. This patch allows 32bit address
in x32 mode. OK for trunk?
Do you perhaps have a testcase to help in analyzing the problem?
See:
On Tue, Jul 19, 2011 at 1:25 PM, Richard Sandiford
richard.sandif...@linaro.org wrote:
On Sat, Jul 16, 2011 at 6:47 PM, H.J. Lu hjl.to...@gmail.com wrote:
Yes, this is an example from PR I am referring to. Did you try to
define LEGITIMIZE_RELOAD_ADDRESS? It is supposed to fix this.
They
On Tue, Jul 19, 2011 at 3:47 PM, H.J. Lu hjl.to...@gmail.com wrote:
Attached patch simply removes these two checks, as it seems they are
not needed. This also follows how other Pmode != ptr_mode targets.
2011-07-19 Uros Bizjak ubiz...@gmail.com
PR target/49780
* config/i386
On Tue, Jul 19, 2011 at 4:42 PM, H.J. Lu hjl.to...@gmail.com wrote:
On Tue, Jul 19, 2011 at 7:04 AM, Uros Bizjak ubiz...@gmail.com wrote:
On Tue, Jul 19, 2011 at 3:47 PM, H.J. Lu hjl.to...@gmail.com wrote:
Attached patch simply removes these two checks, as it seems they are
not needed
On Tue, Jul 19, 2011 at 6:30 PM, Jakub Jelinek ja...@redhat.com wrote:
On Tue, Jul 19, 2011 at 06:26:33PM +0200, Uros Bizjak wrote:
Sometimes, the compiler is really creative in inventing instructions:
(insn 47 46 49 7 (set (reg:SI 68 [ D.1686 ])
(subreg:SI (plus:SF (reg:SF 159 [ D
On Tue, Jul 19, 2011 at 6:37 PM, Uros Bizjak ubiz...@gmail.com wrote:
Sometimes, the compiler is really creative in inventing instructions:
(insn 47 46 49 7 (set (reg:SI 68 [ D.1686 ])
(subreg:SI (plus:SF (reg:SF 159 [ D.1685 ])
(reg:SF 159 [ D.1685 ])) 0)) omp_atomic1
On Tue, Jul 19, 2011 at 7:33 PM, Uros Bizjak ubiz...@gmail.com wrote:
Sometimes, the compiler is really creative in inventing instructions:
(insn 47 46 49 7 (set (reg:SI 68 [ D.1686 ])
(subreg:SI (plus:SF (reg:SF 159 [ D.1685 ])
(reg:SF 159 [ D.1685 ])) 0)) omp_atomic1
On Tue, Jul 19, 2011 at 6:47 AM, H.J. Lu hongjiu...@intel.com wrote:
This patch adds the missing Pmode check and conversion. OK for trunk?
2011-07-18 H.J. Lu hongjiu...@intel.com
* config/i386/i386.c (ix86_legitimize_address): Convert to
Pmode if needed.
On Tue, Jul 19, 2011 at 6:30 PM, Jakub Jelinek ja...@redhat.com wrote:
Sometimes, the compiler is really creative in inventing instructions:
(insn 47 46 49 7 (set (reg:SI 68 [ D.1686 ])
(subreg:SI (plus:SF (reg:SF 159 [ D.1685 ])
(reg:SF 159 [ D.1685 ])) 0))
Hello!
? ? ? ?* a/gcc/gcse.c (alloc_gcse_mem): Added code to run in PRE2.
And this is necessary because...???
Why not just make it a separate pass in ix86-reorg that uses LCM? Look at
mode switching for an example.
I was also expecting that vzeroupper would be inserted in the same way
as
On Wed, Jul 20, 2011 at 4:51 AM, H.J. Lu hjl.to...@gmail.com wrote:
I had it in my x32 tree. But I reverted:
http://gcc.gnu.org/ml/gcc-patches/2011-02/msg00954.html
since Pmode is used in non-PIC tablejump, we have to put 64bit value for
labels with 0 upper 32bits in tablejump for x32.
On Wed, Jul 20, 2011 at 9:53 AM, Uros Bizjak ubiz...@gmail.com wrote:
since Pmode is used in non-PIC tablejump, we have to put 64bit value for
labels with 0 upper 32bits in tablejump for x32.
The mode is completely controled by CASE_VECTOR_MODE.
Here is the updated patch. OK for trunk
} and committed to mainline SVN
with following ChangeLog:
2011-07-20 Uros Bizjak ubiz...@gmail.com
PR target/49780
* config/i386/predicates.md (no_seg_addres_operand): No more special.
* config/i386/i386.c (ix86_decompose_address): Allow only subregs
of DImode hard
On Wed, Jul 20, 2011 at 3:18 PM, H.J. Lu hjl.to...@gmail.com wrote:
On Wed, Jul 20, 2011 at 1:19 AM, Uros Bizjak ubiz...@gmail.com wrote:
On Wed, Jul 20, 2011 at 9:53 AM, Uros Bizjak ubiz...@gmail.com wrote:
since Pmode is used in non-PIC tablejump, we have to put 64bit value for
labels
On Wed, Jul 20, 2011 at 4:09 PM, H.J. Lu hjl.to...@gmail.com wrote:
Hello!
+(define_insn *tablejump_1_x32
+ [(set (pc) (match_operand:SI 0 register_operand r))
+ (use (label_ref (match_operand 1 )))]
+ TARGET_X32
+ jmp\t%A0
+ [(set_attr type ibr)
+ (set_attr length_immediate 0)])
On Wed, Jul 20, 2011 at 9:46 PM, Uros Bizjak ubiz...@gmail.com wrote:
Note that SUBREG_PROMOTED_UNSIGNED_P wasn't designed for paradoxical subregs,
but for regular subregs (typically of word-sized objects). You should check
that the ones created for x32 (because of POINTERS_EXTEND_UNSIGNED I
On Tue, Jul 19, 2011 at 6:47 AM, H.J. Lu hongjiu...@intel.com wrote:
So, since copy_to_reg co. expects x in Pmode or VOIDmode constant
(due to force_reg that won't do mode conversion), we have to implement
them with a mode conversion...
This patch adds the missing Pmode check and conversion.
Hello!
Just a small optimization, we can reject non-register RTXes and wrong
subregs from index early. No functional change - these RTXes were
rejected in ix86_legitimate_address_p anyway.
2011-07-21 Uros Bizjak ubiz...@gmail.com
* config/i386/i386.c (ix86_decompose_address): Reject
Hello!
This is the same functionality as recently added to glibc [1].
2011-07-21 Uros Bizjak ubiz...@gmail.com
* lib/target-supports.exp (check_avx_os_support_available): New.
(check_effective_target_avx_runtime): Use it.
Tested on x86_64-pc-linux-gnu {,-m32} AVX and non-AVX
On Thu, Jul 21, 2011 at 6:28 PM, H.J. Lu hjl.to...@gmail.com wrote:
.quad symbol isn't really valid for 32bit.
Why not? We certainly know what value to put there.
x32 doesn't support 64bit relocation, like R_X86_64_64.
In many causes, generate
.long symbol
.long 0
for .quad symbol
On Thu, Jul 21, 2011 at 7:24 PM, H.J. Lu hjl.to...@gmail.com wrote:
On Thu, Jul 21, 2011 at 10:04 AM, Uros Bizjak ubiz...@gmail.com wrote:
On Thu, Jul 21, 2011 at 6:28 PM, H.J. Lu hjl.to...@gmail.com wrote:
.quad symbol isn't really valid for 32bit.
Why not? We certainly know what value
On Thu, Jul 21, 2011 at 6:42 PM, Richard Henderson r...@redhat.com wrote:
On 07/21/2011 09:28 AM, H.J. Lu wrote:
On Thu, Jul 21, 2011 at 9:23 AM, Richard Henderson r...@redhat.com wrote:
On 07/21/2011 09:20 AM, H.J. Lu wrote:
.quad symbol isn't really valid for 32bit.
Why not? We certainly
On Thu, Jul 21, 2011 at 10:00 PM, H.J. Lu hjl.to...@gmail.com wrote:
/* Represents viewing something of one type as being of a second type.
This corresponds to an Unchecked Conversion in Ada and roughly to
the idiom *(type2 *)X in C. The only operand is the value to be
viewed as being
On Thu, Jul 21, 2011 at 10:22 PM, H.J. Lu hjl.to...@gmail.com wrote:
Expand generates:
(insn 8 6 9 (set (reg:SI 68)
(symbol_ref:SI () [flags 0x40] var_decl 0x7fccc360b140
)) p
r49798.c:12 -1
(nil))
(insn 9 8 10 (set (reg:DI 67)
(zero_extend:DI (reg:SI 68)))
Hello!
Revision 164725 [1] broke detection of ifunc support in the testsuite
[2] due to extra #endif without if in the test function. Attached
patch fixes this up.
2011-07-21 Uros Bizjak ubiz...@gmail.com
* lib/target-supports.exp (check_ifunc_available): Fix test function.
The patch
On Thu, Jul 21, 2011 at 11:56 PM, Uros Bizjak ubiz...@gmail.com wrote:
Revision 164725 [1] broke detection of ifunc support in the testsuite
[2] due to extra #endif without if in the test function. Attached
patch fixes this up.
Actually, we can use existing testsuite infrastructure
Hello!
Fixing ifunc test function in the testsuite uncovered a nasty screwup
in config.gcc that prohibited usage of GNU indirect functions on
x86_64-*-linux*. Fixed by mirroring i[34567]86-*-linux* setting.
2011-07-22 Uros Bizjak ubiz...@gmail.com
* config.gcc (i[34567]86-*-linux
On Fri, Jul 22, 2011 at 5:27 PM, Uros Bizjak ubiz...@gmail.com wrote:
Fixing ifunc test function in the testsuite uncovered a nasty screwup
in config.gcc that prohibited usage of GNU indirect functions on
x86_64-*-linux*. Fixed by mirroring i[34567]86-*-linux* setting.
2011-07-22 Uros
On Fri, Jul 22, 2011 at 5:38 PM, H.J. Lu hjl.to...@gmail.com wrote:
Fixing ifunc test function in the testsuite uncovered a nasty screwup
in config.gcc that prohibited usage of GNU indirect functions on
x86_64-*-linux*. Fixed by mirroring i[34567]86-*-linux* setting.
2011-07-22 Uros Bizjak
Hello!
This patch backports the fix to the testcase for newer glibcs to 4.6 branch.
2011-07-22 Uros Bizjak ubiz...@gmail.com
Backport from mainline
2011-06-07 Paolo Carlini paolo.carl...@oracle.com
PR libstdc++/49293
* testsuite/22_locale/time_get
from PR 47381.
2011-07-24 Uros Bizjak ubiz...@gmail.com
PR target/47381
* config/i386/i386.md (*lea_1): Use SWI48 mode iterator.
(*lea_1_zext): New insn pattern.
(add-lea splitter): Check operand modes in insn constraint. Extend
operands less than SImode
and corresponding e constraints for adds
in SImode, since it looks that invalid addresses can only be generated
through adds. This avoids a whole bunch of new predicates and
constraints.
2011-07-25 Uros Bizjak ubiz...@gmail.com
PR target/47381
PR target/49832
PR target/49833
On Mon, Jul 25, 2011 at 3:30 PM, H.J. Lu hjl.to...@gmail.com wrote:
Attached patch implements -fpic handling for x32. In x32 mode, we now
use x86_64_general_operand and corresponding e constraints for adds
in SImode, since it looks that invalid addresses can only be generated
through adds.
general_operand predicated
SImode operands. Fortunatelly, x86_64_general_operand works OK for
x32, while both for i686 and x86_64 are unaffected due to early bypass
(i686) and due to the fact that all symbols are DImode (x86_64).
2011-07-25 Uros Bizjak ubiz...@gmail.com
H.J. Lu hongjiu
On Tue, Jul 26, 2011 at 4:59 PM, H.J. Lu hongjiu...@intel.com wrote:
This patch fixes PIC with external symbol and updates
x86_64_immediate_operand/x86_64_zext_immediate_operand/x86_64_movabs_operand
for x32.
2011-07-26 H.J. Lu hongjiu...@intel.com
PR target/49853
*
On Tue, Jul 26, 2011 at 7:31 PM, H.J. Lu hjl.to...@gmail.com wrote:
This patch fixes PIC with external symbol and updates
x86_64_immediate_operand/x86_64_zext_immediate_operand/x86_64_movabs_operand
for x32.
2011-07-26 H.J. Lu hongjiu...@intel.com
PR target/49853
*
good to me. Can you check it in?
Please, can you test it on x32 first? I will commit it after
bootstrap/regtest finish.
It may need other changes for TLS support. I can update it
after your change is checked in.
Committed with following ChangeLog:
2011-07-26 Uros Bizjak ubiz...@gmail.com
On Tue, Jul 26, 2011 at 10:12 PM, Jakub Jelinek ja...@redhat.com wrote:
On Tue, Jul 26, 2011 at 10:05:06PM +0200, Uros Bizjak wrote:
2011-07-26 H.J. Lu hongjiu...@intel.com
PR target/47372
* config/i386/i386.c (ix86_delegitimize_address): Call
simplify_gen_subreg
On Tue, Jul 26, 2011 at 10:33 PM, H.J. Lu hjl.to...@gmail.com wrote:
On Tue, Jul 26, 2011 at 1:29 PM, Jakub Jelinek ja...@redhat.com wrote:
On Tue, Jul 26, 2011 at 10:21:11PM +0200, Uros Bizjak wrote:
This also works, we look at orig_x that looks like:
(mem/u/c:SI (const:DI (unspec:DI
On Wed, Jul 27, 2011 at 9:05 AM, Kirill Yukhin kirill.yuk...@gmail.com wrote:
Thanks for inputs! I'll do it today.
Just ine point.
How AVX is connected to LZCNT features?
AVX requires OS support since it has wider registers etc.
LZCNT need no support from OS side, so from my point of view it
On Wed, Jul 27, 2011 at 6:31 AM, H.J. Lu hongjiu...@intel.com wrote:
The offsetted memory references always work for x32. OK for trunk?
No, this is the same issue as in [1]. Please fix the assembler to
zero-extend this relocation.
[1] http://gcc.gnu.org/ml/gcc-patches/2011-07/msg01825.html
Hello!
There is no way symbol_operand uses non-DI or non-SI modes on x86.
2011-07-27 Uros Bizjak ubiz...@gmail.com
* config/i386/i386.c (ix86_expand_move): Do not explicitly check
the mode of symbolic_opreand RTXes.
Tested on x86_64-pc-linux-gnu {,-m32}. Committed to mainline
On Wed, Jul 27, 2011 at 11:29 PM, Jakub Jelinek ja...@redhat.com wrote:
Guys, with write approval, could you please commit that?
I checked it in for you.
Unfortunately many of the new tests fail with old assembler, because
the builtin in check_effective_target_bmi is optimized away
On Thu, Jul 28, 2011 at 5:48 AM, H.J. Lu hongjiu...@intel.com wrote:
We should only expand strlen to Pmode. Otherwise, we got
[hjl@gnu-6 ilp32-38]$ cat x.i
char one[50] = ijk;
int
main (void)
{
return __builtin_strlen (one) != 3;
}
[hjl@gnu-6 ilp32-38]$
On Thu, Jul 28, 2011 at 4:55 AM, H.J. Lu hongjiu...@intel.com wrote:
TLS on X32 is almost identical to TLS on x86-64. The only difference is
x32 address space is 32bit. That means TLS symbols can be in either
SImode or DImode with upper 32bit zero. This patch updates
tls_global_dynamic_64
Hello!
2011-07-28 Uros Bizjak ubiz...@gmail.com
* config/i386/i386.c (add-lea splitter): Add SWI mode to PLUS RTX.
Tested on x86_64-pc-linux-gnu, committed to mainline.
Uros.
Index: i386.md
===
--- i386.md (revision
On Thu, Jul 28, 2011 at 8:52 AM, Uros Bizjak ubiz...@gmail.com wrote:
TLS on X32 is almost identical to TLS on x86-64. The only difference is
x32 address space is 32bit. That means TLS symbols can be in either
SImode or DImode with upper 32bit zero. This patch updates
tls_global_dynamic_64
On Thu, Jul 28, 2011 at 5:11 AM, H.J. Lu hongjiu...@intel.com wrote:
In x32, thread pointer is 32bit and choice of segment register for the
thread base ptr load should be based on TARGET_64BIT. This patch
implements it. OK for trunk?
-ENOTESTCASE.
Uros.
Hello!
convert_memory_address_addr_space has a special PLUS/MULT case for
POINTERS_EXTEND_UNSIGNED 0. ?It turns out that it is also needed
for all Pmode != ptr_mode cases. ?OK for trunk?
2011-06-11 ?H.J. Lu ?hongjiu...@intel.com
? ? ? ?PR middle-end/47727
? ? ? ?* explow.c
On Thu, Jul 28, 2011 at 8:30 AM, Uros Bizjak ubiz...@gmail.com wrote:
We should only expand strlen to Pmode. Otherwise, we got
[hjl@gnu-6 ilp32-38]$ cat x.i
char one[50] = ijk;
int
main (void)
{
return __builtin_strlen (one) != 3;
}
[hjl@gnu-6 ilp32-38]$ /export/build/gnu/gcc/build
On Thu, Jul 28, 2011 at 7:59 PM, H.J. Lu hjl.to...@gmail.com wrote:
convert_memory_address_addr_space has a special PLUS/MULT case for
POINTERS_EXTEND_UNSIGNED 0. ?It turns out that it is also needed
for all Pmode != ptr_mode cases. ?OK for trunk?
2011-06-11 ?H.J. Lu
On Thu, Jul 28, 2011 at 8:03 PM, H.J. Lu hjl.to...@gmail.com wrote:
So, instead of huge complications with new mode iterator, just
introduce two new patterns that will shadow existing ones for
TARGET_X32.
Like in attached (untested) patch.
I tried the following patch with typos fixed. It
On Thu, Jul 28, 2011 at 8:09 PM, H.J. Lu hjl.to...@gmail.com wrote:
convert_memory_address_addr_space has a special PLUS/MULT case for
POINTERS_EXTEND_UNSIGNED 0. ?It turns out that it is also needed
for all Pmode != ptr_mode cases. ?OK for trunk?
2011-06-11 ?H.J. Lu
On Thu, Jul 28, 2011 at 8:30 PM, H.J. Lu hjl.to...@gmail.com wrote:
TP is 32bit in x32 For load_tp_x32, we load SImode value and
zero-extend to DImode. For add_tp_x32, we are adding SImode
value. We can't pretend TP is 64bit. load_tp_x32 and add_tp_x32
must take SImode TP.
I will see
On Thu, Jul 28, 2011 at 8:32 PM, H.J. Lu hjl.to...@gmail.com wrote:
convert_memory_address_addr_space has a special PLUS/MULT case for
POINTERS_EXTEND_UNSIGNED 0. ?It turns out that it is also needed
for all Pmode != ptr_mode cases. ?OK for trunk?
2011-06-11 ?H.J. Lu
On Thu, Jul 28, 2011 at 8:13 PM, H.J. Lu hongjiu...@intel.com wrote:
This patch adds x32 support to UNSPEC_SP_XXX patterns. OK for trunk?
http://gcc.gnu.org/contribute.html#patches
Uros.
On Thu, Jul 28, 2011 at 9:03 PM, H.J. Lu hjl.to...@gmail.com wrote:
This patch adds x32 support to UNSPEC_SP_XXX patterns. OK for trunk?
http://gcc.gnu.org/contribute.html#patches
Sorry. I should have mentioned testcase in:
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47766
Actually,
On Thu, Jul 28, 2011 at 10:15 PM, H.J. Lu hjl.to...@gmail.com wrote:
TP is 32bit in x32 For load_tp_x32, we load SImode value and
zero-extend to DImode. For add_tp_x32, we are adding SImode
value. We can't pretend TP is 64bit. load_tp_x32 and add_tp_x32
must take SImode TP.
Here is the
On Fri, Jul 29, 2011 at 12:28 AM, H.J. Lu hjl.to...@gmail.com wrote:
TP is 32bit in x32 For load_tp_x32, we load SImode value and
zero-extend to DImode. For add_tp_x32, we are adding SImode
value. We can't pretend TP is 64bit. load_tp_x32 and add_tp_x32
must take SImode TP.
Here is the
On Thu, Jul 28, 2011 at 3:24 PM, H.J. Lu hjl.to...@gmail.com wrote:
In x32, thread pointer is 32bit and choice of segment register for the
thread base ptr load should be based on TARGET_64BIT. This patch
implements it. OK for trunk?
-ENOTESTCASE.
There is no standalone testcase. The
Hello!
ABI specifies that TP is loaded in ptr_mode. Attached patch implements
this requirement.
2011-07-29 Uros Bizjak ubiz...@gmail.com
* config/i386/i386.md (*load_tp_x32): New.
(*load_tp_x32_zext): Ditto.
(*add_tp_x32): Ditto.
(*add_tp_x32_zext): Ditto
[ For some reason this post didn't reach gcc-patches@ ML archives... ]
Hello!
ABI specifies that TP is loaded in ptr_mode. Attached patch implements
this requirement.
2011-07-29 Uros Bizjak ubiz...@gmail.com
* config/i386/i386.md (*load_tp_x32): New.
(*load_tp_x32_zext): Ditto
to support x32. OK for trunk?
Please also change 64bit GNU2_TLS patterns, so -mtls-dialect=gnu2 will
also work. Please see attached patch.
Yes, it works. Can you apply it?
This is what I have committed:
2011-07-28 Uros Bizjak ubiz...@gmail.com
PR target/47715
* config
Hello!
With recent developments, there is no need for pic_32bit_operand to be
defined as special predicate with explicit mode checks anymore.
Implicit mode checks (including VIODmode bypass) of normal predicates
work OK now.
2011-07-28 Uros Bizjak ubiz...@gmail.com
* config/i386
Hello!
tp_or_register_operand predicate is not used.
2011-07-29 Uros Bizjak ubiz...@gmail.com
* config/i386/predicates.md (tp_or_register_operand): Remove predicate.
Tested on x86_64-pc-linux-gnu, committed to mainline SVN.
Uros.
Index: predicates.md
On Sat, Jul 30, 2011 at 12:41 AM, H.J. Lu hongjiu...@intel.com wrote:
X32 is 32bit. This patch checks TARGET_LP64 for SIZE_TYPE/PTRDIFF_TYPE.
OK for trunk?
OK, if tested on x32. You didn't say how the patch was tested.
Thanks,
Uros.
Hello!
2011-07-31 Uros Bizjak ubiz...@gmail.com
* lib/gcc-dg.exp (cleanup-dump): Also remove .exe. and .exe.ltrans0.
dump files.
Tested on x64-pc-linux-gnu. OK for mainline?
Uros.
Index: lib/gcc-dg.exp
On Sun, Jul 31, 2011 at 11:39 AM, Richard Guenther
richard.guent...@gmail.com wrote:
2011-07-31 Uros Bizjak ubiz...@gmail.com
* lib/gcc-dg.exp (cleanup-dump): Also remove .exe. and .exe.ltrans0.
dump files.
Tested on x64-pc-linux-gnu. OK for mainline?
I think you need
Hello!
2011-07-31 Uros Bizjak ubiz...@gmail.com
* gcc.dg/tree-ssa/20050314-1.c: Dump and cleanup lim1 pass only.
* gcc.dg/tree-ssa/pr23109.c: Ditto.
* gcc.dg/tree-ssa/loop-7.c: Ditto.
* gcc.dg/tree-ssa/loop-32.c: Ditto.
* gcc.dg/tree-ssa/loop-33.c: Ditto
conditionally disables these as well.
2011-07-31 Uros Bizjak ubiz...@gmail.com
PR target/49920
* config/i386/i386.md (strset): Do not expand strset_singleop
when %eax or $edi are fixed.
(*strsetdi_rex_1): Disable when %eax or %edi are fixed.
(*strsetsi_1): Ditto
On Mon, Aug 1, 2011 at 10:21 AM, Kirill Yukhin kirill.yuk...@gmail.com wrote:
Okay, then here is an updated patch
updated ChangeLog entry:
2011-07-26 Kirill Yukhin kirill.yuk...@intel.com
PR target/49547
* config.gcc (i[34567]86-*-*): Replace abmintrin.h with
.
testsuite/ChangeLog:
2011-08-01 Uros Bizjak ubiz...@gmail.com
PR target/49927
* gcc.target/i386/pr49927.c: New test.
Tested on x86_64-pc-linux-gnu {,-m32}, committed to mainline SVN.
Uros.
Index: config/i386/i386.c
901 - 1000 of 6038 matches
Mail list logo
