Re: [PATCH][AArch64] Use LDP/STP in shrinkwrapping

On Fri, Jan 05, 2018 at 12:22:44PM +, Wilco Dijkstra wrote: > The shrinkwrap optimization added late in GCC 7 allows each callee-save to > be delayed and done only across blocks which need a particular callee-save. > Although this reduces unnecessary memory traffic on code paths that need >

Re: [PATCH][AArch64] Use LDP/STP in shrinkwrapping

Segher Boessenkool writes: > On Thu, Jan 11, 2018 at 03:35:37PM +, Wilco Dijkstra wrote: >> Segher Boessenkool wrote: >>   >> > Of course I see that ldp is useful.  I don't think that this particular >> > way of forcing more pairs is a good idea.  Needs testing /

Re: [PATCH][AArch64] Use LDP/STP in shrinkwrapping

On Thu, Jan 11, 2018 at 03:35:37PM +, Wilco Dijkstra wrote: > Segher Boessenkool wrote: >   > > Of course I see that ldp is useful.  I don't think that this particular > > way of forcing more pairs is a good idea.  Needs testing / benchmarking / > > instrumentation, and we haven't seen any of

Re: [PATCH][AArch64] Use LDP/STP in shrinkwrapping

Segher Boessenkool wrote:   > Of course I see that ldp is useful.  I don't think that this particular > way of forcing more pairs is a good idea.  Needs testing / benchmarking / > instrumentation, and we haven't seen any of that. I wouldn't propose a patch if it caused slowdowns. In fact I am

Re: [PATCH][AArch64] Use LDP/STP in shrinkwrapping

On Tue, Jan 09, 2018 at 09:13:23PM -0800, Andrew Pinski wrote: > On Tue, Jan 9, 2018 at 6:54 AM, Segher Boessenkool > wrote: > > On Tue, Jan 09, 2018 at 12:23:42PM +, Wilco Dijkstra wrote: > >> Segher Boessenkool wrote: > >> > On Mon, Jan 08, 2018 at 0:25:47PM

Re: [PATCH][AArch64] Use LDP/STP in shrinkwrapping

On Tue, Jan 9, 2018 at 6:54 AM, Segher Boessenkool wrote: > On Tue, Jan 09, 2018 at 12:23:42PM +, Wilco Dijkstra wrote: >> Segher Boessenkool wrote: >> > On Mon, Jan 08, 2018 at 0:25:47PM +, Wilco Dijkstra wrote: >> >> > Always pairing two registers together

Re: [PATCH][AArch64] Use LDP/STP in shrinkwrapping

On Tue, Jan 09, 2018 at 12:23:42PM +, Wilco Dijkstra wrote: > Segher Boessenkool wrote: > > On Mon, Jan 08, 2018 at 0:25:47PM +, Wilco Dijkstra wrote: > >> > Always pairing two registers together *also* degrades code quality. > >> > >> No, while it's not optimal, it means smaller code and

Re: [PATCH][AArch64] Use LDP/STP in shrinkwrapping

Segher Boessenkool wrote: > On Mon, Jan 08, 2018 at 0:25:47PM +, Wilco Dijkstra wrote: >> > Always pairing two registers together *also* degrades code quality. >> >> No, while it's not optimal, it means smaller code and fewer memory accesses. > > It means you execute *more* memory accesses. 

Re: [PATCH][AArch64] Use LDP/STP in shrinkwrapping

On Mon, Jan 08, 2018 at 08:25:47PM +, Wilco Dijkstra wrote: > > Always pairing two registers together *also* degrades code quality. > > No, while it's not optimal, it means smaller code and fewer memory accesses. It means you execute *more* memory accesses. Always. This may be sometimes

Re: [PATCH][AArch64] Use LDP/STP in shrinkwrapping

Segher Boessenkool wrote: > On Mon, Jan 08, 2018 at 01:27:24PM +, Wilco Dijkstra wrote: > >> Peepholing is very conservative about instructions using SP and won't touch >> anything frame related. If this was working better then the backend could >> just >> emit single loads/stores and let

Re: [PATCH][AArch64] Use LDP/STP in shrinkwrapping

On Mon, Jan 08, 2018 at 01:27:24PM +, Wilco Dijkstra wrote: > Segher Boessenkool wrote: > > On Fri, Jan 05, 2018 at 12:22:44PM +, Wilco Dijkstra wrote: > >> An example epilog in a shrinkwrapped function before: > >> > >> ldp    x21, x22, [sp,#16] > >> ldr    x23, [sp,#32] > >> ldr    x24,

Re: [PATCH][AArch64] Use LDP/STP in shrinkwrapping

Segher Boessenkool wrote: > On Fri, Jan 05, 2018 at 12:22:44PM +, Wilco Dijkstra wrote: >> An example epilog in a shrinkwrapped function before: >> >> ldp    x21, x22, [sp,#16] >> ldr    x23, [sp,#32] >> ldr    x24, [sp,#40] >> ldp    x25, x26, [sp,#48] >> ldr    x27, [sp,#64] >> ldr    x28,

Re: [PATCH][AArch64] Use LDP/STP in shrinkwrapping

Hi Wilco, On Fri, Jan 05, 2018 at 12:22:44PM +, Wilco Dijkstra wrote: > An example epilog in a shrinkwrapped function before: > > ldpx21, x22, [sp,#16] > ldrx23, [sp,#32] > ldrx24, [sp,#40] > ldpx25, x26, [sp,#48] > ldrx27, [sp,#64] > ldrx28, [sp,#72] > ldrx30,

[PATCH][AArch64] Use LDP/STP in shrinkwrapping

The shrinkwrap optimization added late in GCC 7 allows each callee-save to be delayed and done only across blocks which need a particular callee-save. Although this reduces unnecessary memory traffic on code paths that need few callee-saves, it typically uses LDR/STR rather than LDP/STP. The