Re: [PATCH 2/3] Add XLP-specific atomic instructions and tweaks.

2012-06-19 Thread Maxim Kuvyrkov
On 16/06/2012, at 7:45 PM, Richard Sandiford wrote: Maxim Kuvyrkov ma...@codesourcery.com writes: Updated patch attached. Any further comments? It's due to my bad explanation, sorry, but this isn't what I meant. The two main changes I was looking for were: 1) Your pattern uses:

Re: [PATCH 2/3] Add XLP-specific atomic instructions and tweaks.

2012-06-19 Thread Richard Sandiford
Maxim Kuvyrkov ma...@codesourcery.com writes: The only other change that I made that was not in your comments is the addition of b mips_print_operand specifier. The LDADD and SWAP instructions accept their address as a plain register without parenthesis, Ouch. so I've added the specifier

Re: [PATCH 2/3] Add XLP-specific atomic instructions and tweaks.

2012-06-18 Thread Richard Henderson
On 2012-06-17 13:01, Richard Sandiford wrote: Not required if you use the proper predicate in the expander. The middle-end will take care of this for you. I might be misunderstanding, sorry, but this expander is shared with the normal LL/SC path, which can accept plain memory_operands. I

Re: [PATCH 2/3] Add XLP-specific atomic instructions and tweaks.

2012-06-17 Thread Richard Henderson
On 2012-06-16 00:45, Richard Sandiford wrote: [(mem:GPR (match_operand:P 1 register_operand d))] Instead, we should define a new memory predicate/constraint pair for memories that only accept register addresses. I.e. there should be a new predicate to go alongside things

Re: [PATCH 2/3] Add XLP-specific atomic instructions and tweaks.

2012-06-17 Thread Richard Sandiford
Richard Henderson r...@redhat.com writes: On 2012-06-16 00:45, Richard Sandiford wrote: [(mem:GPR (match_operand:P 1 register_operand d))] Instead, we should define a new memory predicate/constraint pair for memories that only accept register addresses. I.e. there should be

Re: [PATCH 2/3] Add XLP-specific atomic instructions and tweaks.

2012-06-16 Thread Richard Sandiford
Maxim Kuvyrkov ma...@codesourcery.com writes: Updated patch attached. Any further comments? It's due to my bad explanation, sorry, but this isn't what I meant. The two main changes I was looking for were: 1) Your pattern uses: [(mem:GPR (match_operand:P 1 register_operand d))]

Re: [PATCH 2/3] Add XLP-specific atomic instructions and tweaks.

2012-06-14 Thread Maxim Kuvyrkov
On 14/06/2012, at 7:01 AM, Richard Sandiford wrote: Maxim Kuvyrkov ma...@codesourcery.com writes: ... After a chat with Bernd Schmidt, this is not a bug. I've already fixed the patch per yours and Bernd's instructions. Do you want to look through an updated patch or should I just commit

Re: [PATCH 2/3] Add XLP-specific atomic instructions and tweaks.

2012-06-13 Thread Richard Sandiford
Maxim Kuvyrkov ma...@codesourcery.com writes: diff --git a/gcc/config/mips/sync.md b/gcc/config/mips/sync.md index 604aefa..ac953b5 100644 --- a/gcc/config/mips/sync.md +++ b/gcc/config/mips/sync.md @@ -607,10 +607,32 @@ (match_operand:GPR 1 memory_operand) (match_operand:GPR 2

Re: [PATCH 2/3] Add XLP-specific atomic instructions and tweaks.

2012-06-13 Thread Maxim Kuvyrkov
On 14/06/2012, at 6:50 AM, Richard Sandiford wrote: Maxim Kuvyrkov ma...@codesourcery.com writes: diff --git a/gcc/config/mips/sync.md b/gcc/config/mips/sync.md index 604aefa..ac953b5 100644 --- a/gcc/config/mips/sync.md +++ b/gcc/config/mips/sync.md @@ -607,10 +607,32 @@

Re: [PATCH 2/3] Add XLP-specific atomic instructions and tweaks.

2012-06-13 Thread Richard Sandiford
Maxim Kuvyrkov ma...@codesourcery.com writes: On 14/06/2012, at 6:50 AM, Richard Sandiford wrote: Maxim Kuvyrkov ma...@codesourcery.com writes: diff --git a/gcc/config/mips/sync.md b/gcc/config/mips/sync.md index 604aefa..ac953b5 100644 --- a/gcc/config/mips/sync.md +++

[PATCH 2/3] Add XLP-specific atomic instructions and tweaks.

2012-06-12 Thread Maxim Kuvyrkov
-- Maxim Kuvyrkov CodeSourcery / Mentor Graphics 0002-Add-XLP-specific-atomic-instructions-and-tweaks.patch Description: Binary data