[PATCH] combine: Don't mess with subregs of floating point (PR78590)

PR78590 shows a problem in change_zero_ext, where we change a zero_extend of a subreg to a logical and. We should only do this if the thing we are taking the subreg of is a scalar integer, otherwise we will take a subreg of (e.g.) a float in a different size, which is nonsensical and hits an asser

Re: [PATCH] libiberty: avoid reading past end of buffer in strndup/xstrndup (PR c/78498)

On Tue, Nov 29, 2016 at 11:08 PM, David Malcolm wrote: > libiberty's implementations of strndup and xstrndup call strlen on > the input string, and hence can read past the end of the input buffer > if it isn't zero-terminated (such as is the case in PR c/78498, where > the input string is from the

Re: [patch] boehm-gc removal and libobjc changes to build with an external bdw-gc

configure: error: no --with-target-bdw-gc options and no bdw-gc pkg-config module found make[1]: *** [Makefile:19775: configure-target-libobjc] Error 1 Andreas. -- Andreas Schwab, SUSE Labs, sch...@suse.de GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7 "And now for som

Re: [RFA] Handle target with no length attributes sanely in bb-reorder.c

On Tue, Nov 29, 2016 at 5:07 PM, Jeff Law wrote: > On 11/29/2016 03:23 AM, Richard Biener wrote: >> >> On Mon, Nov 28, 2016 at 10:23 PM, Jeff Law wrote: >>> >>> >>> >>> I was digging into issues around the patches for 78120 when I stumbled >>> upon >>> undesirable bb copying in bb-reorder.c on t

[PATCH] simplify-rtx: Add missing line for previous commit (PR78583)

The comment for the added case to simplify_truncation reads /* Turn (truncate:M1 (*_extract:M2 (reg:M2) (len) (pos))) into (*_extract:M1 (truncate:M1 (reg:M2)) (len) (pos')) if possible without changing len. */ but I forget to check the two modes M2 are actually the same. Tested on

Re: [libstdc++, testsuite] Add dg-require-thread-fence

On 29 November 2016 at 21:18, Jonathan Wakely wrote: > On 16/11/16 22:18 +0100, Christophe Lyon wrote: >> >> On 15 November 2016 at 12:50, Jonathan Wakely wrote: >>> >>> On 14/11/16 14:32 +0100, Christophe Lyon wrote: On 20 October 2016 at 19:40, Jonathan Wakely wrote: > >

Re: [PATCH] Fix PR78306

On Tue, 29 Nov 2016, Jeff Law wrote: > On 11/29/2016 12:47 AM, Richard Biener wrote: > > > Balaji added this check explicitly. There should be tests in the testsuite > > > (spawnee_inline, spawner_inline) which exercise that code. > > > > Yes he did, but no, nothing in the testsuite. > I believe

Re: [patch,lto] Fix PR78562: Wrong type mismatch warning for built-ins with same asm name.

On Tue, 29 Nov 2016, Georg-Johann Lay wrote: > This is a fix for a wrong warning from -Wlto-type-mismatch that reports a type > mismatch for two built-in functions. > > The avr backend has several built-ins that have the same asm name because > their assembler implementation in libgcc is exactly

Re: [AArch64][ARM][GCC][PATCHv2 3/3] Add tests for missing Poly64_t intrinsics to GCC

Hi Tamar, On 29 November 2016 at 14:54, James Greenhalgh wrote: > On Tue, Nov 29, 2016 at 01:48:22PM +, Kyrill Tkachov wrote: >> >> On 29/11/16 09:50, Tamar Christina wrote: >> >Hi All, >> > >> >The new patch contains the proper types for the intrinsics that should be >> >returning uint64x1

Re: [PATCH][AArch64] PR target/71112: Properly create lowpart of pic_offset_table_rtx with -fpie

On 30/11/16 05:27, Andrew Pinski wrote: On Tue, Nov 29, 2016 at 1:09 AM, Kyrill Tkachov wrote: Hi all, This ICE only occurs on big-endian ILP32 -fpie code. The expansion code generates the invalid load: (insn 6 5 7 (set (reg/f:SI 76) (unspec:SI [ (mem/u/c:SI (lo_sum:

RE: [AArch64][ARM][GCC][PATCHv2 3/3] Add tests for missing Poly64_t intrinsics to GCC

Hi Christophe, > After you committed this patch (r242962), I've noticed some regressions as > follows: > * on aarch64, vreinterpret_p128 and vreinterpret_p64 fail to compile with > errors like > warning: implicit declaration of function 'vreinterpretq_p64_p128 > warning: implicit declaration of fu

Re: [PATCH, GCC/ARM] Fix PR77933: stack corruption on ARM when using high registers and lr

Hi, Is this ok to backport to gcc-5-branch and gcc-6-branch? Patch applies cleanly (patches attached for reference). 2016-11-17 Thomas Preud'homme Backport from mainline 2016-11-17 Thomas Preud'homme gcc/ PR target/77933 * config/arm/arm.c (thumb1_expand_prologue):

[Patch, Fortran, committed] PR 78592: [7 Regression] ICE in gfc_find_specific_dtio_proc, at fortran/interface.c:4939

Hi all, I have just committed a completely obvious patch for this PR. All it does is rearrange some expressions to avoid an ICE (see attachment): https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=243005 Cheers, Janus Index: gcc/fortran/interface.c ===

Re: [PATCH] combine: Tweak change_zero_ext

On Tue, Nov 29, 2016 at 9:14 PM, Christophe Lyon wrote: > On 29 November 2016 at 20:38, Uros Bizjak wrote: >>> 2016-11-26 Segher Boessenkool >>> >>> * combine.c (change_zero_ext): Also handle extends from a subreg >>> to a mode bigger than that of the operand of the subreg. >> >> This patch in

Re: [PATCH, GCC/ARM] Fix PR77933: stack corruption on ARM when using high registers and lr

On 30/11/16 09:50, Thomas Preudhomme wrote: > Hi, > > Is this ok to backport to gcc-5-branch and gcc-6-branch? Patch applies > cleanly (patches attached for reference). > > > 2016-11-17 Thomas Preud'homme > > Backport from mainline > 2016-11-17 Thomas Preud'homme > > gcc/ >

Re: [patch] boehm-gc removal and libobjc changes to build with an external bdw-gc

On 30.11.2016 09:29, Andreas Schwab wrote: > configure: error: no --with-target-bdw-gc options and no bdw-gc pkg-config > module found > make[1]: *** [Makefile:19775: configure-target-libobjc] Error 1 > > Andreas. that's a bit terse. Could you send the complete output for the configuration of th

Re: [PATCH] combine: Tweak change_zero_ext

On 30/11/16 10:02, Bin.Cheng wrote: On Tue, Nov 29, 2016 at 9:14 PM, Christophe Lyon wrote: On 29 November 2016 at 20:38, Uros Bizjak wrote: 2016-11-26 Segher Boessenkool * combine.c (change_zero_ext): Also handle extends from a subreg to a mode bigger than that of the operand of the sub

Re: [patch] boehm-gc removal and libobjc changes to build with an external bdw-gc

On Nov 30 2016, Matthias Klose wrote: > I assume that is a configuration with --enable-objc-gc No. Andreas. -- Andreas Schwab, SUSE Labs, sch...@suse.de GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7 "And now for something completely different."

Re: [patch] boehm-gc removal and libobjc changes to build with an external bdw-gc

On Wed, Nov 30, 2016 at 11:06 AM, Matthias Klose wrote: > On 30.11.2016 09:29, Andreas Schwab wrote: >> configure: error: no --with-target-bdw-gc options and no bdw-gc pkg-config >> module found >> make[1]: *** [Makefile:19775: configure-target-libobjc] Error 1 >> >> Andreas. > > that's a bit ter

Re: [PATCH, GCC/ARM] Fix ICE when compiling empty FIQ interrupt handler in ARM mode

Hi, Is this ok to backport this fix together with its follow-up testcase fix to gcc-5-branch and gcc-6-branch? Both patches apply cleanly (patches attached for reference). 2016-11-30 Thomas Preud'homme Backport from mainline 2016-11-16 Thomas Preud'homme gcc/ * config

Re: [PATCH][AArch64] PR target/78362: Make sure to only take REGNO of a register

Ping. Thanks, Kyrill On 23/11/16 14:16, Kyrill Tkachov wrote: Ping. https://gcc.gnu.org/ml/gcc-patches/2016-11/msg01664.html Thanks, Kyrill On 16/11/16 16:57, Kyrill Tkachov wrote: Hi all, As the PR says we have an RTL checking failure that occurs when building libgcc for aarch64. The exp

Re: [PATCH, GCC/ARM] Fix PR77933: stack corruption on ARM when using high registers and lr

On 30/11/16 10:04, Richard Earnshaw (lists) wrote: On 30/11/16 09:50, Thomas Preudhomme wrote: Hi, Is this ok to backport to gcc-5-branch and gcc-6-branch? Patch applies cleanly (patches attached for reference). 2016-11-17 Thomas Preud'homme Backport from mainline 2016-11-17 Th

Re: [PATCH, GCC/ARM] Fix PR77904: callee-saved register trashed when clobbering sp

Hi, Is this ok to backport to gcc-5-branch and gcc-6-branch? Patch applies cleanly (patches attached for reference). 2016-11-30 Thomas Preud'homme Backport from mainline 2016-11-22 Thomas Preud'homme gcc/ PR target/77904 * config/arm/arm.c (thumb1_compute_save_reg_ma

Re: [PATCH, GCC/ARM] Fix PR77904: callee-saved register trashed when clobbering sp

Sorry, the bug cannot be reproduced on gcc-5-branch so it's probably better to only do a backport to gcc-6-branch. Ok for a backport to gcc-6-branch? Best regards, Thomas On 30/11/16 10:42, Thomas Preudhomme wrote: Hi, Is this ok to backport to gcc-5-branch and gcc-6-branch? Patch applies c

Re: [patch] boehm-gc removal and libobjc changes to build with an external bdw-gc

On Wed, Nov 30, 2016 at 11:17:32AM +0100, Richard Biener wrote: > On Wed, Nov 30, 2016 at 11:06 AM, Matthias Klose wrote: > > On 30.11.2016 09:29, Andreas Schwab wrote: > >> configure: error: no --with-target-bdw-gc options and no bdw-gc pkg-config > >> module found > >> make[1]: *** [Makefile:19

Re: [PATCH] arc: Avoid store/load pipeline hazard

* Claudiu Zissulescu [2016-11-28 09:29:22 +]: > Hi Andrew, > > Approved, but ... Thanks. Committed as r243007 with the changes you suggested. Thanks again, Andrew > > > +/* Return true if a load instruction (CONSUMER) uses the same address > > + as a store instruction (PRODUCER).

Re: [patch] boehm-gc removal and libobjc changes to build with an external bdw-gc

On 30.11.2016 11:52, Jakub Jelinek wrote: > On Wed, Nov 30, 2016 at 11:17:32AM +0100, Richard Biener wrote: >> On Wed, Nov 30, 2016 at 11:06 AM, Matthias Klose wrote: >>> On 30.11.2016 09:29, Andreas Schwab wrote: configure: error: no --with-target-bdw-gc options and no bdw-gc pkg-config >>>

Re: [1/9][RFC][DWARF] Reserve three DW_OP numbers in vendor extension space

On 16/11/16 14:02, Jakub Jelinek wrote: On Wed, Nov 16, 2016 at 02:54:56PM +0100, Mark Wielaard wrote: On Wed, 2016-11-16 at 10:00 +, Jiong Wang wrote: The two operations DW_OP_AARCH64_paciasp and DW_OP_AARCH64_paciasp_deref were designed as shortcut operations when LR is signed with A ke

Re: [libstdc++, testsuite] Add dg-require-thread-fence

On 30/11/16 09:50 +0100, Christophe Lyon wrote: I'll try to think about it, but I can live with that single "known" failure. It's better than the ~3500 failures I used to have, and hopefully won't report false regressions anymore. OK, cool. One rather than 3500 is a nice improvement :-)

Re: [patch] boehm-gc removal and libobjc changes to build with an external bdw-gc

On 30.11.2016 11:52, Jakub Jelinek wrote: > On Wed, Nov 30, 2016 at 11:17:32AM +0100, Richard Biener wrote: >> On Wed, Nov 30, 2016 at 11:06 AM, Matthias Klose wrote: >>> On 30.11.2016 09:29, Andreas Schwab wrote: configure: error: no --with-target-bdw-gc options and no bdw-gc pkg-config >>>

Re: [patch] boehm-gc removal and libobjc changes to build with an external bdw-gc

On Wed, Nov 30, 2016 at 11:52 AM, Jakub Jelinek wrote: > On Wed, Nov 30, 2016 at 11:17:32AM +0100, Richard Biener wrote: >> On Wed, Nov 30, 2016 at 11:06 AM, Matthias Klose wrote: >> > On 30.11.2016 09:29, Andreas Schwab wrote: >> >> configure: error: no --with-target-bdw-gc options and no bdw-gc

Re: [patch] boehm-gc removal and libobjc changes to build with an external bdw-gc

On Wed, Nov 30, 2016 at 12:30 PM, Matthias Klose wrote: > On 30.11.2016 11:52, Jakub Jelinek wrote: >> On Wed, Nov 30, 2016 at 11:17:32AM +0100, Richard Biener wrote: >>> On Wed, Nov 30, 2016 at 11:06 AM, Matthias Klose wrote: On 30.11.2016 09:29, Andreas Schwab wrote: > configure: error

Re: Ping: Re: [PATCH 1/2] gcc: Remove unneeded global flag.

* Jeff Law [2016-11-29 10:35:50 -0700]: > On 11/29/2016 07:02 AM, Andrew Burgess wrote: > > * Jeff Law [2016-11-28 15:08:46 -0700]: > > > > > On 11/24/2016 02:40 PM, Andrew Burgess wrote: > > > > * Christophe Lyon [2016-11-21 13:47:09 > > > > +0100]: > > > > > > > > > On 20 November 2016 at

[PATCH, GCC/ARM] Add multilib mapping for Cortex-M23 & Cortex-M33

Hi, With ARM Cortex-M23 and Cortex-M33 and the support for RM profile multilib added recently, it's time to add the corresponding CPU to architecture mappings in config/arm/t-rmprofile. Note that Cortex-M33 is mapped to ARMv8-M Mainline because there is no transitive closure of mappings and th

Re: [PATCH][AArch64] PR target/78362: Make sure to only take REGNO of a register

On Wed, Nov 16, 2016 at 4:57 PM, Kyrill Tkachov wrote: > Hi all, > > As the PR says we have an RTL checking failure that occurs when building > libgcc for aarch64. > The expander code for addsi3 takes the REGNO of a SUBREG in operands[1]. The > three operands > in the failing case are: > {(reg:SI

Re: [PATCH, GCC/ARM] Add multilib mapping for Cortex-M23 & Cortex-M33

On Wed, Nov 30, 2016 at 11:48 AM, Thomas Preudhomme wrote: > Hi, > > With ARM Cortex-M23 and Cortex-M33 and the support for RM profile multilib > added recently, it's time to add the corresponding CPU to architecture > mappings in config/arm/t-rmprofile. Note that Cortex-M33 is mapped to > ARMv8-M

Re: [PATCH][AArch64] PR target/78362: Make sure to only take REGNO of a register

On Wed, Nov 16, 2016 at 04:57:29PM +, Kyrill Tkachov wrote: > Hi all, > > As the PR says we have an RTL checking failure that occurs when building > libgcc for aarch64. The expander code for addsi3 takes the REGNO of a SUBREG > in operands[1]. The > three operands in the failing case are: > {

Re: [PATCH, ARM] Further improve stack usage on sha512 (PR 77308)

Bernd Edlinger wrote: > On 11/29/16 16:06, Wilco Dijkstra wrote: > > Bernd Edlinger wrote: > > > > -  "TARGET_32BIT && reload_completed > > +  "TARGET_32BIT && ((!TARGET_NEON && !TARGET_IWMMXT) || reload_completed) > > && ! (TARGET_NEON && IS_VFP_REGNUM (REGNO (operands[0])))" > > > > This is e

[PATCH] Fix ira.c RTL sharing bug

Hi! I've discovered today that RTL sharing verification has been disabled for the last 3.5 years. My --enable-checking=yes,rtl,extra bootstraps on x86_64-linux and i686-linux revealed only two bugs. Here is a fix for one of them, x can be shared with another insn that has it in REG_EQUIV already

[PATCH] Fix rtl sharing bug in i?86 stv pass

Hi! This is another RTL sharing bug, tmp is created through gen_rtx_SUBREG and so shouldn't be shared by the move insn with the following insn that uses it. Bootstrapped/regtested on x86_64-linux and i686-linux (--enable-checking=yes,rtl,extra), ok for trunk? 2016-11-30 Jakub Jelinek

[PATCHv3 5/7, GCC, ARM, V8M] Handling ARMv8-M Security Extension's cmse_nonsecure_call attribute

Hi, I got a bug report against the old version of this patch and fixed it here. This had to do with GCC optimizations sharing types with and without the 'cmse_nonsecure_call' attribute. The patch now no longer sets the main variant, this didn't seem to do what I thought it did. Instead the patch

Re: [PATCH 7/7, GCC, ARM, V8M] Added support for ARMV8-M Security Extension cmse_nonsecure_caller intrinsic

Hi, I changed the testcase with this patch since the old testcase was casting a function pointer to another function pointer and using that pointer to call the function. This is undefined behavior. The new test reflects a more sane use of the intrinsics. Cheers, Andre diff --git a/gcc/config/arm/

[PATCH] Reenable RTL sharing verification

Hi! The http://gcc.gnu.org/ml/gcc-patches/2013-04/msg01055.html change broke all RTL sharing verification, even with --enable-checking=rtl we don't verify anything for the last 3.5 years. Fixed thusly, bootstrapped/regtested on x86_64-linux and i686-linux together with the previously posted 2 pat

Re: [patch] boehm-gc removal and libobjc changes to build with an external bdw-gc

On 30.11.2016 12:38, Richard Biener wrote: > On Wed, Nov 30, 2016 at 12:30 PM, Matthias Klose wrote: >> There's one more fix needed for the case of only having the pkg-config module >> installed when configuring with --enable-objc-gc. We can't use >> PKG_CHECK_MODULES >> directly because the pkg

[PATCH][PR sanitizer/78532] Fix libsanitizer build failure on sparc64-linux-gnu.

Hi, this patch restores libsanitizer build on sparc64-linux-gnu with Glibc 2.20+ on board. I verified that this patch fixes the build error locally with Glibc 2.24. Ok for mainline? libsanitizer/ChangeLog: 2016-11-30 Maxim Ostapenko PR sanitizer/78532 * sanitizer_common/sanitizer_platfo

Re: [PATCH] Reenable RTL sharing verification

On Wed, 30 Nov 2016, Jakub Jelinek wrote: > Hi! > > The http://gcc.gnu.org/ml/gcc-patches/2013-04/msg01055.html > change broke all RTL sharing verification, even with --enable-checking=rtl > we don't verify anything for the last 3.5 years. > > Fixed thusly, bootstrapped/regtested on x86_64-linux

Re: [PATCH][PR sanitizer/78532] Fix libsanitizer build failure on sparc64-linux-gnu.

On Wed, Nov 30, 2016 at 03:10:49PM +0300, Maxim Ostapenko wrote: > Hi, > > this patch restores libsanitizer build on sparc64-linux-gnu with Glibc 2.20+ > on board. > I verified that this patch fixes the build error locally with Glibc 2.24. > > Ok for mainline? > libsanitizer/ChangeLog: > > 2016

Re: [PATCH] Fix PR78306

2016-11-30 11:52 GMT+03:00 Richard Biener : > On Tue, 29 Nov 2016, Jeff Law wrote: > >> On 11/29/2016 12:47 AM, Richard Biener wrote: >> > > Balaji added this check explicitly. There should be tests in the >> > > testsuite >> > > (spawnee_inline, spawner_inline) which exercise that code. >> > >> >

Re: [PATCH] Fix ira.c RTL sharing bug

On 11/30/2016 01:02 PM, Jakub Jelinek wrote: I've discovered today that RTL sharing verification has been disabled for the last 3.5 years. My --enable-checking=yes,rtl,extra bootstraps on x86_64-linux and i686-linux revealed only two bugs. Ok for both patches. Bernd

[PATCH committed] Fix part of PR78555 - gcc/real.c:2890:25: runtime error: left shift of negative value -125

bootstrap-ubsan gcc shows: gcc/real.c:2890:25: runtime error: left shift of negative value -125 Fixed by casting to unsigned. Tested on ppc64le. Committed as obvious. PR ipa/78555 * real.c (real_hash): Add cast to avoid left shifting of negative values. diff --git a/gcc/re

[PATCH] ira: Don't substitute into TRAP_IF insns (PR78610)

In the testcase, IRA propagates a constant into a TRAP_IF insn, which then becomes an unconditional trap. Unconditional traps are control flow insns so doing this requires surgery on the cfg. We cannot do that here, so instead refuse to do the substitution. Bootstrapping + regression testing on

Re: [PATCH] ira: Don't substitute into TRAP_IF insns (PR78610)

On Wed, Nov 30, 2016 at 1:46 PM, Segher Boessenkool wrote: > In the testcase, IRA propagates a constant into a TRAP_IF insn, which > then becomes an unconditional trap. Unconditional traps are control > flow insns so doing this requires surgery on the cfg. Huh, that's an odd choice ;) I'd say T

Re: [PATCH] ira: Don't substitute into TRAP_IF insns (PR78610)

On 11/30/2016 05:46 AM, Segher Boessenkool wrote: In the testcase, IRA propagates a constant into a TRAP_IF insn, which then becomes an unconditional trap. Unconditional traps are control flow insns so doing this requires surgery on the cfg. We cannot do that here, so instead refuse to do the s

Re: [PATCH] ira: Don't substitute into TRAP_IF insns (PR78610)

On 11/30/2016 05:52 AM, Richard Biener wrote: On Wed, Nov 30, 2016 at 1:46 PM, Segher Boessenkool wrote: In the testcase, IRA propagates a constant into a TRAP_IF insn, which then becomes an unconditional trap. Unconditional traps are control flow insns so doing this requires surgery on the cf

Re: [PATCH] Partial solution to LWG 523

On 26/11/16 16:27 -0800, Tim Shen wrote: @@ -235,23 +242,86 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION _StrTransT _M_transform(_CharT __ch) const { - return _M_transform_impl(__ch, typename integral_constant::type()); + _StrTransT __str = _StrTransT(1, __ch); I know the c

[PATCH] [PR78112] Remove the g++.dg/pr78112.C testcase

Hello, I recently added a testcase for PR78112's resolution. Unfortunately, what it tests changes from one platform to another and I even get different results for a single platform (see ). As multiple developpers reported these errors and as

Re: [PATCH] ira: Don't substitute into TRAP_IF insns (PR78610)

On Wed, Nov 30, 2016 at 1:57 PM, Jeff Law wrote: > On 11/30/2016 05:52 AM, Richard Biener wrote: >> >> On Wed, Nov 30, 2016 at 1:46 PM, Segher Boessenkool >> wrote: >>> >>> In the testcase, IRA propagates a constant into a TRAP_IF insn, which >>> then becomes an unconditional trap. Unconditional

Re: [RFC] Assert DECL_ABSTRACT_ORIGIN is different from the decl itself

Hi, On Tue, Nov 29, 2016 at 10:17:02AM -0700, Jeff Law wrote: > On 11/29/2016 03:13 AM, Richard Biener wrote: > > On Mon, Nov 28, 2016 at 6:28 PM, Martin Jambor wrote: > > > Hi Jeff, > > > > > > On Mon, Nov 28, 2016 at 08:46:05AM -0700, Jeff Law wrote: > > > > On 11/28/2016 07:27 AM, Martin Jamb

Re: [PATCH] combine: Convert subreg-of-lshiftrt to zero_extract properly (PR78390)

On Wed, Nov 23, 2016 at 02:22:07PM +, Segher Boessenkool wrote: > r242414, for PR77881, introduces some bugs (PR78390, PR78438, PR78477). > It all has the same root cause: that patch makes combine convert every > lowpart subreg of a logical shift right to a zero_extract. This cannot > work at

Re: [PATCH] Fix rtl sharing bug in i?86 stv pass

On Wed, Nov 30, 2016 at 1:04 PM, Jakub Jelinek wrote: > Hi! > > This is another RTL sharing bug, tmp is created through gen_rtx_SUBREG > and so shouldn't be shared by the move insn with the following insn that > uses it. > > Bootstrapped/regtested on x86_64-linux and i686-linux > (--enable-checkin

[Patch, Fortran, committed] PR 78593: [6/7 Regression] ICE in gfc_match_varspec, at fortran/primary.c:2053

Hi all, I have just committed to trunk another obvious one-line fix for an ICE-on-invalid regression: https://gcc.gnu.org/viewcvs?rev=243020&root=gcc&view=rev I plan to backport this to the gcc-6 branch within a week or so. Cheers, Janus Index: gcc/fortran/primary.c

Re: PING! [PATCH, Fortran, accaf, v1] Add caf-API-calls to asynchronously handle allocatable components in derived type coarrays.

Hi Paul, thanks for the review. Committed with the changes requested and the one reported by Dominique on IRC for coarray_lib_alloc_4 when compiled with -m32 as r243021. Thanks for the review and tests. Regards, Andre On Wed, 30 Nov 2016 07:49:13 +0100 Paul Richard Thomas wrote: > De

Re: [PATCH] combine: Convert subreg-of-lshiftrt to zero_extract properly (PR78390)

On Wed, Nov 30, 2016 at 02:12:35PM +0100, Dominik Vogt wrote: > On Wed, Nov 23, 2016 at 02:22:07PM +, Segher Boessenkool wrote: > > r242414, for PR77881, introduces some bugs (PR78390, PR78438, PR78477). > > It all has the same root cause: that patch makes combine convert every > > lowpart subr

Re: [PATCH] ira: Don't substitute into TRAP_IF insns (PR78610)

On Wed, Nov 30, 2016 at 01:52:51PM +0100, Richard Biener wrote: > On Wed, Nov 30, 2016 at 1:46 PM, Segher Boessenkool > wrote: > > In the testcase, IRA propagates a constant into a TRAP_IF insn, which > > then becomes an unconditional trap. Unconditional traps are control > > flow insns so doing

Re: [PATCH] combine: Convert subreg-of-lshiftrt to zero_extract properly (PR78390)

Hi, On Wed, 30 Nov 2016, Dominik Vogt wrote: > On Wed, Nov 23, 2016 at 02:22:07PM +, Segher Boessenkool wrote: > > r242414, for PR77881, introduces some bugs (PR78390, PR78438, PR78477). > > It all has the same root cause: that patch makes combine convert every > > lowpart subreg of a logical

Re: PING! [PATCH, Fortran, accaf, v1] Add caf-API-calls to asynchronously handle allocatable components in derived type coarrays.

Hi Andre, after your commit I see several warnings when compiling libgfortran (see below). Could you please fix those (if possible)? Thanks, Janus /home/jweil/gcc/gcc7/trunk/libgfortran/caf/single.c: In function ‘_gfortran_caf_is_present’: /home/jweil/gcc/gcc7/trunk/libgfortran/caf/single.c:29

Re: [PATCH] ira: Don't substitute into TRAP_IF insns (PR78610)

On Wed, Nov 30, 2016 at 05:54:58AM -0700, Jeff Law wrote: > Funny how you speculated there could be these issues hiding in the > weeds, then just a few days later, one crawls out. Two (there is PR78607 as well). Although that one seems related to the combine one. All the same reporter, it's not

[PATCH PR78574]Fix infinite recursion in find_deriving_biv_for_expr

Hi, Loop header PHI defining IV(biv) may not be identified as biv because its increment statement is in (irreducible) inner loop. Function find_deriving_biv_for_expr doesn't take this into consideration and runs into infinite recursion. The patch fixes this issue by skipping such loop header

Re: [PATCH][AArch64] Separate shrink wrapping hooks implementation

On 29/11/16 20:29, Segher Boessenkool wrote: Hi James, Kyrill, On Tue, Nov 29, 2016 at 10:57:33AM +, James Greenhalgh wrote: +static sbitmap +aarch64_components_for_bb (basic_block bb) +{ + bitmap in = DF_LIVE_IN (bb); + bitmap gen = &DF_LIVE_BB_INFO (bb)->gen; + bitmap kill = &DF_LIVE_

Re: [PATCH PR78574]Fix infinite recursion in find_deriving_biv_for_expr

On Wed, Nov 30, 2016 at 2:54 PM, Bin Cheng wrote: > Hi, > Loop header PHI defining IV(biv) may not be identified as biv because its > increment statement is in (irreducible) inner loop. Function > find_deriving_biv_for_expr doesn't take this into consideration and runs into > infinite recursio

Re: [PATCH] combine: Convert subreg-of-lshiftrt to zero_extract properly (PR78390)

On Wed, Nov 30, 2016 at 02:43:12PM +0100, Michael Matz wrote: > > Shouldn't this be simply > > > > ... > > (ior:SI (zero_extract:SI (reg:DI) (16) (0))) > > ... > > I don't think mode-changing _extracts are valid in this context. From the > docu: > > `(sign_extract:M LOC SIZE POS)' >

Re: [PATCH] Fix PR78306

On Wed, 30 Nov 2016, Andrew Senkevich wrote: > 2016-11-30 11:52 GMT+03:00 Richard Biener : > > On Tue, 29 Nov 2016, Jeff Law wrote: > > > >> On 11/29/2016 12:47 AM, Richard Biener wrote: > >> > > Balaji added this check explicitly. There should be tests in the > >> > > testsuite > >> > > (spawnee

Re: PING! [PATCH, Fortran, accaf, v1] Add caf-API-calls to asynchronously handle allocatable components in derived type coarrays.

Janus, those fallthroughs are fully intentional and each and everyone is documented. When you can tell me a way to remove those false positive warnings I am happy to do so, when it comes at no extra costs at runtime. - Andre On Wed, 30 Nov 2016 14:48:38 +0100 Janus Weil wrote: > Hi Andre, > >

Re: PING! [PATCH, Fortran, accaf, v1] Add caf-API-calls to asynchronously handle allocatable components in derived type coarrays.

Hi all, on IRC: 15:28:22 dominiq: vehre: add /* FALLTHROUGH */ Done and committed as obvious as r243023. - Andre On Wed, 30 Nov 2016 15:22:46 +0100 Andre Vehreschild wrote: > Janus, > > those fallthroughs are fully intentional and each and everyone is documented. > When you can tell me a wa

[Patch doc] Document _Float16 availability on ARM/AArch64

Hi, As subject - update extend.texi to mention availability of _Float16 types on ARM and AArch64. OK? Thanks, James --- 2016-11-30 James Greenhalgh * doc/extend.texi (Floating Types): Document availability of _Float16 on ARM/AArch64. diff --git a/gcc/doc/extend.texi b/gcc/

[PATCH,libstdc++] xfail operator new on AIX

AIX shared libraries do not allow overriding and interposition of symbols by default, which is used to override operators, such as operator new (and operator delete) in C++. Four libstdc++ testcases rely on this behavior and fail on AIX. Jonathan and I have decided to XFAIL the testcases to reduc

Re: [PATCH] combine: Convert subreg-of-lshiftrt to zero_extract properly (PR78390)

Hi, On Wed, 30 Nov 2016, Segher Boessenkool wrote: > > I don't think mode-changing _extracts are valid in this context. From the > > docu: > > > > `(sign_extract:M LOC SIZE POS)' > > ... > > The mode M is the same as the mode that would be used for LOC if > > it were a register.

Re: [PATCH] Partial solution to LWG 523

On 30/11/16 13:03 +, Jonathan Wakely wrote: On 26/11/16 16:27 -0800, Tim Shen wrote: diff --git a/libstdc++-v3/include/bits/shared_ptr_base.h b/libstdc++-v3/include/bits/shared_ptr_base.h index 953aa87..2fb70b7 100644 --- a/libstdc++-v3/include/bits/shared_ptr_base.h +++ b/libstdc++-v3/incl

[Patch Doc] Update documentation for __fp16 type

Hi, Documentation for __fp16 seems to have drifted out of line with compiler behaviour over time. This patch tries to fix that up, documenting AArch64 support and removing comments on restrictions on using the __fp16 type for arguments and return types. OK? Thanks, James --- 2016-11-30 James

Re: PING! [PATCH, Fortran, accaf, v1] Add caf-API-calls to asynchronously handle allocatable components in derived type coarrays.

Hi, > on IRC: > 15:28:22 dominiq: vehre: add /* FALLTHROUGH */ > > Done and committed as obvious as r243023. thanks. However, I still see these two: >> > /home/jweil/gcc/gcc7/trunk/libgfortran/caf/single.c: In function >> > ‘_gfortran_caf_get_by_ref’: >> > /home/jweil/gcc/gcc7/trunk/libgfortra

Re: [v3 PATCH] Implement LWG 2534, Constrain rvalue stream operators.

On 30 November 2016 at 16:59, David Edelsohn wrote: > I believe that this broke g++.old-deja/g++.law/ctors10.C > > invalid initialization of reference of type 'Klasse::Err&' from > expression of type 'std::basic_ostream::__ostream_type {aka > std::basic_ostream} I'll take a look.

Re: [v3 PATCH] Implement LWG 2534, Constrain rvalue stream operators.

I believe that this broke g++.old-deja/g++.law/ctors10.C invalid initialization of reference of type 'Klasse::Err&' from expression of type 'std::basic_ostream::__ostream_type {aka std::basic_ostream} - David

Re: [v3 PATCH] LWG 2766, LWG 2749

On 26/11/16 14:47 +0200, Ville Voutilainen wrote: Updated patches attached, and tested with the full testsuite on Linux-PPC64. Both patches are OK for trunk with the minor tweaks noted below. Thanks. diff --git a/libstdc++-v3/include/bits/stl_pair.h b/libstdc++-v3/include/bits/stl_pair.h in

Re: Ping: Re: [patch, avr] Add flash size to device info and make wrap around default

On 30.11.2016 07:27, Pitchumani Sivanupandi wrote: On Tuesday 29 November 2016 10:06 PM, Denis Chertykov wrote: 2016-11-28 10:17 GMT+03:00 Pitchumani Sivanupandi : On Saturday 26 November 2016 12:11 AM, Denis Chertykov wrote: I'm sorry for delay. I have a problem with the patch: (Stripping tr

Re: [PATCH GCC]Simplify (cond (cmp (convert? x) c1) (op x c2) c3) -> (op (minmax x c1) c2)

On Fri, Nov 18, 2016 at 5:53 PM, Bin Cheng wrote: > Hi, > This is a rework of https://gcc.gnu.org/ml/gcc-patches/2016-10/msg02007.html. > Though review comments suggested it could be merged with last kind > simplification > of fold_cond_expr_with_comparison, it's not really applicable. As a matt

Re: [PATCHv2 4/7, GCC, ARM, V8M] ARMv8-M Security Extension's cmse_nonsecure_entry: clear registers

On 23/11/16 11:52, Andre Vieira (lists) wrote: > Hi, > > After some extra testing I realized there was an issue with the way we > were clearing registers when returning from a cmse_nonsecure_entry > function for ARMv8-M.Baseline. This patch fixes that and changes the > testcase to catch the issue

[PATCH,rs6000] Correct mode of operand 2 in vector extract half-word and word instruction patterns

This patch corrects an error in a patch committed on 2016-10-18 to add built-in function support for Power9 string operations. In that original patch, the mode for operand 2 of the newly added vector extract half-word and full-word instruction patterns was described as V16QI, even though those in

[v3 PATCH] Fix testsuite failures caused by the patch implementing LWG 2534.

2016-11-30 Ville Voutilainen Fix testsuite failures caused by the patch implementing LWG 2534. * include/std/istream (__is_convertible_to_basic_istream): Change the return types of __check, introduce stream_type. (operator>>(_Istream&&, _Tp&&)): Use __is_convertible_to_basic

Re: PING! [PATCH, Fortran, accaf, v1] Add caf-API-calls to asynchronously handle allocatable components in derived type coarrays.

Fixed -> r243034. - Andre On Wed, 30 Nov 2016 15:53:39 +0100 Janus Weil wrote: > Hi, > > > on IRC: > > 15:28:22 dominiq: vehre: add /* FALLTHROUGH */ > > > > Done and committed as obvious as r243023. > > thanks. However, I still see these two: > > > >> > /home/jweil/gcc/gcc7/trunk/libgfo

Re: [PATCH] combine: Convert subreg-of-lshiftrt to zero_extract properly (PR78390)

On Wed, Nov 30, 2016 at 03:40:32PM +0100, Michael Matz wrote: > Hi, > > On Wed, 30 Nov 2016, Segher Boessenkool wrote: > > > > I don't think mode-changing _extracts are valid in this context. From > > > the > > > docu: > > > > > > `(sign_extract:M LOC SIZE POS)' > > > ... > > > The m

Re: [PATCH,rs6000] Correct mode of operand 2 in vector extract half-word and word instruction patterns

On Wed, Nov 30, 2016 at 08:35:08AM -0700, Kelvin Nilsen wrote: > This patch corrects an error in a patch committed on 2016-10-18 to add > built-in function support for Power9 string operations. In that > original patch, the mode for operand 2 of the newly added vector > extract half-word and full-

Re: [PATCH 7/9] Add RTL-error-handling to host

On 11/29/2016 10:13 PM, Bernd Schmidt wrote: On 11/29/2016 07:53 PM, David Malcolm wrote: Would you prefer that I went with approach (B), or is approach (A) acceptable? Well, I was hoping there'd be an approach (C) where the read-rtl code uses whatever diagnostics framework that is available.

Re: [PATCH] Fix prs 78602 & 78560 on PowerPC (vec_extract/vec_sec)

On Wed, Nov 30, 2016 at 12:55:29AM -0500, Michael Meissner wrote: > I have done full bootstraps and make check with no regressions on a little > endian power8 (64-bit only), a big endian power8 (64-bit only), and a big > endian power7 (both 32-bit and 64-bit). Cann I install both patches to the >

Re: [v3 PATCH] Fix testsuite failures caused by the patch implementing LWG 2534.

On 30/11/16 17:58 +0200, Ville Voutilainen wrote: Fix testsuite failures caused by the patch implementing LWG 2534. * include/std/istream (__is_convertible_to_basic_istream): Change the return types of __check, introduce stream_type. (operator>>(_Istream&&, _Tp&&)): Use __is_conver

Re: [Patches] Add variant constexpr support for visit, comparisons and get

On 26/11/16 21:38 -0800, Tim Shen wrote: This 4-patch series contains the following in order: a.diff: Remove uses-allocator ctors. They are going away, and removing it reduces the maintenance burden from now on. Yay! less code. b.diff: Add constexpr support for get<> and comparisons. This pa

[PATCH][ARM] PR target/71436: Restrict *load_multiple pattern till after LRA

Hi all, In this awkward ICE we have a *load_multiple pattern that is being transformed in reload from: (insn 55 67 151 3 (parallel [ (set (reg:SI 0 r0) (mem/u/c:SI (reg/f:SI 147) [2 c+0 S4 A32])) (set (reg:SI 158 [ c+4 ]) (mem/u/c:SI (plus:

Re: [patch] boehm-gc removal and libobjc changes to build with an external bdw-gc

On 30.11.2016 12:38, Richard Biener wrote: > On Wed, Nov 30, 2016 at 12:30 PM, Matthias Klose wrote: >> There's one more fix needed for the case of only having the pkg-config module >> installed when configuring with --enable-objc-gc. We can't use >> PKG_CHECK_MODULES >> directly because the pkg.

Re: [PATCH, ARM] Further improve stack usage on sha512 (PR 77308)

On 11/30/16 13:01, Wilco Dijkstra wrote: > Bernd Edlinger wrote: >> On 11/29/16 16:06, Wilco Dijkstra wrote: >>> Bernd Edlinger wrote: >>> >>> - "TARGET_32BIT && reload_completed >>> + "TARGET_32BIT && ((!TARGET_NEON && !TARGET_IWMMXT) || reload_completed) >>> && ! (TARGET_NEON && IS_VFP_REG

Re: [PATCH 2/4] [ARC] Cleanup implementation.

* Claudiu Zissulescu [2016-11-16 11:17:59 +0100]: > gcc/ > 2016-06-30 Claudiu Zissulescu There seem to be two sets of changes here: > > * config/arc/arc-protos.h (insn_is_tls_gd_dispatch): Remove. > * config/arc/arc.c (arc_unspec_offset): New function. > (arc_finalize_pic

Re: [libgomp] No references to env.c -> no libgomp construction

[redirecting from gcc@ to gcc-patches@ for patch submission] On Wed, 30 Nov 2016, Sebastian Huber wrote: > > On Tue, 29 Nov 2016, Sebastian Huber wrote: > > > * env.c: Split out ICV definitions into... > > > * icv.c: ...here (new file) and... > > > * icv-device.c: ...here.

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