will migrate Linux systems so that long
double will be the same as __float128, but these patches do not change the
default behavior.
Are these patches acceptable to be checked into the trunk?
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss
extended double format.
2014-07-15 Michael Meissner meiss...@linux.vnet.ibm.com
* soft-fp/quad.h (TFtype): Allow TFmode to be overridden by the
machine dependent files.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss
Michael Meissner meiss...@linux.vnet.ibm.com
* config.host (powerpc64*-*-linux*): Add t-float128 to PowerPC
64-bit linux builds.
* config/rs6000/float128-int-vsx.c: New files to support IEEE
128-bit floating point (__float128) in PowerPC. Two versions
that starts at the narrowest type, and goes up by
widening types, until an appropriate mode is found, or we find the mode
itself. I needed to check whether the wider mode was VOIDmode as well as the
original type.
2014-07-15 Michael Meissner meiss...@linux.vnet.ibm.com
* cse.c (cse_insn
Michael Meissner meiss...@linux.vnet.ibm.com
* gcc.target/powerpc/float128-1.c: New tests for IEEE 128-bit
floating point support.
* gcc.target/powerpc/float128-2.c: Likewise.
* gcc.target/powerpc/float128-3.c: Likewise.
* gcc.target/powerpc/float128-4.c
double: 1.74x
float vs vector float:4.52x
double vs vector double: 2.62x
long double vs double: 5.38x
__float128 vs double: 15.14x
__float128 vs long double: 2.82x
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245
On Tue, Jul 15, 2014 at 04:50:33PM -0500, Segher Boessenkool wrote:
On Tue, Jul 15, 2014 at 05:20:31PM -0400, Michael Meissner wrote:
I did some timing tests to compare the new PowerPC IEEE 128-bit results to
the
current implementation of long double using the IBM extended format
On Tue, Jul 15, 2014 at 04:50:33PM -0500, Segher Boessenkool wrote:
On Tue, Jul 15, 2014 at 05:20:31PM -0400, Michael Meissner wrote:
I did some timing tests to compare the new PowerPC IEEE 128-bit results to
the
current implementation of long double using the IBM extended format
On Fri, Jul 25, 2014 at 09:38:49PM +, Joseph S. Myers wrote:
On Tue, 15 Jul 2014, Michael Meissner wrote:
This patch is the machine independent patch for libgcc to add IEEE 128-bit
floating point to the PowerPC.
This patch allows the PowerPC port to override the TFtype in quad.h
doing a load, vector add, and
store in the loop.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.vnet.ibm.com, phone: +1 (978) 899-4797
, as it doesn't generate the new
instructions. I would like to also figure out why bwaves/cactusADM slow down.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.vnet.ibm.com, phone: +1 (978) 899-4797
bootstraps again:
2014-11-11 Michael Meissner meiss...@linux.vnet.ibm.com
* config/rs6000/predicates.md (easy_fp_constant): Delete redunant
tests for 0.0.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.vnet.ibm.com
Michael Meissner meiss...@linux.vnet.ibm.com
* config/rs6000/vector.md (VEC_R): Move secondary reload support
insns to rs6000.md from vector.md.
(reload_VEC_R:mode_P:mptrsize_store): Likewise.
(reload_VEC_R:mode_P:mptrsize_load): Likewise
the
PowerPC bootstraps?
I also fixed up the tests that were affected by these changes.
[gcc, patch]
2014-11-11 Michael Meissner meiss...@linux.vnet.ibm.com
* config/rs6000/vsx.md (vsx_floatVSimode2): Only provide the
vector forms of the instructions. Move VSX scalar forms
ATTRIBUTE_NORETURN.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.vnet.ibm.com, phone: +1 (978) 899-4797
Index: gcc/config/rs6000/rs6000.c
===
--- gcc/config/rs6000/rs6000
sure there are no regressions.
Is this patch ok to check in?
2014-11-11 Michael Meissner meiss...@linux.vnet.ibm.com
Ulrich Weigand ulrich.weig...@de.ibm.com
* config/rs6000/rs6000.c (rs6000_secondary_reload_toc_costs):
Helper function to identify costs of a TOC load
if
-mupper-regs-sf.
* doc/invoke.texi (RS/6000 and PowerPC Options): Document
-mupper-regs-{sf,df}.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.vnet.ibm.com, phone: +1 (978) 899-4797
Index: gcc/config/rs6000
for some time (this
test was a preliminary test for the upper regs support).
Assuming the previous patches are checked in, is this patch ok to install?
2014-11-11 Michael Meissner meiss...@linux.vnet.ibm.com
* gcc.target/powerpc/p8vector-ldst.c: Rewrite to use 40 live
floating point
On Tue, Nov 11, 2014 at 01:10:01AM -0600, Segher Boessenkool wrote:
On Mon, Nov 10, 2014 at 05:36:24PM -0500, Michael Meissner wrote:
However, the double pattern is completely broken. This cannot go in.
[snip]
It is unacceptable to have to do the inner loop doing a load, vector add
On Wed, Nov 12, 2014 at 03:26:35AM -0600, Segher Boessenkool wrote:
On Tue, Nov 11, 2014 at 08:27:22PM -0500, Michael Meissner wrote:
Before the patch, the final reduction used *vsx_reduc_splus_v2df; after
the patch, it is *vsx_reduc_plus_v2df_scalar. The former does a vector
add
the lines in rs6000-cpu.def that sets
the default.
2014-11-14 Michael Meissner meiss...@linux.vnet.ibm.com
* config/rs6000/predicates.md (memory_fp_constant): New predicate
to return true if the operand is a floating point constant that
must be put into the constant pool
), power8 systems (default cpu = power8 and power5). The compilers
bootstrap and do not have regressions. Are the patches ok to install?
2014-11-20 Michael Meissner meiss...@linux.vnet.ibm.com
PR target/63965
* config/rs6000/rs6000.c (rs6000_setup_reg_addr_masks): Do not set
patches.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.vnet.ibm.com, phone: +1 (978) 899-4797
suite. Are these
patches ok to install on both the trunk? I would like to apply these patches
there as well, when all of the ISA 2.07 changes are present in the 4.8 branch,
Can I apply these patches?
[gcc]
2014-03-26 Michael Meissner meiss...@linux.vnet.ibm.com
* config/rs6000
. It wasn't included in the group of patches
for 4.8 that have been widely tested.
I would at least like to add the part that adds vbpermq, even if we don't add
the vec_extract optimizations.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss
with no regressions. Are these patches
ok to apply to 4.9 and backported to 4.8 when the rest of the changes go in?
[gcc]
2014-03-27 Michael Meissner meiss...@linux.vnet.ibm.com
PR target/60672
* config/rs6000/altivec.h (vec_xxsldwi): Add missing define to
enable use
, but I figured just having the vec_xxx would
suffice, particularly if it is documented.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.vnet.ibm.com, phone: +1 (978) 899-4797
Whoops, I forgot to document the new builtin. I just committed this change to
the documentation file. Sorry about that.
I also deleted the comment on the nop instruction, just in case there is a VSX
assembler some day that uses a different comment convention.
2014-03-27 Michael Meissner
It was pointed out to me that I neglated to document the powerpc ISA 2.07
builtin function vec_vbggd. After making sure the documentation built, I
checked in the following patch as being obvious:
2014-04-01 Michael Meissner meiss...@linux.vnet.ibm.com
* doc/extend.texi (PowerPC
. In addition, I tested the code generated using cross compilers to
the Linux SPE system. Is this patch acceptible to be checked in the trunk (and
to the 4.8 branch when the other patches are approved)?
2014-04-01 Michael Meissner meiss...@linux.vnet.ibm.com
PR target/60735
* config
On Thu, Apr 03, 2014 at 01:24:25PM -0400, David Edelsohn wrote:
On Tue, Apr 1, 2014 at 7:55 PM, Michael Meissner
meiss...@linux.vnet.ibm.com wrote:
In backporting the power8 changes to the 4.8 branch, one of the testers of
these patches noticed that libgcc cannot be built on a linux SPE
I committed the following patch as obvious to fix the PowerPC build issue that
came up with changes to machmode.h. These changes allow the compiler to build
and bootstrap. Submitted as subversion id 209498.
2014-04-17 Michael Meissner meiss...@linux.vnet.ibm.com
PR target/60876
Rohit says this more narrow patch for PR 60735 fixes the problem and does not
appear to have any other side effects. I have done bootstrap builds on powerpc
Linux with no regressions. Is it ok to apply to the 4.8, 4.9 branches and
trunk?
[gcc]
2014-04-17 Michael Meissner meiss
needed to put it aside to look at other issues, and it has bubbled up to be
high on my list of priorities.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.vnet.ibm.com, phone: +1 (978) 899-4797
On Tue, Apr 22, 2014 at 10:29:55PM +0200, Jakub Jelinek wrote:
On Tue, Apr 22, 2014 at 04:26:23PM -0400, Michael Meissner wrote:
On Tue, Apr 22, 2014 at 10:06:19PM +0200, Marc Glisse wrote:
Hello,
as written in the PR, my patch seems wrong for platforms like
powerpc that already
agree on a name, it would be helpful if quad.h in
libgcc/soft-fp (which comes from the glibc sources) used that to use the
__float128 type. Unfortunately, given the IBM double-double size is 128-bits,
the attribute((mode(TF))) won't work for us.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King
a standard name for IEEE 128-bit floating point,
whether it is a defacto standard like __float128, or something in future
standards like _Float128.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.vnet.ibm.com, phone: +1 (978) 899-4797
.c now
passes on the little endian power8 with this fix.
Are these patches ok to check into the trunk, and 4.9/4.8 branches?
2014-06-06 Michael Meissner meiss...@linux.vnet.ibm.com
PR target/61431
* config/rs6000/vsx.md (VSX_LE): Split VSX_D into 2 separate
iterators
bootstrapped and checked the patch, and it caused no regressions in the test
suite. Is it ok to apply?
[gcc]
2014-02-10 Michael Meissner meiss...@linux.vnet.ibm.com
PR target/60137
* config/rs6000/rs6000.md (128-bit GPR splitter): Add a splitter
for VSX/Altivec vectors
direct move, but
this simple patch does help the machines with direct move.
I bootstrapped the compiler with/without the change, and there were no
regressions in the test suite. Is it ok to check into the tree?
[gcc]
2014-02-14 Michael Meissner meiss...@linux.vnet.ibm.com
PR target
I forgot to add the new test to my patches.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.vnet.ibm.com, phone: +1 (978) 899-4797
2014-02-14 Michael Meissner meiss...@linux.vnet.ibm.com
PR target/60203
* gcc.target
regressions in the future.
2014-02-18 Michael Meissner meiss...@linux.vnet.ibm.com
PR target/60203
* config/rs6000/rs6000.md (movmode_64bit, TF/TDmode moves):
Split 64-bit moves into 2 patterns. Do not allow the use of
direct move for TDmode in little endian, since
Whoops, the ChangeLog entry was not complete:
2014-02-18 Michael Meissner meiss...@linux.vnet.ibm.com
PR target/60203
* config/rs6000/rs6000.md (movmode_64bit, TF/TDmode moves):
Split 64-bit moves into 2 patterns. Do not allow the use of
direct move for TDmode
and little endian power8
systems, and it produces the correct values in both cases. Are the patches ok
to install?
[gcc]
2014-03-05 Michael Meissner meiss...@linux.vnet.ibm.com
* doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
Document vec_vaddcuq, vec_vadduqm
contact me privately and I'll send it your way.
One way to get around this is to compress the patch, but it generally better to
try and split the patch into smaller pieces.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.vnet.ibm.com, phone
%.
I did a bootstrap/make check comparison, and there were no regressions. Is it
ok to install in trunk and the active PowerPC branches?
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.vnet.ibm.com, phone: +1 (978) 899-4797
Index: gcc
On Wed, Sep 10, 2014 at 04:42:06PM -0400, David Edelsohn wrote:
Needs a ChangeLog.
Whoops, I forgot to include it:
2014-09-10 Michael Meissner meiss...@linux.vnet.ibm.com
* config/rs6000/vsx.md (vsx_fmav4sf4): Use correct constraints for
V2DF, V4SF, DF, and DI modes
, and the
4.8/4.9 branches?
2014-09-16 Michael Meissner meiss...@linux.vnet.ibm.com
* config/rs6000/predicates.md (fusion_gpr_mem_load): Move testing
for base_reg_operand to be common between LO_SUM and PLUS.
(fusion_gpr_mem_combo): New predicate to match a fused address
. Are the
patches ok to install?
2014-09-22 Michael Meissner meiss...@linux.vnet.ibm.com
* config/rs6000/rs6000.md (f32_vsx): New mode attributes to
refine the constraints used on 32/64-bit floating point moves.
(f32_av): Likewise.
(f64_vsx): Likewise
a global maintainer or driver maintainer to look at it? Thanks in
advance.
--
Michael Meissner, IBM
5 Technology Place Drive, M/S 2757, Westford, MA 01886-3141, USA
meiss...@linux.vnet.ibm.com fax +1 (978) 399-6899
/gcc/lra.c:2371
0x105ebd03 do_reload
/home/meissner/fsf-src/lra/gcc/ira.c:4624
0x105ebfef rest_of_handle_reload
/home/meissner/fsf-src/lra/gcc/ira.c:4737
--
Michael Meissner, IBM
5 Technology Place Drive, M/S 2757, Westford, MA 01886-3141, USA
meiss...@linux.vnet.ibm.com fax +1
LRA_SUBREG_P.
(emit_spill_move): Set up LRA_SUBREG_P.
Yes this fixes the bug and allows a bootstrap. Thanks. Note, the fortran
compiler in your branch is buggy, and I get a lot of failures when doing a make
check. I don't get similar failures on today's branch (not using LRA).
--
Michael
Another issue that was noticed was __builtin_ia32_packssdw256 did not have the
initial '__'. I committed this patch as obvious to both the trunk and GCC 4.7.
2013-01-11 Michael Meissner meiss...@linux.vnet.ibm.com
* doc/extend.texi (X86 Built-in Functions): Add missing
Somebody within IBM pointed out to me that the documentation for the x86
__builtin_ia32_padd256b and __builtin_ia32_pavgb256 were missing a space
between the type and the __builtin name. I committed this patch as obvious to
the trunk, and will update gcc 4.7 shortly.
2013-01-11 Michael Meissner
of
loading the zero value from memory.
I have bootstraped, and there are no regressions with these patches. Are these
patches acceptible, so that I can check them in directly when the GCC 4.9 tree
opens up?
[gcc]
2013-01-30 Michael Meissner meiss...@linux.vnet.ibm.com
* config/rs6000
for the power6x.
I have tested this via bootstrap, and there were no regressions. Is patch
acceptable to check in when the 4.9 tree opens up?
2013-01-30 Michael Meissner meiss...@linux.vnet.ibm.com
* config/rs6000/constraints.md (wg constraint): New constraint to
return
opens up?
I have one more patch in the insn combination to post, combining movdi on
systems with normal floating point and with the power6 direct move
instructions.
[gcc]
2013-01-30 Michael Meissner meiss...@linux.vnet.ibm.com
* config/rs6000/rs6000.c (rs6000_debug_reg_global): Print out
This is the last of the merge insn patches. It merges the power6x movdi with
the normal floating point movdi.
2013-01-30 Michael Meissner meiss...@linux.vnet.ibm.com
* config/rs6000/rs6000.md (movdi_mfpgpr): Delete, combine with
movdi_internal64, using wg constraint for move
None of these changes affect the code, but they provide some more information
that I've found useful when using the -mdebug=reg and -mdebug=addr options.
When GCC 4.9 opens up, can I install these patches in the source tree
2013-01-31 Michael Meissner meiss...@linux.vnet.ibm.com
(-mvsx-timode) to disable putting TImode into VSX
registers.
2013-01-31 Michael Meissner meiss...@linux.vnet.ibm.com
* config/rs6000/vector.md (mulmode3): Use the combined macro
VECTOR_UNIT_ALTIVEC_OR_VSX_P instead of separate calls to
VECTOR_UNIT_ALTIVEC_P
and trunk?
[gcc]
2013-02-07 Michael Meissner meiss...@linux.vnet.ibm.com
PR target/56043
* config/rs6000/rs6000.c (rs6000_builtin_vectorized_libmass):
If there is no implicit builtin declaration, just return NULL.
[gcc/testsuite]
2013-02-07 Michael Meissner meiss
into.
2011-03-15 Michael Meissner meiss...@linux.vnet.ibm.com
* gcc.target/powerpc/pr48053-3.c: New file, add test case for
split problem of 0 being loaded in a VSX register.
Index: gcc/testsuite/gcc.target/powerpc/pr48053-3.c
4.4. Are there objections
to backporting it?
[libcpp]
2011-03-18 Michael Meissner meiss...@linux.vnet.ibm.com
PR preprocessor/48192
* directives.c (do_ifdef): Do not consider conditional macros as
being defined.
(do_ifndef): Ditto.
* expr.c
the same problem.
[gcc]
2011-03-21 Michael Meissner meiss...@linux.vnet.ibm.com
PR target/48226
* config/rs6000/rs6000-c.c (rs6000_macro_to_expand): If we see a
vector when peeking at the next token for vector, don't expand the
keywords.
[gcc/testsuite]
2011-03-21
systems.
I ran the dg-torture.exp tests, and these two tests now do not fail on 32-bit
PowerPC. Is this ok to install in 4.7?
2011-03-21 Michael Meissner meiss...@linux.vnet.ibm.com
* gcc.dg/torture/vector-1.c: On powerpc add -fabi=altivec to avoid
failure on 32-bit systems
suspect there are more opportunities for improving vector extract and insert
with VSX.
I did a bootstrap and make check with no regressions. Is this ok to install on
the trunk?
[gcc]
2011-03-23 Michael Meissner meiss...@linux.vnet.ibm.com
PR target/48258
* config/rs6000/vector.md
-strided-u8-i8-gap2.c
gcc.dg/vect/vect-strided-u8-i8-gap4.c
gcc.dg/vect/vect-strided-u8-i8-gap7.c
gcc.dg/vect/vect-strided-u8-i8.c
gcc.dg/vect/vect-vfa-03.c
2011-03-31 Andrew Pinski pins...@gmail.com
Michael Meissner meiss...@linux.vnet.ibm.com
PR target/48262
* config
On Wed, Sep 21, 2011 at 05:01:31PM -0400, David Miller wrote:
From: Michael Meissner meiss...@linux.vnet.ibm.com
Date: Thu, 15 Sep 2011 14:16:45 -0400
On the powerpc, we have an issue with Spec 2006 and calculix when FMAs are
generated and -ffast-math is used, where line 307 of rubber.f
On Sat, Oct 01, 2011 at 02:11:27PM +, Joseph S. Myers wrote:
On Fri, 30 Sep 2011, Michael Meissner wrote:
Is this enough of a savings to continue on? I'm of two minds about it, one
is
The thing to measure is not so much memory as startup time (how long it
takes to compile
On Tue, Oct 04, 2011 at 02:44:00PM +0200, Richard Guenther wrote:
On Tue, Oct 4, 2011 at 2:07 AM, Michael Meissner
meiss...@linux.vnet.ibm.com wrote:
On Sat, Oct 01, 2011 at 02:11:27PM +, Joseph S. Myers wrote:
On Fri, 30 Sep 2011, Michael Meissner wrote:
Is this enough of a savings
On Thu, Oct 06, 2011 at 03:23:07PM +0200, Tobias Burnus wrote:
On 10/06/2011 03:02 PM, Michael Meissner wrote:
On the x86 (with Fedora 13), I built and tested the C, C++, Objective C,
Java, Ada,
and Go languages with no regressions
On a power6 box with RHEL 6.1, I
have done the same for C
David pointed out that I had a typo in the AIX code in my builtin changes on
October 11th. I've checked this patch in as obvious.
2011-10-14 Michael Meissner meiss...@linux.vnet.ibm.com
* config/rs6000/rs6000.c (rs6000_init_builtins): Fix typo in my
change on October 11th
the loop. We also have the problem we've had for a couple of years that
if the type is signed char or signed short, the compiler wants to promote the
items to int and does this by several unpacks and repacks.
--
Michael Meissner, IBM
5 Technology Place Drive, M/S 2757, Westford, MA 01886-3141
instead of using the targetm.vectorize.builtin_vec_perm hook? It has
always struck me as a sore thumb that we have a hook that needs to return a
builtin function decl (targetm.vectorize.builtin_mask_for_load also).
--
Michael Meissner, IBM
5 Technology Place Drive, M/S 2757, Westford, MA 01886
In doing my next round of lazy builtins I noticed I had accidently put in an
extra new line into builtins.c. I committed this patch as being obvious after
doing a bootstrap:
2011-10-24 Michael Meissner meiss...@linux.vnet.ibm.com
* builtins.c (set_builtin_user_assembler_name): Remove
MD builtins first.
As before, my development branch is:
svn+ssh://gcc.gnu.org/svn/gcc/branches/ibm/builtin
[gcc]
2011-10-24 Michael Meissner meiss...@linux.vnet.ibm.com
* tree.h (BUILTIN_CLASS_BITS): Add lazy builtin support that is
enabled by default for C and disabled for C
.
--
Michael Meissner, IBM
5 Technology Place Drive, M/S 2757, Westford, MA 01886-3141, USA
meiss...@linux.vnet.ibm.com fax +1 (978) 399-6899
with
and without the patch, and there were no regressions.
[gcc]
2012-04-11 Michael Meissner meiss...@linux.vnet.ibm.com
PR target/52775
* config/rs6000/rs6000.h (TARGET_FCFID): Add TARGET_PPC_GPOPT to
the list of options to enable the FCFID instruction
the
bswap64 did not have an alternate code path for -mavoid-indexed-addresses.
This patch adds the alternate code path. I bootstraped it with today's
compiler and there were no regressions in make check. Is it ok to apply?
[gcc]
2012-05-03 Michael Meissner meiss...@linux.vnet.ibm.com
PR
there as
well.
2012-05-23 Michael Meissner meiss...@linux.vnet.ibm.com
* configure.ac (--disable-ppc64-swfloat): New configure switches
for powerpc64-linux to disable building multlibs for 32-bit
software floating point emulation, and to remove the
-mstrict-align option
On Wed, May 23, 2012 at 10:59:10PM +, Joseph S. Myers wrote:
On Wed, 23 May 2012, Michael Meissner wrote:
An alternative would be for the powerpc64-linux case, should we just delete
the
software floating emulation multilib and stop using the -mstrict-align,
since
Linux only runs
On Thu, May 24, 2012 at 07:11:53PM -0400, David Edelsohn wrote:
On Wed, May 23, 2012 at 6:36 PM, Michael Meissner
meiss...@linux.vnet.ibm.com wrote:
On powerpc64-linux systems that run on IBM servers, the 32-bit software
emulation library is not built with the Red Hat and SUSE distributions
/pr44691.f Trunk fails, Segher passes for 64-bit
Now, all of these differences are in tests that do selective scheduling, so I'm
not sure they are blockers.
--
Michael Meissner, IBM
5 Technology Place Drive, M/S 2757, Westford, MA 01886-3141, USA
meiss...@linux.vnet.ibm.com fax +1
(there are some other
small differences as well).
Yes, I was using the previous versions. Sorry about that.
--
Michael Meissner, IBM
5 Technology Place Drive, M/S 2757, Westford, MA 01886-3141, USA
meiss...@linux.vnet.ibm.com fax +1 (978) 399-6899
?
Waste said million cycles portably by calling sched_yield()?
(Available only on POSIX systems. :)
Well only for a test environment. You don't want to call sched_yield in the
normal case, since the apps that do this many millions of times need this to be
as a fast as possible.
--
Michael
the call.
Unfortunately, I do see a 3% slowdown in 429.mcf, which I don't know what the
cause is.
I have bootstraped the compiler and saw that there were no regressions in make
check. Is it ok to install in the trunk?
[gcc]
2011-07-06 Michael Meissner meiss...@linux.vnet.ibm.com
* config
the chain register (ir11/i) before calling a
+function through a pointer. If you use this option, you cannot call
+nested functions through a pointer, or call other languages that might
+use the static chain.
+ /li
/ul
h3MIPS/h3
--
Michael Meissner, IBM
5
On Thu, Jul 07, 2011 at 10:59:36AM +0200, Richard Guenther wrote:
On Thu, Jul 7, 2011 at 12:29 AM, Michael Meissner
meiss...@linux.vnet.ibm.com wrote:
This patch adds an option to not load the static chain (r11) for 64-bit
PowerPC
calls through function pointers (or virtual function
%
_ZN20ComputeNonbondedUtil25calc_self_merge_fullelectEP9nonbonded.part.30
4.60% 4.37%
_ZN20ComputeNonbondedUtil9calc_selfEP9nonbonded.part.34
--
Michael Meissner, IBM
5 Technology Place Drive, M/S 2757, Westford, MA 01886-3141, USA
meiss...@linux.vnet.ibm.com fax +1 (978) 399
be a good enhancement.
I changed the switch to -mno-pointers-to-nested-functions as David requestion
in private communications.
[gcc]
2011-07-13 Michael Meissner meiss...@linux.vnet.ibm.com
* config/rs6000/rs6000.opt (-mpointers-to-nested-functions):
Rename -mr11.
* config
One minor note, you will need to update doc/invoke.texi to document the new
switch before checkin: -ftree-reassoc-width=n
--
Michael Meissner, IBM
5 Technology Place Drive, M/S 2757, Westford, MA 01886-3141, USA
meiss...@linux.vnet.ibm.com fax +1 (978) 399-6899
On Thu, Jul 14, 2011 at 11:32:59AM +0200, Richard Guenther wrote:
On Thu, Jul 14, 2011 at 11:31 AM, Richard Guenther
richard.guent...@gmail.com wrote:
2011/7/14 Michael Meissner meiss...@linux.vnet.ibm.com:
One minor note, you will need to update doc/invoke.texi to document the new
switch
form of the instructions.
I have bootstrapped the patches and reran the test suite with no regressions.
In addition, I have built and run all of Spec 2006 with the patches. Are these
patches ok to install in GCC 4.7?
[gcc]
2011-07-19 Michael Meissner meiss...@linux.vnet.ibm.com
* config
I tried building the powerpc64-linux compiler today, and it would not
bootstrap, since evidently stages 2 and 3 are built with G++ instead of C, and
G++ is more strict about const pointers.
This patch allows the compiler to bootstrap. Is it ok to install?
2011-07-20 Michael Meissner meiss
David asked that I keep in the calls to strchr, etc. This is the change I just
checked in to address the boostrap issue:
2011-07-22 Michael Meissner meiss...@linux.vnet.ibm.com
* config/rs6000/rs6000.c (rs6000_xcoff_strip_dollar): Rewrite to
avoid warnings when GCC is built
for finding include files?
4) Did we want to update other backends to look at dynamic linkers and machine
dependent static libraries like I did for the powerpc.
Here is the ChangeLog.
2012-05-30 Michael Meissner meiss...@linux.vnet.ibm.com
* doc/install.texi (--with-extra-prefix
BOOT_CFLAGS='-g -O2 -mcpu=power7
-misel) and there were no regressions in the test suite against an unpatched
compiler. I have also built the Spec 2006 suite with isel, and it generated no
errors. Is this patch ok to apply?
[gcc]
2012-06-04 Michael Meissner meiss...@linux.vnet.ibm.com
On Tue, Jun 05, 2012 at 04:21:00PM -0400, Edmar wrote:
David, Michael,
Here is the new type popcnt patch that I had separated from previous
E5500/E6500 submission, also added the changes suggested by Michael
Meissner (detailed bellow).
I am missing some details for power6. (Could not find
(rs6000_emit_vector_cond_expr): Handle
different dest_mode from comparison mode.
* lib/target-supports.exp (check_effective_target_vect_cond_mixed):
Enable also for powerpc*-*-*.
Looks good to me, but David gets the final call on checking it in.
--
Michael Meissner, IBM
5
to delete the rs6000 target hook, and it
appears that the same code is now generated. I'll start a full bootstrap and
make check comparison.
2011-11-08 Michael Meissner meiss...@linux.vnet.ibm.com
* config/rs6000/rs6000.c (rs6000_builtin_conversion): Delete,
target hook
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