Re: gEDA-user: How do you unmask via's in PCB?

On Sat, May 29, 2004 at 01:19:06PM -0400, Bob Paddock wrote: > > How do I had solder mask clearance to selected via's? > I tried selecting them then doing "ChangeClearSize(selected,+3,mil)" but > nothing happened. That command only seems to work on pins&pads. 1) Make sure you have the solderma

gEDA-user: pcb-20040530 snapshot

I'm pleased to announce that there is a new PCB snapshot available on the sourceforge project page. As with the other snapshots, this release represents a work in progress. It is provided to make it easier for users who do not use CVS for accessing the latest sources. See http://pcb.sf.net for mo

Re: gEDA-user: pcb-20040530 snapshot

On Mon, May 31, 2004 at 05:14:05PM -0700, David Koski wrote: > Thanks Dan! > > On Mon, 31 May 2004 19:01:14 -0400 > Dan McMahill <[EMAIL PROTECTED]> wrote: > > > - Ordering is preserved when writing output files so that diff > >may be effectively used on

Re: gEDA-user: PCB fonts?

On Tue, Jun 01, 2004 at 02:28:06PM -0400, Dave McGuire wrote: > > Hey folks. I usually put my email address on a PCB layout, but the > default font that comes with PCB doesn't have an '@'. Is there a > low-pain way to add that symbol to the default font? How was the > default font generate

Re: gEDA-user: For the debian experts - trying to compile PCB

On Tue, Jun 01, 2004 at 04:01:22PM +, Xtian Xultz wrote: > Hello folks! > > I am new to debian, I am using a distro called Kurumin based on Knoppix > that is based on Debian :D > I am trying to compile PCB 20040530 but it gives me a lt of errors > like > gcc -DNDEBUG -g -O2 -I/usr/X11R6/

Re: gEDA-user: For the debian experts - trying to compile PCB

On Tue, Jun 01, 2004 at 09:36:13PM +0200, Mario Klebsch wrote: > Hi! > > Am 01.06.2004 um 18:01 schrieb Xtian Xultz: > > >Hello folks! > > > >I am new to debian, I am using a distro called Kurumin based on Knoppix > >that is based on Debian :D > >I am trying to compile PCB 20040530 but it gives m

Re: gEDA-user: PCB vs. dead polygon

On Wed, Jun 09, 2004 at 10:36:47AM +0200, Levente KOVACS wrote: > Hi all, > > > I have a question about dead polygons. I call dead polygon, which is not > connected to any net. How can I remove them? They are not needed, just > incrase the capacity. > > Furthermore, if I do "lookup connection to

Re: gEDA-user: PCB ordering data file

On Wed, Jun 09, 2004 at 12:51:07PM +, Karel Kulhav? wrote: > Hello > > I am using CVS and every time I do a minor change, the data file is completely > different. It looks like the items get ordered in different order. > > Would it be difficult to implement that after a minor change in the la

Re: gEDA-user: TQFP footprints for pcb?

On Thu, Jun 10, 2004 at 07:13:33PM -0500, Randall Nortman wrote: > I apologize if asking questions related to pcb, which is not > technically part of gEDA, is inappropriate for this list. It just > seems to me that a lot of pcb-related discussion seems to happen here. > (More even than on the actu

gEDA-user: classroom use of gEDA

Is anyone out there using gEDA, gnucap, or PCB in a classroom environment? I'd like to hear about it if you are. -Dan --

Re: gEDA-user: 74xx series

On Fri, Jun 25, 2004 at 02:47:48AM +0200, Paul Surgeon wrote: > How does one wire up the power on the 74xx series of chips in gschem? > There are no power pins on these logic ICs. see http://www.geda.seul.org/docs/20040111/netattrib/index.html personally I think implicit connections are EVIL, but

Re: gEDA-user: Multi pin description

On Tue, Jun 29, 2004 at 03:10:37AM +0200, Paul Surgeon wrote: > On Monday, 28 June 2004 21:32, Karel Kulhav? wrote: > > On Sat, Jun 26, 2004 at 01:26:44AM +0200, Paul Surgeon wrote: > > Is it possible to use XCircuit together with gEDA PCB? > > One can use XCircuit as a schematic capture and netli

Re: gEDA-user: PCB Install

On Thu, Jul 01, 2004 at 12:00:31PM -0400, [EMAIL PROTECTED] wrote: > Hi all, > > I have some questions about my pcb install. The build completes without any errors > but as far as I can tell, it did not build everything. Not all of the part > libraries, examples, and docs are being built. The

Re: gEDA-user: PCB Install

On Thu, Jul 01, 2004 at 12:00:31PM -0400, [EMAIL PROTECTED] wrote: > Hi all, > > I have some questions about my pcb install. The build completes without any errors > but as far as I can tell, it did not build everything. Not all of the part > libraries, examples, and docs are being built. The

gEDA-user: static timing analysis tool?

Anyone know of a static timing analysis tool thats available as free software? -Dan --

Re: gEDA-user: Problems with footprints

On Sat, Jul 24, 2004 at 11:01:47AM -0500, Bill Wilson wrote: > On Sat, 24 Jul 2004 11:16:39 +0200 > Christian Treldal <[EMAIL PROTECTED]> wrote: > > > fre, 2004-07-23 kl. 18:19 skrev Bill Wilson: > > > > > > Line 79-80 of board.pcb are as follows: > > > > PKG_RECTANGULAR2N(BRE300, C6, 82nF, 600,

Re: gEDA-user: Free Dog meetings at MIT starting this September!

On Sun, Aug 22, 2004 at 01:14:09PM -0400, Dave McGuire wrote: > On Aug 22, 2004, at 12:53 PM, Samuel A. Falvo II wrote: > >>Where can I buy one piece of this one in Prague? I would be genuinely > >>interested :) > > > >You may or may not be able to. I don't know. I know I can get them > >from >

Re: gEDA-user: Compiling MMI (electromagnetic simulator)

On Sun, Aug 22, 2004 at 06:13:34PM +, Karel Kulhav? wrote: > Hello > > MMI promises to compute distributed paramteres of copper strips on > PCB. looks neat once it can be built. I've started and found some issues with the build system. Haven't fixed them all yet... > I am lured by an idea

Re: gEDA-user: PCB versions

On Fri, Aug 20, 2004 at 06:04:27AM +, Karel Kulhav? wrote: > Hello > > Wouldn't it be please possible to make PCB display the same version in > the "About" dialog as is stamped on the .tgz archive? on my list for future snapshots. > The all three most recent versions display "1.99p" which ma

Re: gEDA-user: PCB versions

On Fri, Aug 20, 2004 at 06:04:27AM +, Karel Kulhav? wrote: > Hello > > [EMAIL PROTECTED]:~$ pcb --version > [EMAIL PROTECTED]:~$ > > Also this doesn't work: > > [EMAIL PROTECTED]:~$ pcb --help > [EMAIL PROTECTED]:~$ > fixed. Unsupported options will now give you the usage output. -Da

Re: gEDA-user: weird names in PCB part library

On Fri, Aug 20, 2004 at 11:39:13AM +, Karel Kulhav? wrote: > Hello > > PCB 20040530 library has different categories. Some of them are > in the form "name" and some "~name". Why is it this way? It looks > a bit weird. > ~name == "oldlib" (M4) style library name == "newlib" (directory based,

Re: gEDA-user: Compiling MMI (electromagnetic simulator)

On Sun, Aug 22, 2004 at 06:13:34PM +, Karel Kulhav? wrote: > Hello > > MMI promises to compute distributed paramteres of copper strips on > PCB. > > I chewed throught the latex2html stumbling block and hit another one > -- mmi (aka tnt - I don't know why there is a naming schizophreny) > inst

Re: gEDA-user: Printing from PCB from commandline

On Sun, Aug 15, 2004 at 09:41:49AM +, Karel Kulhav? wrote: > Hello > > I have read PCB manpage and realized it's possible to define several UNIX > commands that are executed at various occassions. However didn't find any > place where PCB commands could be specified to be executed. > > I woul

Re: gEDA-user: Printing from PCB from commandline

On Thu, Aug 26, 2004 at 06:26:21PM -0400, Dan McMahill wrote: > On Sun, Aug 15, 2004 at 09:41:49AM +, Karel Kulhav? wrote: > > Hello > > > > I have read PCB manpage and realized it's possible to define several UNIX > > commands that are executed at various occ

Re: gEDA-user: shorted net warning

On Sat, Aug 28, 2004 at 02:53:46PM -0700, John Luciani wrote: > I am using PCB version 1.99p and get the following > warnings after I choose Connects->optimize rats-nest > > 2: WARNING!! net "unnamed_net6" is shorted to net > "unnamed_net3" > 3: WARNING!! net "unnamed_net3" is shorted to net > "u

gEDA-user: pcb-20040903 snapshot

I am pleased to announce that a new pcb snapshot is available. pcb-20040903 can be found on the PCB sourceforge site, http://pcb.sf.net. As with the previous snapshots, this snapshot represents a work in progress. Thanks to everyone who has provided valuable feedbadk. --

gEDA-user: Re: gEDA: pcb-20040903 snapshot

On Fri, Sep 03, 2004 at 08:18:35PM -0400, Dan McMahill wrote: > > I am pleased to announce that a new pcb snapshot is available. > pcb-20040903 can be found on the PCB sourceforge site, > http://pcb.sf.net. > > Summary of chang

Re: gEDA-user: PCB Segmentation Fault

On Fri, Sep 03, 2004 at 09:08:50PM -0400, DJ Delorie wrote: > > > Is there a log file or debug mode that I can use to help find this > > problem? > > Run it under gdb: > > $ gdb pcb ... make that $ pcb -gdb pcb is actually a wrapper script which sets some environment variables and then call

Re: gEDA-user: PCB libraries

On Mon, Sep 06, 2004 at 04:45:47PM +0200, Andreas Platschek wrote: > Am Montag, 6. September 2004 18:23 schrieb Stephen Meier: > > Could you be a bit more specific? > > > > When you activate the library window (menu -> window -> library) do you > > see a list of directories in the left window and a

Re: gEDA-user: PCB libraries

On Mon, Sep 06, 2004 at 04:52:59PM +0200, Andreas Platschek wrote: > Am Montag, 6. September 2004 18:24 schrieb Stephen Meier: > > Where is PCB installed in your directory structure? > > > > Are all the permissions along the path coducive to non root users? > > > > Steve Meier > > > > Andreas Plats

Re: gEDA-user: Segmentation Fault

On Tue, Sep 07, 2004 at 01:42:38PM -0700, John Luciani wrote: > > I have found a condition that causes PCB to > Segment fault. > > I created an element that has a mounting hole > but I forgot to change bit 3 in the pin flag. The > PCB layout below contains the element with the > incorrect pin

Re: gEDA-user: Summary of available footprints?

On Thu, Sep 23, 2004 at 05:21:31PM -0500, Mark Rages wrote: > On Thu, Sep 23, 2004 at 05:00:39PM -0500, Mark Rages wrote: > > Hi all, > > > > Is there a summary of the avaiable pcb footprints in any of the gEDA > > docs? > > > > In particular, I'm looking for SMA (the diode footprint, not the RF

Re: gEDA-user: Compiling MMI (electromagnetic simulator)

On Sun, Aug 22, 2004 at 06:13:34PM +, Karel Kulhav? wrote: > Hello > > MMI promises to compute distributed paramteres of copper strips on > PCB. > > I chewed throught the latex2html stumbling block and hit another one > -- mmi (aka tnt - I don't know why there is a naming schizophreny) > inst

Re: gEDA-user: Icarus Verilog Release 0.8

On Thu, Oct 14, 2004 at 10:08:18AM -0700, Stephen Williams wrote: > -BEGIN PGP SIGNED MESSAGE- > Hash: SHA1 > > > Some of you have already noticed that Icarus Verilog 0.8 has > appeared on the FTP site. Start from the Icarus Verilog home > page: and fol

Re: gEDA-user: Question about embedded components in gEDA/

On Mon, Sep 27, 2004 at 11:59:54PM -0400, Ales Hvezda wrote: > Embedded components aren't used too much (I think), so I would > be willing to change this behavior if it would make your life easier. > I always embed the title block so I get expansion of CVS keywords like $Id$. Other than

Re: gEDA-user: General ground/power plane design questions

On Wed, Oct 20, 2004 at 09:41:40AM -0400, Randall Nortman wrote: > I'm designing a simple microcontroller board -- 4-layers, with ground > and power (+5V) planes, to reduce noise. The board will have a 16MHz > AVR microcontroller, which is by far the highest frequency that ought > to be going ove

Re: gEDA-user: General ground/power plane design questions

On Wed, Oct 20, 2004 at 09:07:48AM -0700, Steve Meier wrote: > First, you should always have a low pass filter which is well bellow 1/2 > the sampling frequency just before your a/d converter. Make that "a band limiting filter whose bandwidth is less than 1/2 the sampling frequency". There is no

Re: gEDA-user: PCB footprints?

On Sun, Oct 24, 2004 at 06:20:47PM -0400, Stuart Brorson wrote: > Hi Guys (and any Gals who are lurking out there) -- > > This may be in the FAQ (although I didn't find it in the ten seconds > that I took to Google around), so please tell me to RTFM if it is. > > I would like to know all the name

Re: gEDA-user: building under Cygwin

On Wed, Oct 27, 2004 at 10:48:25PM -0400, Ales Hvezda wrote: > and setting MINGW to yes. You might have to fudge with the configure scripts > to get the right PATHSEP and OTHERPATHSEP set (since cygwin is more unix like > than win32 like). for gtk/glib parts, there is G_DIR_SEPARATOR if you'r

Re: gEDA-user: PCB: how to clear soldermask from entire footprint

On Sat, Nov 06, 2004 at 05:42:12PM -0500, DJ Delorie wrote: > > > > Areas the autorouter shouldn't put traces through. I'd expand that to autorouter or human router. > > > > What's the reason for such areas? > > Mounting brackets, component contact, EMI, isolation, etc. > > For example, on my

Re: gEDA-user: Do it yourself PCB's via heat toner transfer.

On Sun, Nov 07, 2004 at 10:25:23AM -0500, Syed Faisal Akber wrote: > > As far as the heat transfer stuff goes, a friend of mine tried out many > scenarios. > 1 - Special Transfer paper --> Some of the paper that didn't have toner on > it got stuck to the copper clad. > 2 - Regular what 20# paper -

Re: gEDA-user: Kicad

On Thu, Nov 11, 2004 at 10:44:19PM +0200, Florian Steiper wrote: > Hello > > Did anybody try/heard of Kicad ? I stumbled across the program at > OpenCollector and it seems to be doing pretty much the same as the Geda > suite, only thing is that all the documentation is in french :) > > Here is

gEDA-user: Re: gEDA: PCB: Throw the Bugzilla out of window

On Fri, Nov 19, 2004 at 03:25:07PM +, Karel Kulhavy wrote: > Bugzilla appears to be a shit to me. Responds to an upload of 4MB > attachment with "invalid filename". "webp.ppm" is probably an invalid > filename on the filesystem Sourceforge runs on. Tried with Links and Mozilla > so it doesn't s

Re: gEDA-user: Re: gEDA: PCB: Throw the Bugzilla out of window

On Fri, Nov 19, 2004 at 06:35:11PM -0500, Daniel Nilsson wrote: > On Fri, Nov 19, 2004 at 06:12:58PM -0500, Dan McMahill wrote: > > On Fri, Nov 19, 2004 at 03:25:07PM +, Karel Kulhavy wrote: > > > Bugzilla appears to be a shit to me. Responds to an upload of 4MB > > &g

Re: gEDA-user: Any DIY USB Scope project on schedule? Or some recommmendation?

On Tue, Nov 23, 2004 at 04:51:58PM -0800, Samuel A. Falvo II wrote: > > It's a handy formula to have -- however, I'm curious though: where does > the factor of 0.35 come from? > from a 1st order system. BW (Hz) = 1/(2*pi*tau), step response = 1 - exp(-t/tau). Time to 10% is t10 = -tau*log(0.

Re: gEDA-user: drill size editting in PCB

On Mon, Dec 06, 2004 at 04:32:01PM +0100, Shahab Sanjari wrote: > Dear list, > > is there a possibility to list all different drill diameters (pads / > vias) and edit them after layout job is done, in order to reduce them to > those standard values that the board-house likes? This reduces > pr

Re: gEDA-user: drill size editting in PCB

On Tue, Dec 07, 2004 at 01:48:05PM +, Karel Kulhavy wrote: > On Mon, Dec 06, 2004 at 04:32:01PM +0100, Shahab Sanjari wrote: > > Dear list, > > > > is there a possibility to list all different drill diameters (pads / > > vias) and edit them after layout job is done, in order to reduce them to

Re: gEDA-user: Compiling MMI (electromagnetic simulator)

On Tue, Dec 14, 2004 at 01:19:08PM +, Daniel Nilsson wrote: > Karel Kulhavy ([EMAIL PROTECTED]) wrote*: > > > >On Sun, Dec 12, 2004 at 09:29:10AM -0500, Daniel Nilsson wrote: > > > >[...] > > > >> Here's a good collection of links (including fastcap): > >> > >> http://www.fastfieldsolvers.com/l

Re: gEDA-user: gEDA gets some great press!

On Tue, Dec 14, 2004 at 02:57:08PM -0500, Al Davis wrote: > On Tuesday 14 December 2004 01:54 pm, John Eaton wrote: > > It always irk's me when someone says that Open Source isn't > > "professional caliber" or lacks user support. > > But remember who said that. It is just a vendor defending his

Re: gEDA-user: Compiling MMI (electromagnetic simulator)

On Tue, Dec 14, 2004 at 09:56:37PM -0500, Daniel Nilsson wrote: > On Tue, Dec 14, 2004 at 09:21:28AM -0500, Dan McMahill wrote: > Agreed, you might care about these aspects. What I wanted to point out > it that there are were few real world problem where you actually can > u

gEDA-user: netlist -> schematic

has anyone worked on or know of a netlist -> schematic translator? I'm looking for something which might help visualize the network produced by a tool which generates a netlist but no schematic. Thanks -Dan --

Re: gEDA-user: OT: need fine (5 to 10 mils) solder

On Mon, Dec 13, 2004 at 02:08:54PM -0800, David Koski wrote: > I have some boards to produce that have components with about a 9 mil > pad spacing and my 15 mil solder is a little big. After searching on > line I gave up in frustration trying to find an online store that > sells ultra fine solder

Re: gEDA-user: gEDA Suite CD .isos available

On Wed, Dec 29, 2004 at 04:00:28PM -0800, Stephen Williams wrote: > -BEGIN PGP SIGNED MESSAGE- > Hash: SHA1 > > John Doty wrote: > |>Then, burn it to a CD and use the CD to > |>install the entire gEDA Suite on any (Linux) computer you wish. > | > | > | Well, not just any Linux computer. On

Re: gEDA-user: Dummy elements in gschem

On Mon, Jan 03, 2005 at 08:59:33PM +, Karel Kulhavy wrote: > Hello > > I have a shielding box in PCB as an element (because the silk lines and holes > have to be kept in precise distances). Every time I run gsch2pcb, the box > gets removed. > > What is the ideologically correct solution to th

Re: gEDA-user: solder strip

On Wed, Jan 05, 2005 at 06:20:06PM +, Karel Kulhavy wrote: > > Why don't you make a symbol for gschem that represents the shield. Give > > it one pin. In the schematic connect that one pin to ground. I do this > > all the time to make holes for ground clips (to clip my oscilloscope > > probe

Re: gEDA-user: PCB suggestion

On Wed, Jan 05, 2005 at 06:07:31PM -0500, DJ Delorie wrote: > > > > > How is this done in Orcad? In Eagle? In other tools? > > > > > > Since it's an internals problem, and not a user interface problem, we > > > have no way of knowing. > > > > In PCB you cannot draw a rectangle of missing solder

Re: gEDA-user: PCB suggestion

On Sat, Jan 08, 2005 at 08:19:06AM -0800, Daniel J Wisehart wrote: > On Friday 07 January 2005 09:44, Evan Lavelle wrote: > > > > Maybe I'm being thick here, but what exactly would the advantages of an > > XML file format be? > > The main point is that XML is self-describing for people reading the

Re: gEDA-user: PCB suggestion

On Mon, Jan 10, 2005 at 10:15:40PM -0500, Daniel Nilsson wrote: > On Sun, Jan 09, 2005 at 10:30:51AM -0500, Dave McGuire wrote: > > On Jan 8, 2005, at 12:18 PM, Stuart Brorson wrote: > > >2. The biggest reason to not use XML is that we already have a > > >working file format with associated file r

Re: gEDA-user: SOT23

On Tue, Jan 11, 2005 at 12:14:40AM -0800, Matt Ettus wrote: > Is there a SOT23-5 footprint somewhere in PCB? And does anyone have a > mapping between SOTxx and SCxx numbers? > There are some SOT and SC footprints in ~geda. Especially with these, you really really really (I can't stress it enoug

gEDA-user: netlist comparison tool?

anyone know of an open source netlist comparison tool? I'm looking for one which can deal with net names being different as well as instance names as long as the over all network is the same in the 2 cases. Thanks -Dan --

Re: gEDA-user: solder strip

On Thu, Jan 06, 2005 at 06:07:25PM +0100, Mario Klebsch wrote: > -BEGIN PGP SIGNED MESSAGE- > Hash: SHA1 > > Hi! > > Am 06.01.2005 um 02:14 schrieb Dan McMahill: > >but if you want to be certain you don't forget them, you need to add > >to the >

Re: gEDA-user: PCB suggestion

On Thu, Jan 13, 2005 at 03:40:18PM -0500, DJ Delorie wrote: > > > I have seen this, too. But when it looks like Motif, does it feel > > like Motif, too? Last time, I tried such an app, the answer was > > no. :-( > > As a Motif developer at the time, no, it didn't. We used it anyway. > > But tha

Re: gEDA-user: SOT23

On Thu, Jan 13, 2005 at 05:32:36PM -0600, Bill Wilson wrote: > On Thu, 13 Jan 2005 14:56:24 -0800 > Matt Ettus <[EMAIL PROTECTED]> wrote: > > > Does anybody have a surface mount crystal footprint? I think its > > HC49, but the only one in the library is through hole, and I think it > > has other

Re: gEDA-user: SOT23

On Thu, Jan 13, 2005 at 05:32:36PM -0600, Bill Wilson wrote: > On Thu, 13 Jan 2005 14:56:24 -0800 > Matt Ettus <[EMAIL PROTECTED]> wrote: > > > Does anybody have a surface mount crystal footprint? I think its > > HC49, but the only one in the library is through hole, and I think it > > has other

Re: gEDA-user: phwew! that g_key_file_new snafu SUCKS!

On Thu, Jan 13, 2005 at 11:28:38PM -0500, Ales Hvezda wrote: > >it took a while, but about a million sed scripts later i've > >successfully compiled gEDA 20041228 against gtk/glib 2.6.0. isnt > >someone supposed to fix this in cvs? i tried it too, but it appears > >to still be affected. > > > >

Re: gEDA-user: On the nitty-gritty of user-experienced problems

On Sat, Jan 15, 2005 at 06:34:53PM +0100, Mario Klebsch wrote: > IMHO the real problem is not tke lack of standards but the unability to > cope with it. UNIX had a long tradition in being inhomogenous. Open > Source programs written for UNIX were usually developed and used on a > wide variety

Re: gEDA-user: Check for same refdes

On Sun, Jan 16, 2005 at 07:02:41PM -0500, Stuart Brorson wrote: > > > As for gnetlist itself, I would have to look to see how easy it might > > > be to rectify the problem you mention. Personally, I think it should > > > be fixed in the Scheme back end. > > > > I just tried gnetlist -v. This seem

Re: gEDA-user: Removing soldermask over traces/polygons in PCB?

On Fri, Jan 21, 2005 at 11:48:37AM -0800, Steve Meier wrote: > Harry, > > The board I used this for had relatively few parts. (5) SO8, (1) 100 pin > QFP the usual number of inductors, capacitors and resistors. Plus it had > two connectors that had to be at 45 degree angles to each other. For > tho

gEDA-user: New PCB snapshot (pcb-20050127)

I've made a new snapshot for pcb. The snapshot may be found at http://pcb.sf.net As always, this is a snapshot of a work in progress. There have been many bug fixes and feature additions and as always there is still more to do. Thanks to everyone who has provided feedback. A summary of the chang

Re: gEDA-user: PCB pin hole size

On Fri, Jan 28, 2005 at 04:19:23PM +0100, Wojciech Kazubski wrote: > > > Shold the specified diametr be the drill size or finished hole size? > > > > My fab shop says drill sized are ALWAYS finished size. Only the fab > > shop knows how thick their plating is. > > So the footprint creation guide

Re: gEDA-user: Manual routing only

On Sat, Jan 29, 2005 at 10:11:09AM -0500, Bob Paddock wrote: > On Saturday 29 January 2005 09:32 am, Xtian Xultz wrote: > > > > "Manual routing only." > > > (http://opencollector.org/collector.php) > > > > > > This is IMHO wrong. PCB has autorouting too. > > > I never used auto routing in any EDA

Re: gEDA-user: PCB pin hole size

On Sun, Jan 30, 2005 at 01:14:15PM -0800, Daniel J Wisehart wrote: > On Saturday 29 January 2005 06:08, Dan McMahill wrote: > > On Fri, Jan 28, 2005 at 04:19:23PM +0100, Wojciech Kazubski wrote: > > > > > Shold the specified diametr be the drill size or finished hole size

Re: gEDA-user: PCB pin hole size

On Mon, Jan 31, 2005 at 02:51:17PM +0100, Wojciech Kazubski wrote: > > > > Of course its much more than you'd want to use, but each vendor will have > > its own prefered list. Hence the vendor resource file feature of pcb! > > > > -Dan > This could be done by a small utility that looks into *.pcb

Re: gEDA-user: PCB pin hole size

On Mon, Jan 31, 2005 at 02:51:17PM +0100, Wojciech Kazubski wrote: > > > > Of course its much more than you'd want to use, but each vendor will have > > its own prefered list. Hence the vendor resource file feature of pcb! > > > > -Dan > This could be done by a small utility that looks into *.pcb

Re: gEDA-user: PCB open pinout window segfault

On Tue, Feb 01, 2005 at 04:37:46PM -0600, Darrell Harmon wrote: > I am running pcb-20050127. When I select open pinout window PCB > segfaults (only for certain elements). QFP208_28 in ~geda is one > example of an element that will cause a segfault. Distro is Debian > testing. Is anyone else

Re: gEDA-user: gnetlist in a Makefile

On Wed, Feb 02, 2005 at 05:13:54PM -0500, Stuart Brorson wrote: > That won't work. Peter's problem is a toughie. > > The problem is that gnetlist doesn't return an error code to the shell > based upon its success in netlisting. Therefore, your suggestion > won't work. If you use (error "some me

Re: gEDA-user: gnetlist dumps core

On Fri, Feb 04, 2005 at 12:42:55AM +0100, Christoph Lechner wrote: > > >* Your backtrace shows that the pointer w_current changes its hex > >value as you make successive function calls. This suggests a memory > >management problem or a loose pointer. We have been hacking a lot in > >that partic

Re: gEDA-user: PCB package creation guidelines

On Wed, Dec 29, 2004 at 02:12:21PM -0800, Steve Meier wrote: > In my land patterns I use the center of pad 1 as the centroid. I am > opposed to putting pad names into land patterns because that would make > patterns non reusable for different components. Do we really need one > land pattern for an

Re: gEDA-user: gnetlist in a Makefile

On Fri, Feb 04, 2005 at 10:22:29PM +0100, Carlos Nieves ?nega wrote: > Hi Peter, > I think it'd be nice to have the backend returning some value depending > on the number of errors and warnings, so it would be easy to do that > kind of tests in Makefiles. > > So maybe return a different value for

Re: gEDA-user: gnetlist in a Makefile

On Thu, Feb 03, 2005 at 01:25:34PM -0500, Richard Prescott wrote: > Ok, there is missing semi-columns in your statement, "make" will put all > lines ended with "\" together in a single line > > if cmd1; then cmd2; else cmd3; fi > > > Although, personally, I prefer to not use bash to do ifs in M

Re: gEDA-user: gnetlist in a Makefile

On Sat, Feb 05, 2005 at 09:45:31PM +0100, Peter Kaiser wrote: > > Hello Carlos > > > > > > I think it'd be nice to have the backend returning some value depending > > > on the number of errors and warnings, so it would be easy to do that > > > kind of tests in Makefiles. > > > > > > So maybe re

Re: gEDA-user: non-round PCB pins

On Mon, Feb 07, 2005 at 01:54:31PM -0800, Matt Ettus wrote: > I asked my PCB vendor and got this response -- > > > What CAD do you use for design of the board? Please use mechanical layer for > layout of the mill-out if you use Protel. Please uese .mil file if you use > Eagle. Just examples.

Re: gEDA-user: pcb, pinout window

On Mon, Feb 07, 2005 at 05:15:41PM +0100, Levente KOVACS wrote: > Hi folks, > > > When I resize the pinout window, and I reach the minimum size, pcb > crashes. > I have been unable to reproduce this. Which window manager are you using? Not that it should probably matter. -Dan --

Re: gEDA-user: PCB under Window$

On Tue, Feb 22, 2005 at 04:22:52PM +, Karel Kulhavy wrote: > Hello > > I managed to install PCB > http://pcb.sourceforge.net > on M$ Window$ successfully and simply. > > First I installed Cygwin and clicked up bunch of reasonable options > (X, gcc, GNU Make, and lots more) > > Then I downloa

Re: gEDA-user: Can't truncate plane layers on backside?!?!?

On Wed, Feb 23, 2005 at 07:29:26AM -0500, Stuart Brorson wrote: > Harry -- > > Thank you for your quick and accurate reply. Indeed, my problem was > that I had only the GND polygon on the back, and PCB was rendering it > as a negative plane. The board house wants positive planes on all > externa

Re: gEDA-user: PCB Gtk port

On Sun, Feb 27, 2005 at 08:51:46PM -0300, Xtian Xultz wrote: > Em S?b 26 Fev 2005 17:47, Bill Wilson escreveu: > > Hi all, > > Since the things left to do on the PCB gtk port are starting to look > > more and more like loose ends, I think it's time to give an update > > on its status. Maybe it can

Re: gEDA-user: PCB Gtk port

On Sun, Feb 27, 2005 at 08:00:27PM -0500, Dave McGuire wrote: > > I'm very curious to know if the integration into the existing > >code base will coexist with the Xaw GUI or if they are mutually > >exclusive? > > I sure hope it will coexist. I've been working on this non-stop > since Bil

Re: gEDA-user: X server support - was Feh!

On Tue, Mar 01, 2005 at 12:59:45AM -0500, Marvin Dickens wrote: > On Tuesday 01 March 2005 12:17 am, Alex Perry wrote: > > > There seems to be a common attitude among casual Linux users that the > > X server against on which an application is drawing is located on the > > same system image as the

Re: gEDA-user: PCB Gtk port

On Mon, Mar 07, 2005 at 07:15:13PM -0600, Bill Wilson wrote: > On Tue, 8 Mar 2005 00:45:38 +0100 (CET) > Tomasz Motylewski <[EMAIL PROTECTED]> wrote: > > > > When editing and saving it takes into account locale. > > > When reading files it doesn't. > > > The effect: if you have decimal separator o

Re: gEDA-user: Gattrib bugs fixed (hopefully). Please test!!

On Tue, Mar 08, 2005 at 12:16:48PM -0500, Stuart Brorson wrote: > Hi Carlos -- > > Thanks for the investigation! Keep it up; if you find a fix, I will > incorporate it into gattrib. Meanwhile I will try to look at GTKSheet > again and see if I can find a problem. > > [snip!] > > > I'm using

Re: gEDA-user: Gattrib bugs fixed (hopefully). Please test!!

On Thu, Mar 10, 2005 at 07:13:20AM -0500, Stuart Brorson wrote: > Hi again -- > > > > So something seems to have changed between 2.2.4 and 2.4 ... what I > > > don't understand is why gattrib works with gtk2.4 for you and don't work > > > for me... :( > > > > Do you have Spanish language turned o

Re: gEDA-user: PCB: problems w/ pcblib

On Tue, Mar 08, 2005 at 12:28:37PM +0100, Christoph Lechner wrote: > Hallo, > > when I try to place one of the components "TO220S", "TO220SW", > "TO126S" from group "~geda" in PCB it does not work. > > In the pcb-bin-log window a message appears which reads > | ERROR parsing file 'pcblib' > | lin

gEDA-user: GTK in PCB CVS

Hi, This is a heads up for those who may be tracking pcb via cvs. I have created a branch in cvs called pcb-xaw. This contains the most recent pcb sources which used the Xaw widget set for the user interface. If you wish to track this branch, you will need to specify it when you do your next u

gEDA-user: gEDA/gaf 20050313 NetBSD packages

Subject pretty much says it all. I just update the NetBSD packages. Users of NetBSD's pkgsrc should be good to go. I've verified the packages on NetBSD and Solaris-2.9. Enjoy. -Dan --

Re: gEDA-user: all pads became oval

On Thu, Mar 24, 2005 at 10:21:37PM -0500, DJ Delorie wrote: > > > I've been following the latest CVS of PCB. Just recently, all of > > the pads on one of my designs became oval... I don't know if it was > > like that the last time I saved, but now they are oval every time I > > load it. This is

Re: gEDA-user: pcb-gtk question

On Mon, Mar 28, 2005 at 10:04:07PM +0200, PR wrote: > How to change menu layout in GTK version of pcb? > > I modify pcb-menu.res, rebuild and run src/pcb-bin and menu is not > chanched... that got lost in the gtk port. I'm working (slowly) on restoring that. Doesn't look like it will be too hard

Re: gEDA-user: 20050329 install problem

> >> Silly (probably) Q: Is there an html build something step by step > >> tutorial buried in this someplace that would give a rank beginner > >> at EDA a helping hand? I can read chip docs, and wirewrap fairly > >> complex stuff which worked when I got done but that was 20 years > >> back dow

Re: gEDA-user: How to do transient analysis?

On Sat, Apr 09, 2005 at 09:21:11PM +0200, Peter Kaiser wrote: > > > > > do you have, perhaps, an URL for "switchcap simulator" handy ? > > > > http://www.cisl.columbia.edu/projects/switcap/ > > > The web page says, that the distribution is stoped temporarily. Hopfully they > change there mind

Re: gEDA-user: conversion RS274D to RS274X format

On Thu, Apr 21, 2005 at 12:33:30AM -0700, primorec wrote: > I would like to convert gerber files form RS274D to RS274X format. > > Is there any free program which can do such conversion ? Someone posted a short perl program which was targeted at PADS here once. It shows the basic step you need w

Re: gEDA-user: PCB: ground network common practice newbie question

On Sun, Apr 24, 2005 at 11:45:13AM -0400, DJ Delorie wrote: > > > For two sided boards, Is it common practice not to draw any ground > > lines, but to rely on the polygons to connect all grounds as the final > > stage of pcb drawing? > > If it were me, I'd use regular traces for ground lines to

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